Abstract: A Hall element comprises a region having a non-zero Hall constant, a first contact for supplying an operating current to the region, a third contact for conducting the operating current from the region, the first and third contacts defining a direction of the operating current within the region, a second and a fourth contact for tapping a Hall voltage, and a conductor pattern connected to the first contact or to the third contact and substantially surrounding the region laterally or being arranged above or below the region. The conductor pattern has the effect that the intrinsic field of the operating current through the Hall element is suppressed outside the Hall element such that the Hall element effects an at least reduced offset in adjacent Hall elements. In addition thereto, the arrangement of the conductor pattern has the effect that effects of the current return on the Hall voltage generated by the Hall element itself are also at least reduced.

Abstract: A current reference, which may be fabricated on a die, as part of an integrated circuit, or in various other forms, is disclosed. The current reference includes two current sources, both of which provide a substantially temperature stable output current, which may use a differencing circuit to provide a reference output current having a magnitude approximately equal to the difference between the magnitudes of the two substantially temperature stable output currents.

Abstract: A Hall effect device comprising: (a) an electrically-conductive layer or plate having a top surface; and (b) a ferromagnetic layer, where the conductive film or layer is composed of high mobility semiconductors. Also, a Hall effect device can have a ferromagnetic element that is a multilayer (e.g., a bilayer), and a device in which the Hall plate comprises an indium compound, germanium or mixtures thereof. The devices are useful for a variety of applications such as a memory element in a nonvolatile random access memory array (NRAM) and as a logic gate.

Abstract: A transpinnor switch is described having a network of thin-film elements in a bridge configuration, selected ones of the thin-film elements exhibiting giant magnetoresistance. The switch also includes at least one input conductor inductively coupled to a first subset of the selected thin-film elements, and a switch conductor inductively coupled to a second subset of the selected thin-film elements for applying magnetic fields thereto. The switch is configurable using the switch conductor to generate an output signal representative of an input signal on the input conductor. The switch is also configurable using the switch conductor to generate substantially no output signal regardless of whether the input signal is present. The transpinnor switch described herein may be used in a wide variety of applications including, for example, a field programmable gate array.

Abstract: A module for optical communications includes a light receiving element which converts the light signal to an electric signal and an insulating substrate including first and second surfaces opposite to each other. An output section is provided on the first surface and extracts the electric signal as reverse and non-reverse signals. First and second connection terminals are connected to the output section and output the reverse and non-reverse signals. First and second wiring patterns are provided on the first surface. The first and second wiring patterns are electrically connected to one of the first and second wiring patterns and the other one thereof. The first and second wiring patterns have first and second ends, respectively. The first and second ends are provided in order in a direction intersecting with a line connecting the first and second connection terminals.

Abstract: A magnetoresistive device including a high-resistivity layer (13), a first magnetic layer (12) and a second magnetic layer (14), the first magnetic layer (12) and the second magnetic layer (14) being arranged so as to sandwich the high-resistivity layer (13), wherein the high-resistivity layer (13) is a barrier for passing tunneling electrons between the first magnetic layer (12) and the second magnetic layer (14), and contains at least one element LONC selected from oxygen, nitrogen and carbon; at least one layer A selected from the first magnetic layer (12) and the second magnetic layer (14) contains at least one metal element M selected from Fe, Ni and Co, and an element RCP different from the metal element M; and the element RCP combines with the element LONC more easily in terms of energy than the metal element M. Accordingly, a novel magnetoresistive device having a low junction resistance and a high MR can be obtained.

Abstract: A microelectromechanical system (MEMS) device is disclosed for determining the position of a mover. The MEMS device has a bottom layer connected to a mover layer. The mover layer is connected to a mover by flexures. The mover moves relative to the mover layer and the bottom layer. The flexures urge the mover back to an initial position of mechanical equilibrium. The flexures include coupling blocks to control movement of the mover. The MEMS device determines the location of the mover by determining the capacitance between mover electrodes located on the coupling blocks of the flexures and counter electrodes located on an adjacent layer. The coupling block moves according to a determinable relationship with the mover. As the coupling block moves, the capacitance between the mover electrode and the counter electrode changes. A capacitance detector analyzes the capacitance between the electrodes and determines the position of the mover.

Abstract: A Hall-effect element includes an isolating layer and an active layer of a first electrical conductivity type disposed on the isolating layer, the active layer having a surface. A first set of contacts is disposed in contact with the surface along a first axis, and a second set of contacts is disposed in contact with the surface along a second axis transverse to the first axis. An insulating layer is disposed on the surface. A metal control field plate is disposed on the insulating layer and is coupleable to a voltage source to control the accumulation of charge carriers at the surface of the active layer to vary the resistance of the active layer. Also, a method is provided for reducing null offset in a Hall-effect element.

Abstract: A semiconductor module includes a housing with at least one semiconductor component that is conductively connected to at least one output line. An integrated temperature sensor is also housed in the housing. This sensor is connected, via at least one of its load terminals, to a terminal for receiving a supply potential. The temperature sensor conducts a load current that heats-up the temperature sensor when a first temperature threshold is crossed and a supply potential is in being supplied. A housed interruption device is arranged in such a way that it interrupts the output lines carrying the load current when a second temperature threshold has been exceeded.

Abstract: In order to dampen magnetization changes in magnetic devices, such as tunnel junctions (MTJ) used in high speed Magnetic Random Access Memory (MRAM), a transition metal selected from the 4d transition metals and 5d transition metals is alloyed into the magnetic layer to be dampened. In a preferred form, a magnetic permalloy layer is alloyed with osmium (Os) in an atomic concentration of between 4% and 15% of the alloy.

Abstract: A semiconductor device is described in which an integrated circuit executes dummy operating cycles in order to generate heat if the temperature of the semiconductor device drops below a lower limit value. In this manner the semiconductor device can be rated for lower temperatures than the construction tolerances of the semiconductor device would allow.

Abstract: A hybrid memory device combines a ferromagnetic layer and a Hall Effect device. The ferromagnetic layer is magnetically coupled to a portion of a Hall plate, and when such plate is appropriately biased, a Hall Effect signal can be generated whose value is directly related to the magnetization state of the ferromagnetic layer. The magnetization state of the ferromagnetic layer can be set to correspond to different values of a data item to be stored in the hybrid memory device. The magnetization state is non-volatile, and a write circuit can be coupled to the ferromagnetic layer to reset or change the magnetization state to a different value. The memory device can also be fabricated to include an associated transistor (or other suitable switch) that functions as an isolation element to reduce cross-talk and as a selector for the output of the device when such is used in a memory array.

Abstract: A semiconductor device with an electric converter element on a diaphragm is provided, in which the diaphragm has an improved thermal shielding or blocking capability from a semiconductor substrate without lowering the mechanical strength of a leg of the diaphragm. The semiconductor device includes of a semiconductor substrate, a diaphragm mechanically connected to the substrate by a thermally-resistive leg, an electric converter element provided on the diaphragm, an electronic circuit formed on the substrate, and an electric path located on the leg for electrically connecting the electric converter element and the electronic circuit. The diaphragm is electrically insulated and thermally separated from the substrate. The electric converter element conducts a conversion between a physical quantity and an electric input/output signal. The electric path is made of a metal suicide to decrease its thermal conductivity without decreasing its electrical conductivity.

Abstract: A magnetic field sensor for measurement of the three components (Bx, By, Bz) of a magnetic field comprises a Hall-effect element (1) and an electronic circuit (22). The Hall-effect element (1) comprises an active area (18) of a first conductivity type which is contacted with voltage and current contacts (2-5 or 6-9). Four voltage contacts (2-5) are present which are connected to inputs of the electronic circuit (22). By means of summation or differential formation of the electrical potentials (V2, V3, V4, V5) present at the voltage contacts (2-5), the electronic circuit (22) derives three signals (Vx, Vy, Vz) which are proportional to the three components (Bx, By, Bz) of the magnetic field.

Abstract: The integrated microactuator has a stator and a rotor having a circular extension with radial arms which support electrodes extending in a substantially circumferential direction and interleaved with one another. For the manufacture, first a sacrificial region is formed on a silicon substrate; an epitaxial layer is then grown; the circuitry electronic components and the biasing conductive regions are formed; subsequently a portion of substrate beneath the sacrificial region is removed, forming an aperture extending through the entire substrate; the epitaxial layer is excavated to define and separate from one another the rotor and the stator, and finally the sacrificial region is removed to release the mobile structures from the remainder of the chip.

Abstract: A power MOSFET die and a logic and protection circuit die are mounted on a common lead frame pad, such as a TO220 lead frame pad. The logic and protection circuit die includes a MOSFET that is connected in parallel with the power MOSFET but which is smaller than the power MOSFET and which dissipates power at a predetermined fraction of that of the power MOSFET. The logic and protection circuit die also includes a temperature sensor that is in close proximity to the MOSFET and determines the temperature of the MOSFET. The die also includes another temperature sensor that is located distant from the MOSFET to determine the temperature of the lead frame. The temperature of the power MOSFET can be determined from the temperature measured by these two sensors and from the ratio of the power dissipated by the two MOSFETs.

Abstract: A magnetic tunnel junction (MTJ) memory cell uses a biasing ferromagnetic layer in the MTJ stack of layers that is magnetostatically coupled with the free ferromagnetic layer in the MTJ stack to provide transverse and/or longitudinal bias fields to the free ferromagnetic layer. The MTJ is formed on an electrical lead on a substrate and is made up of a stack of layers.

Abstract: A polysilicon gate layer, a first n.sup.+ diffusion region serving as a drain region, and a second n.sup.+ diffusion region serving as a source region form a MOSFET, and then an operating point of the MOSFET is set into its saturation region by connecting a gate layer and a drain region of the MOSFET. The first and second n.sup.+ diffusion regions provide a first and a second leakage paths, respectively. A temperature sensor can be provided by use of the event that a leakage current flowing through the second leakage path is varied according to a substrate temperature. According to such configuration, scatter of detected temperatures due to scattering in manufacturing process can be reduced even if all scattering parameters in manufacturing process are considered. In addition, an required area of the temperature sensor can be made smaller since a high resistance value is not needed.

Abstract: A hybrid memory device combines a ferromagnetic layer and a Hall Effect device. The ferromagnetic layer is magnetically coupled to a portion of a Hall plate, and when such plate is appropriately biased, a Hall Effect signal can be generated whose value is directly related to the magnetization state of the ferromagnetic layer. The magnetization state of the ferromagnetic layer can be set to correspond to different values of a data item to be stored in the hybrid memory device. The magnetization state is non-volatile, and a write circuit can be coupled to the ferromagnetic layer to reset or change the magnetization state to a different value. The memory device can also be fabricated to include an associated transistor (or other suitable switch) that functions as an isolation element to reduce cross-talk and as a selector for the output of the device when such is used in a memory array.

Abstract: A solid-state component is described which includes a network of thin-film elements. At least one thin-film element exhibits giant magnetoresistance. The network has a plurality of nodes, each of which represents a direct electrical connection between two of the thin-film elements. First and second ones of the plurality of nodes comprise power terminals. Third and fourth ones of the plurality of nodes comprise an output. A first conductor is inductively coupled to the at least one thin-film element for applying a first magnetic field thereto.

Abstract: A micro-switch having a flexible conductive membrane which is moved by an external force, such as pressure from an air flow, to establish a connection between contact pads. The conductive membrane is stretched over one or more spacer pads to introduce deformation in the conductive membrane, thereby improving the accuracy and repeatability of the micro-switch. The spacing between the contact pads and the conductive membrane is precisely controlled by controlling the height difference between the spacer pads and the conductive pads. This height difference is determined by one or more precisely controlled etch operations.

Abstract: A triple drain magnetic field effect transistor (MagFET) for measuring magnetic field. The disclosed MagFET has a gate, a source, a center drain and two lateral drains and generates an increased Hall voltage between the two lateral drains. The MagFET provides a high conductivity channel disposed between the center drain and the source to allow a high sense current to flow. The relationship between the sense current and the background carrier concentration of the lateral drains of the transistor are effectively reduced or decoupled in order to provide the increased Hall voltage between the lateral drains in response to a magnetic field.

Abstract: A new hybrid magnetic spin injected-FET structure can be used as a memory element for the nonvolatile storage of digital information, as well as in other environments, including for example logic applications for performing digital combinational tasks, or a magnetic field sensor. The hybrid FET uses ferromagnetic materials for the source and drain, and like a conventional FET, has two operating states determined by a gate voltage, "off" and "on". The ferromagnetic layers of the hybrid FET are fabricated to permit the device to have two stable magnetization states, parallel and antiparallel. In the "on" state the spin injected FET has two settable, stable resistance states determined by the relative orientation of the magnetizations of the ferromagnetic source and drain.

Abstract: A modified Hall Effect device can be used as a memory element for the nonvolatile storage of digital information. The novel device includes a ferromagnetic layer that covers a portion of a Hall plate and is electrically isolated from the Hall plate. The ferromagnetic layer on the Hall plate can be changed by an externally applied field, and permits the device to have two stable magnetization states (positive and negative) along an anisotropy axis, which can correspond to two different data values (0 or 1) when the device is used as a memory element. In another embodiment of the invention, the Hall plate is integrated with a conduction channel of a FET, and the ferromagnetic layer is incorporated in proximity to, or as part of the gate over the conducting channel. This device can be described as a "ferromagnetic gated FET.

Abstract: The invention relates to a monolithic integrated sensor circuit, fabricated in CMOS technology, in which the circuit implemented on the semiconductor chip is connected to the ground connection via the substrate of the semiconductor chip, and in which the input signals are not referred to the potential of the ground connection.

Abstract: A vertical Hall element is formed within the epitaxial layer of a semiconductor and isolated from other components by a P type isolation diffusion. A position defining diffusion is used to accurately locate a plurality of openings within the position defining diffusion where contact diffusions are made. The position defining diffusion is made simultaneously with the base diffusion for transistors within the integrated circuit and the contact diffusions are made simultaneously with the emitter diffusion of transistors within the integrated circuit. Five contact diffusions are provided on the upper surface of the epitaxial layer and generally aligned within the region defined as the Hall element by the isolation diffusions. The center contact is used to provide electrical current flowing through the Hall effect element. Electrical current is split and flows to the two end contact diffusions.

Abstract: For detecting the position of a magnetic element having a field component zeroing in at least one point in space, typically in a plane, a plurality of elementary Hall-effect sensors are integrated side by side and aligned in a direction perpendicular to the zeroing field component and to the current flowing through the elementary sensors. The elementary sensor generating a zero output voltage therefore indicates the zero position of the field component and consequently the position of the magnetic element with respect to the position sensor, so that The outputs of the elementary sensors provide a quantized numeric code indicating the position of the magnetic element.

Abstract: A solid state triode employs the Hall effect to asymmetrically proportion flow of current through different branches of a number of cascaded bifurcated N- charge carrier channels (10,18,20), thereby providing an indication of strength and direction of an applied magnetic field by measuring magnitude and sense of the difference between currents flowing in the two channel branches (14,16,24,26,30,32). The solid state triode is formed on an silicon-on-insulator (SOI) substrate (47,48,49) in which an N+ source region (54) and at least two end N+ drain regions (56,58) are interconnected by an N- charge carrier channel (60) that is defined by a plurality of P+ regions (64a,64b,64c,64d) in a thin single crystal silicon substrate (49) between the source and drain regions (54,56,58). A polysilicon gate (52) overlies the N- channel and acts as a self-aligning mask during manufacture of the triode to precisely align the N+ and P+ doping to the polysilicon gate configuration.

Abstract: A magnetometer or magnetic field sensor includes semiconductor material deposited laterally on an insulating substrate. The semiconductor material is alternating regions of n- and p-type silicon provided with two cathodes, an anode and a triggering node. Upon application of a triggering pulse to a switch on the sensor, a carrier domain is formed. In the presence of a magnetic field this carrier domain is deflected to one side thus causing an imbalance in the current collected at the two cathodes.

Abstract: A magnetoresistor is monolithically integrated with an active circuit by growing a thin film magnetoresistor on a semiconductor substrate after the substrate has been doped and annealed for the active devices. The magnetoresistor is grown through a window in a mask, with the mask and magnetoresistor materials selected such that the magnetoresistor is substantially non-adherent to the mask. InSb is preferred for the magnetoresistor, Si.sub.3 N.sub.4 for the mask and GaAs for the substrate. The non-adherence allows the mask to be substantially thinner than the magnetoresistor without impairing the removal of the mask after the magnetoresistor has been established.

Abstract: A pyramid shaped etch is made in an n or p type silicon substrate, or any symmetric etch with slanted edges, with p or n type implants in the slanted edges of the etch to form a PN junction. On this structure, an emitter and two collectors are formed by further implanting n+ regions in the PN junction region. To complete the device, ohmic contacts are formed to establish a base region. In operation, an appropriate bias is applied to the emitter through to the base and collectors. By so biasing the device, the device operates as a standard bipolar transistor. The currents of both the minority and majority carriers in the base region will respond to the component of the magnetic field perpendicular to the face of the slanted etch. As a result, there will be a difference in the currents in the collectors. These currents can then be simply calibrated to measure the magnetic field component.

Abstract: A Hall effect sensor of two-dimensional electron gas type comprising, on an insulating substrate, a quantum well structure, a carrier injection layer adjacent to the quantum well structure, of thickness less than 250 .ANG. and having an density per unit area of donors integrated over the whole thickness of the carrier injection layer less than 5.times.10.sup.12 cm.sup.-2, an insulating burial layer deposited on the carrier injection layer, having a conduction band with an energy level greater than the Fermi energy of the sensor and a thickness greater than 200 .ANG.. Applicable to the field of electricity meters and current sensors.