Abstract: The present invention comprises a semi-insulating layer of GaAs with p+ and layers of aluminum gallium arsenide AlGaAs grown on one side of the semi-insulating GaAs and with p and n+ layers of AlGaAs grown on the other side of the semi-insulating GaAs. Ohmic contacts are grown on both sides of the thyristor as well as low temperature GaAs to provide for surface passivity.

Abstract: A photosensitive semi-conductor device is disclosed having a matrix of non-translucent dots on its photosensitive surface. In an array of photosensitive semi-conductor devices, such as photodiodes, the non-translucent dot pattern applied to this photosensitive surface of each photodiode is used to regulate the output from each photodiode. The dot matrix is preferably sputtered onto the anti-reflection coating of the photosensitive surface of the photodiode.

Abstract: A semiconductor integrated circuit device with a built-in photosensor is provided with a light shielding aluminum film which is formed on a whole surface of the semiconductor integrated circuit device continuously to prevent faulty operation of the semiconductor integrated circuit because of incident light. In order to reduce parasitic capacity generated between a light shielding aluminum film and a wiring for transmitting a high-frequency signal or other elements whereto a high-frequency signal is applied, a light shielding aluminum film is partially removed on the wiring and other elements as well as a photosensor and a pad.

Abstract: As semiconductor device includes a substrate and first and second semiconductor light receiving elements which are spaced apart and monolithically integrated on the substrate. The light receiving elements each has first and second terminals. A first flip-chip bonding pad is formed on the surface of the device and the device includes a first conductor element which electrically interconnects the first terminals of the elements in series and includes a centrally disposed portion that is electrically connected to the first flip-chip bonding pad. Second and third flip-chip bonding pads are also formed on a surface of the device and elongated electrodes are provided for electrically interconnecting the second terminal of the first light receiving element with the second flip-chip bonding pad and the second terminal of the second light receiving element with the third flip-chip bonding pad.

Abstract: In a semiconductor device having a metal electrode on a crystalline semiconductor surface, the metal electrode includes first portions electrically and mechanically connected to the surface and second portions mechanically separated from the surface and having configurations that easily deform. These first and second portions are alternatingly arranged on the surface. Accordingly, stress applied to the semiconductor beneath the electrode is reduced and deformation of the semiconductor element due to thermal stress is prevented, thereby preventing deterioration of element characteristics.

Abstract: An integrated photodiode is formed by providing a silicon substrate with a deep recessed tub in excess of about 20 microns, forming an isolated p-n junction on the peripheral tub surfaces, and selectively epitaxially filling the tub with intrinsic silicon. A desired monolithic integrated circuit is fabricated outside the tub periphery using conventional VLSI techniques. A photodiode electrode structure within the tub periphery can be fabricated at the same time as other monolithic circuit components are formed.

Abstract: A photoconductive switch coupled to an energy storage device wherein the tch is comprised of photoconductive semiconductor material while the energy storage device comprises two quasi-radial transmission line including a different material, i.e. a dielectric storage medium. The photoconductive semiconductor gallium arsenide switch is electrically connected to two quasi-radial transmission lines formed in part by layers of metallization configured in a quasi-radially shaped pattern upon the energy storage device. A variation comprises a photoconductive semiconductor gallium arsenide wafer sandwiched between two quasi-radial transmission lines so that the semiconductor gallium arsenide wafer serves as substrate, energy storage medium, and photoconductive switch.

Abstract: Each diode of an indium antimonide electro-optical detector array on a dielectric backing transparent to optical energy to be detected includes a junction that less than about a half micron from the diode surface on which the energy is initially incident. The optical energy is incident on a P-type doped region prior to being incident on a bulk N-type doped region. Both P- and N-type doped regions of adjacent diodes are spaced from each other. Metal electrically connects the P-type doped regions together without interfering substantially with the incident optical energy. A multiplexer integrated circuit substrate extends parallel to the backing and includes an array of elements for selective readout of the electric property of the diodes. The elements and diodes have approximately the same topographical arrangement so that corresponding ones of the elements and diodes are aligned. An array of indium columns or bumps connects the corresponding aligned elements and diodes.

Abstract: In a matrix array of photosensitive elements, each photosensitive point is provided with a photosensitive element (pin photodiode) in series with a capacitor between a row lead and a column lead. It is proposed to make use of a simplified photosensitive element in which an end semiconductor layer is suppressed such as, for example, the n-layer of a pin photodiode or the n-layer of a five-layer phototransistor of the nipin type. The dielectric of the capacitor then comes directly into contact with an intrinsic semiconductor layer in which electrons accumulate. These electrons reconstitute the equivalent of an n-type doped layer.

Abstract: A photosensitive device includes a semiconductor body (1) having a first region (2) of one conductivity type adjacent a given surface (3) of the body with a second region (4) of the opposite conductivity type surrounding the first region (2) so as to form with the first region a main pn junction (5) terminating at the given surface (3), the main pn junction (5) being reverse-biassed in operation of the device. One or more further regions (6) of the one conductivity type surround the main pn junction (5) adjacent the given surface (3) so that each further region (6) forms a photosensitive pn junction (17) with the second region (4), the further region(s) (6) lying within the spread of the depletion region of the main pn junction (5) when the main pn junction (5) is reverse-biassed in operation of the device so as to increase the breakdown voltage of the main pn junction (5).

Abstract: In a linear image sensor, a circuit region including a number of photosensitive elements is provided at a center zone of the chip in a longitudinal direction of an elongated semiconductor chip. Two groups of bonding pads are locally concentrated in opposite end zones of the elongated chip, respectively. A plurality of bonding stitches formed on a package for supporting the substrate are divided into two arrays which include substantially the same number of bonding stitches and which are located at both sides of the substrate. Thus, an empty area in the chip can be made as small as possible, and therefore, the chip size can be minimized.

Abstract: Each light-receiving element of an image sensor consists of a photodiode and a blocking diode which are connected in series such that their poles of the same type are connected to each other. Each of the photodiode and the blocking diode has, on a common base electrode, an ohmic contact layer, a photoconductive layer and a transparent electrode. The photodiode and the blocking diode are arranged side by side to extend along one direction. Two lead lines are connected to the respective transparent electrodes through holes formed in an insulating layer. Each lead line covers end portions of both the transparent electrodes of the photodiode and the blocking diode. Typically, the two transparent electrodes have an equal area.

Abstract: A semiconductor device constituting a light detection element in which a photoconductive layer is sandwiched between a transparent electrode and a metal electrode, in which the metal electrode has a lamination structure consisted by two different metals, one of the metals on the photoconductive layer side being formed of tantalum (Ta) or tungsten (W), the other of the metals being formed of titanium (Ti). Thereby, silicide is prevented from being formed in the interface to the photoconductive layer, so that the titanium (Ti) can be made to act as a good etching stopper at the time of patterning the photoconductive layer by etching, and since titanium (Ti) which has high electrolytic-corrosion-proof is used as the metal electrode, it is possible to obtain a semiconductor device having high reliability.

Abstract: A thin film phototransistor is provided having a field effect transistor structure where at least one end of the gate electrode is not overlapped with an electrode neighboring the end. Such a thin film phototransistor has: (1) a function as a photosensor and a switching function; (2) a high input impedance; (3) a voltage control function; and (4) a high photocurrent ON/OFF ratio. This thin film phototransistor can be used independently or together with a thin film transistor for picture elements of a one-dimensional or two-dimensional photosensor array, producing satisfactory results.

Abstract: A low capacitance radiation detector comprises a monocrystalline silicon substrate heavily doped to N type conductivity with a more lightly doped N type conductivity epitaxial layer formed on the substrate. A plurality of heavily doped N type upper surface layer segments are formed in the epitaxial layer. A patterned region of the epitaxial layer, heavily doped to P type conductivity and in the shape of parallel stripes joined at each end by a respective stripe perpendicular to the parallel stripes, is formed in the epitaxial layer and situated between adjacent ones of the upper surface layer segments, with each stripe extending into the epitaxial layer deeper than, and separated from, the upper surface layer segments so as to form a minority charge carrier-collecting PN junction with the epitaxial layer.

Abstract: A semiconductor wafer including a plurality of chips having respective portions to be etched electrochemically with application of an electric voltage to the semiconductor wafer immersed in an etching solution. The semiconductor wafer includes electric circuits formed therein for controlling electric energy applied to the respective portions.