Electromagnetic Or Particle Radiation Patents (Class 257/428)
  • Patent number: 11004799
    Abstract: A package structure and the method thereof are provided. The package structure includes a conductive plate, a semiconductor die, a molding compound, and antenna elements. The conductive plate has a first surface, a second surface and a sidewall connecting the first surface and the second surface. The semiconductor die is located on the second surface of the conductive plate. The molding compound laterally encapsulates the semiconductor die and covers the sidewall and a portion of the second surface exposed by the semiconductor die, wherein the first surface of the conductive plate is coplanar with a surface of the molding compound. The antenna elements are located over the first surface of the conductive plate.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: May 11, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Chiang Wu, Chen-Hua Yu, Kuo-Chung Yee
  • Patent number: 11004810
    Abstract: A semiconductor package structure including an encapsulation body, an RFIC chip, a first antenna structure, and a second antenna structure is provided. The RFIC chip may be embedded in the encapsulation body. The first antenna structure may be disposed at a lateral side of the RFIC chip, electrically connected to the RFIC chip, and include a first conductor layer and a plurality of first patches opposite to the first conductor layer. The second antenna structure may be stacked on the RFIC chip, electrically connected to the RFIC chip, and include a second conductor layer and a plurality of second patches opposite to the second conductor layer. The first patches and the second patches are located at a surface of the encapsulation body. A first distance between the first conductor layer and the first patches is different from a second distance between the second conductor layer and the second patches.
    Type: Grant
    Filed: December 15, 2019
    Date of Patent: May 11, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Chiang Wu, Chun-Lin Lu, Chao-Wen Shih, Han-Ping Pu, Nan-Chin Chuang
  • Patent number: 10989749
    Abstract: An apparatus for detecting a condition or authenticity of one or more electronic devices includes an enclosure having an antenna integrated therewithin, a fixture mounted within a hollow interior of the enclosure, the fixture being configured to receive the one or more electronic devices and connect one or more signals to each of the one or more electronic devices and a sensor and controller assembly connected to the antenna and configured to process a signature of an emission of a radiofrequency (RF) energy from of one or more electronic devices having the one or more signals connected thereto.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: April 27, 2021
    Assignee: NOKOMIS, INC.
    Inventors: Walter John Keller, III, Andrew Richard Portune, Todd Eric Chornenky, William Anthony Davis
  • Patent number: 10983010
    Abstract: The present disclosure is an infrared sensor capable of being integrated into a IR focal plane array. It includes of a CMOS based readout circuit with preamplification, noise filtering, and row/column address control. Using either a microbolometer device structure with either a thermal sensing element of vanadium oxide or amorphous silicon, a nanocomposite is fabricated on top of either of these materials comprising aligned or unaligned carbon nanotube films with IR transmissive layer of silicon nitride followed by one to five monolayers of graphene. These layers are connected in series minimizing the noise sources and enhancing the NEDT of each film. The resulting IR sensor is capable of NEDT of less than 1 mK. The wavelength response is from 2 to 12 microns. The approach is low cost using a process that takes advantage of the economies of scale of wafer level CMOS.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: April 20, 2021
    Assignee: Magnolia Optical Technologies, Inc.
    Inventors: Ashok K. Sood, Elwood J. Egerton
  • Patent number: 10971825
    Abstract: An antenna module includes: an integrated circuit (IC) configured to generate a radio frequency (RF) signal; and a substrate including an antenna portion providing a first surface of the substrate, and a circuit pattern portion providing a second surface of the substrate. The antenna portion includes first antenna members configured to transmit the RF signal, cavities corresponding to the first antenna members, through vias respectively disposed in the cavities and respectively electrically connected to the first antenna members, and a plating member disposed in at least one cavity among the cavities. The circuit pattern portion includes a circuit pattern and an insulating layer forming, for each of the through vias, an electrical connection path to the IC.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: April 6, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ho Kyung Kang, ThomasA Kim
  • Patent number: 10964652
    Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a circuit layer, a first package body, a first antenna and an electronic component. The circuit layer has a first surface and a second surface opposite to the first surface. The first package body is disposed on the first surface of the circuit layer. The first antenna penetrates the first package body and is electrically connected to the circuit layer. The electronic component is disposed on the second surface of the circuit layer.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: March 30, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chien-Hua Chen, Sheng-Chi Hsieh
  • Patent number: 10867939
    Abstract: A package structure includes a semiconductor die, an insulating encapsulant, a first redistribution layer, a second redistribution layer, antenna elements and a first insulating film. The insulating encapsulant is encapsulating the at least one semiconductor die, the insulating encapsulant has a first surface and a second surface opposite to the first surface. The first redistribution layer is disposed on the first surface of the insulating encapsulant. The second redistribution layer is disposed on the second surface of the insulating encapsulant. The antenna elements are located over the second redistribution layer. The first insulating film is disposed in between the second redistribution layer and the antenna elements, wherein the first insulating film comprises a resin rich region and a filler rich region, the resin rich region is located in between the filler rich region and the second redistribution layer and separating the filler rich region from the second redistribution layer.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Yu Kuo, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu, Yi-Yang Lei, Wei-Jie Huang
  • Patent number: 10804171
    Abstract: Disclosed in the present invention are a sensor packaging structure and a manufacturing method thereof. The sensor packaging structure includes a protection board, a circuit structure and a filling structure. A front surface of the circuit structure is connected to a first surface of the protection board. A second surface of the protection board is used as a sensing function surface. The filling structure is located on the outer periphery of the circuit structure and connected to the first surface of the protection board. The sensor packaging structure of the present invention uses the protection board as a protection layer of the functional circuit, which can effectively protect the functional circuit of the sensor. Meanwhile, the protection board is first connected to the circuit structure in the manufacturing method to avoid tolerance accumulation, increasing the manufacturing accuracy of the protection layer.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: October 13, 2020
    Assignee: MICROARRAY MICROELECTRONICS CORP., LTD.
    Inventors: Yangyuan Li, Shaobo Ding
  • Patent number: 10797195
    Abstract: The invention relates to semiconductor devices for converting ionizing radiation into an electrical signal. The present ionizing radiation sensor has an n+-i-p+ structure, produced using the planar process. The sensor contains an i-region in the form of a high-resistivity substrate of high-purity float-zone silicon with p-type conductivity, having on its front face n+-regions (2, 3), an SiO2 layer (4), aluminium metallization (5), and a passivation layer. On the front face of the substrate (1) n-regions (2) are formed by ion implantation; a masking layer of SiO2 (layer 4) is grown; aluminium metallization (5) is deposited; and a passivation layer (6) is applied.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: October 6, 2020
    Inventors: Vladimir Aleksandrovich Elin, Mikhail Moiseevich Merkin
  • Patent number: 10797100
    Abstract: An imaging device includes a semiconductor substrate, pixels, a charge detector, charge storage portions, an output gate portion and a shift gate portion. The pixels and the charge detector are provided in the semiconductor substrate. The charge storage portions are provided on the charge detector side of the pixels, and linked to the pixels. The output gate portion is positioned between the charge detector and the charge storage portions, and includes charge transfer channels extending in a radial configuration in directions from the charge detector toward the pixels. The shift gate portion is positioned between one charge storage portion and one charge transfer channel. The shift gate portion includes a gate electrode provided on the semiconductor substrate. A planar configuration of the gate electrode has a side orthogonal to the extending direction of the one charge transfer channels, the side being most proximal to the one charge transfer channel.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: October 6, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Ryuta Inobe
  • Patent number: 10707173
    Abstract: A package structure and the method thereof are provided. The package structure includes a conductive plate, a semiconductor die, a molding compound, and antenna elements. The conductive plate has a first surface, a second surface and a sidewall connecting the first surface and the second surface. The semiconductor die is located on the second surface of the conductive plate. The molding compound laterally encapsulates the semiconductor die and covers the sidewall and a portion of the second surface exposed by the semiconductor die, wherein the first surface of the conductive plate is coplanar with a surface of the molding compound. The antenna elements are located over the first surface of the conductive plate.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: July 7, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai-Chiang Wu, Chen-Hua Yu, Kuo-Chung Yee
  • Patent number: 10672728
    Abstract: An integrated fan-out (InFO) package includes a first redistribution structure, a plurality of dies, a plurality of first conductive structures, an encapsulant, a second redistribution structure, and insulating layer, a plurality of second conductive structures, an antenna confinement structure, and a slot antenna. The dies and the first conductive structures are disposed on the first redistribution structure. The first conductive structures surround the dies. The encapsulant encapsulates the dies and the first conductive structures. The second redistribution structure is disposed on the dies, the first conductive structures, and the encapsulant. The insulating layer is over the second redistribution structure. The second conductive structures and the antenna confinement structure are embedded in the insulating layer. The slot antenna is disposed on the insulating layer.
    Type: Grant
    Filed: November 22, 2018
    Date of Patent: June 2, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chuei-Tang Wang, Tzu-Chun Tang, Chieh-Yen Chen, Che-Wei Hsu
  • Patent number: 10674100
    Abstract: The present disclosure relates to an imaging device, a driving method, and an electronic apparatus that can capture an image with a higher dynamic range. The imaging device includes a pixel region in which pixels are arranged, the pixels each including a photoelectric conversion unit that converts incident light into electric charges through electric conversion and stores the electric charges, and two or more charge storage units that store the electric charges transferred from the photoelectric conversion unit, and a drive unit that drives the pixels. The drive unit drives each pixel to cause the photoelectric conversion unit to repeatedly transfer electric charges with different exposure times to the two or more charge storage units during the light reception period of one frame. The present technology can be applied to an imaging device capable of capturing an HDR image, for example.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: June 2, 2020
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Isao Hirota
  • Patent number: 10658220
    Abstract: A device transferring method for transferring a plurality of devices to a mounting substrate provided with a plurality of electrodes includes: a step of adhering an expandable tape to the plurality of devices formed on a front surface side of a substrate through a buffer layer; a step of applying a laser beam to the buffer layer from a back surface side of the substrate, to break the buffer layer; a step of moving the tape in a direction for spacing away from the substrate to separate the substrate and the plurality of devices from each other, thereby transferring the plurality of devices to the tape; a step of expanding the tape in such a manner that the layout of the plurality of devices corresponds to the layout of the plurality of electrodes; and a step of bonding the plurality of devices to the plurality of electrodes at once.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: May 19, 2020
    Assignee: DISCO CORPORATION
    Inventors: Tasuku Koyanagi, Akihito Kawai
  • Patent number: 10622544
    Abstract: A composite substrate production method of the invention includes (a) a step of mirror polishing a substrate stack having a diameter of 4 inch or more, the substrate stack including a piezoelectric substrate and a support substrate bonded to each other, the mirror polishing being performed on the piezoelectric substrate side until the thickness of the piezoelectric substrate reaches 3 ?m or less; (b) a step of creating data of the distribution of the thickness of the mirror-polished piezoelectric substrate; and (c) a step of performing machining with an ion beam machine based on the data of the thickness distribution so as to produce a composite substrate have some special technical features.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: April 14, 2020
    Assignee: NGK INSULATORS, LTD.
    Inventors: Yuji Hori, Tomoyoshi Tai, Mitsuo Ikejiri
  • Patent number: 10491847
    Abstract: An example sensor for image capturing may include a pixel array including a plurality of pixels; a read-out circuit configured to receive an analog electrical signal output from each of the plurality of pixels, convert the analog electrical signal into a digital electrical signal, and output the digital electrical signal; and a memory temporarily storing the digital electrical signal output from the read-out circuit and outputting at least part of the temporarily stored digital electrical signal to an external circuit.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: November 26, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Soo Kim, Hwa-Young Kang, Yeo-Tak Youn, Young-Kwon Yoon, Jong-Hun Won, Ki-Huk Lee
  • Patent number: 10473709
    Abstract: An integrated circuit chip stack includes a main integrated circuit chip and at least one auxiliary integrated circuit chip. The main integrated circuit chip contains circuit components to be protected. The auxiliary integrated circuit chip is mounted to a surface of the main integrated circuit chip and includes a metal plane connected to ground located opposite the circuit components to be protected. The auxiliary integrated circuit chip further includes at least one insulated conductive track forming a tight pattern opposite the circuit components to be protected. A detection circuit is connected to the at least one conductive track and is configured to detect interruption of the at least one insulated conductive track.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: November 12, 2019
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Alexandre Sarafianos, Thomas Ordas
  • Patent number: 10374128
    Abstract: An optoelectric device can comprise a substrate and at least one junction configured to provide an active region within the substrate. Additionally, the device can comprise a metal-mesh semiconductor electrical contact structure attached to a surface of the substrate. The metal-mesh semiconductor electrical contact structure can further comprise a mesh line width, a mesh opening size, and a mesh thickness.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: August 6, 2019
    Assignee: Terahertz Device Corporation
    Inventor: Mark S. Miller
  • Patent number: 10276496
    Abstract: Methods and apparatus are disclosed for manufacturing metal contacts under ground-up contact pads within a device. A device may comprise a bottom metal layer with a bottom metal contact, a top metal layer with a top metal contact, and a plurality of middle metal layers. Any given metal layer of the plurality of middle metal layers comprises a metal contact, the metal contact is substantially vertically below the top metal contact, substantially vertically above the bottom metal contact, and substantially vertically above a metal contact in any metal layer that is below the given metal layer. The metal contacts may be of various and different shapes. All the metal contacts in the plurality of middle metal layers and the bottom metal contact may be smaller than the top metal contact, therefore occupying less area and saving more area for other functions such as device routing.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsien-Wei Chen, Ching-Jung Yang, Chia-Wei Tu
  • Patent number: 10264197
    Abstract: The present disclosure relates to an imaging device, a driving method, and an electronic apparatus that can capture an image with a higher dynamic range. The imaging device includes: a pixel region in which pixels are arranged, the pixels each including a photoelectric conversion unit that converts incident light into electric charges through electric conversion and stores the electric charges, and two or more charge storage units that store the electric charges transferred from the photoelectric conversion unit; and a drive unit that drives the pixels. The drive unit drives each pixel to cause the photoelectric conversion unit to repeatedly transfer electric charges with different exposure times to the two or more charge storage units during the light reception period of one frame. The present technology can be applied to an imaging device capable of capturing an HDR image, for example.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: April 16, 2019
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Isao Hirota
  • Patent number: 10199317
    Abstract: An electronic package includes a circuit structure having a first metal layer, a packaging layer formed on the circuit structure, and a second metal layer formed on the packaging layer and separated from the first metal layer at a distance. The first metal layer and the second metal layer constitute an antenna structure. Since the second metal layer is formed on a portion of a surface of the packaging layer, a propagating wave emitted by the first metal layer cannot pass through the second metal layer, but a surface of the packaging layer not covered by the second metal layer. Therefore, the propagating wave can be transmitted to a predetermined target, and the electronic package performs the function of an antenna.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: February 5, 2019
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Chia-Yang Chen, Ying-Wei Lu, Jyun-Yuan Jhang, Ming-Fan Tsai
  • Patent number: 9851386
    Abstract: An apparatus for detecting a condition or authenticity of one or more electronic devices includes an enclosure having an antenna integrated therewithin, a fixture mounted within a hollow interior of the enclosure, the fixture being configured to receive the one or more electronic devices and connect one or more signals to each of the one or more electronic devices and a sensor and controller assembly connected to the antenna and configured to process a signature of an emission of a radiofrequency (RF) energy from of one or more electronic devices having the one or more signals connected thereto.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: December 26, 2017
    Assignee: NOKOMIS, INC.
    Inventors: Walter John Keller, III, Andrew Richard Portune, Todd Eric Chornenky, William Anthony Davis
  • Patent number: 9820394
    Abstract: According to one embodiment, a circuit board attachment structure comprise a housing to which the circuit board is attached, a mount provided on the housing and provided outside a portion of the housing where the circuit board is attached, a holding piece extending from the mount to and on the circuit board and sandwiching the circuit board with the housing, and a conductive gasket contacting the circuit board. The gasket is provided at least in a region where the circuit board is sandwiched between the holding piece and the housing, and the gasket is pressed between the holding piece and the housing, and the circuit board and the housing is electrically connected to each other via the pressed gasket.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: November 14, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiromichi Suzuki, Masataka Tokoro
  • Patent number: 9787412
    Abstract: Aspects of the subject disclosure may include, for example, a system for generating electromagnetic waves having a fundamental wave mode, and directing the electromagnetic waves to an interface of a transmission medium for guiding propagation of the electromagnetic waves. Other embodiments are disclosed.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: October 10, 2017
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: Paul Shala Henry, Robert Bennett, Farhad Barzegar, Irwin Gerszberg, Donald J Barnickel, Thomas M. Willis, III
  • Patent number: 9733357
    Abstract: Disclosed are various embodiments of an infrared proximity sensor package comprising an infrared transmitter die, an infrared receiver die, a housing comprising sidewalls, a first recess, a second recess, a partitioning divider disposed between the first and second recesses, and an overlying shield comprising an infrared-absorbing material. The transmitter die is positioned in the first recess, and the receiver die is positioned within the second recess. The partitioning divider comprises liquid crystal polymer (LCP) such that the partitioning divider and the infrared-absorbing material of the shield cooperate together to substantially attenuate and absorb undesired infrared light that might otherwise become internally-reflected within the housing or incident upon the receiver as a false proximity or object detection signal.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: August 15, 2017
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: James Costello, Wee Sin Tan
  • Patent number: 9728838
    Abstract: Approaches for an on-chip antenna are provided. A method includes forming an antenna in an insulator layer at a front side of a substrate. The method also includes forming a trench in the substrate underneath the antenna. The method further includes forming a fill material in the trench. The substrate is composed of a material having a first dielectric constant. The fill material has a second dielectric constant that is less than the first dielectric constant.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: August 8, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Hanyi Ding, Mark D. Jaffe, Alvin J. Joseph, Anthony K. Stamper
  • Patent number: 9685249
    Abstract: Provided is a beta voltaic battery including a first semiconductor layer, a second semiconductor layer, and a beta-ray generator which is disposed between the first semiconductor layer and the second semiconductor layer and includes a metal substrate having both sides coated with a radioisotope layer. The beta voltaic battery according to the present invention has no sealing layer, but may efficiently shield beta rays through a sandwich structure. Since the sealing layer is absent, the absorption of beta rays by the semiconductor may be improved, and excellent energy conversion efficiency may be obtained because output is improved due to the two semiconductor layers and the radioisotope ray source coated on the both sides.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: June 20, 2017
    Assignees: KOREA ATOMIC ENERGY RESEARCH INSTITUTE, Electronics and Telecommunications Research Institute
    Inventors: Young Rang Uhm, Kwang Jae Son, Sung-Weon Kang, Kyung-Hwan Park, Byoung-Gun Choi
  • Patent number: 9666634
    Abstract: In various example embodiments, the inventive subject matter is an image sensor and methods of formation of image sensors. In an embodiment, the image sensor comprises a semiconductor substrate and a plurality of pixel regions. Each of the pixel regions includes an optically sensitive material over the substrate with the optically sensitive material positioned to receive light. A pixel circuit for each pixel region is also included in the sensor. Each pixel circuit comprises a charge store formed on the semiconductor substrate and a read out circuit. A non-metallic contact region is between the charge store and the optically sensitive material of the respective pixel region, the charge store being in electrical communication with the optically sensitive material of the respective pixel region through the non-metallic contact region.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: May 30, 2017
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Igor Constantin Ivanov, Edward Hartley Sargent
  • Patent number: 9577123
    Abstract: Provided are nanostructures and optical devices having the nanostructures. The nanostructure may include a carbon nanomaterial layer, a nanopattern formed on the carbon nanomaterial layer, and a metal layer formed on a surface of the nanopattern. The nanostructure may be formed in a ring shape, and the metal layer may include a plurality of metal layers formed of different metals.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: February 21, 2017
    Assignees: SAMSUNG ELECTRONICS CO., LTD., UNIST (Ulsan National Institute of Science and Technology)
    Inventors: Unjeong Kim, Younggeun Roh, Jineun Kim, Soojin Park, Yeonsang Park, Chanwook Baik, Seungmin Yoo, Jaesoong Lee, Sangmo Cheon
  • Patent number: 9509415
    Abstract: Aspects of the subject disclosure may include, for example, a system for generating electromagnetic waves having a fundamental wave mode, and directing the electromagnetic waves to an interface of a transmission medium for guiding propagation of the electromagnetic waves. Other embodiments are disclosed.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: November 29, 2016
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: Paul Shala Henry, Robert Bennett, Farhad Barzegar, Irwin Gerszberg, Donald J Barnickel, Thomas M. Willis, III
  • Patent number: 9502688
    Abstract: Provided are an organic light emitting display apparatus and a method of manufacturing the same. The organic light emitting display apparatus includes: a thin film transistor (TFT) substrate including a plurality of thin film transistors, an organic light-emissive device on the TFT substrate, and an encapsulation layer on the TFT substrate and the organic light-emissive device, the encapsulation layer being configured to cover the organic light-emissive device, the encapsulation layer including a hybrid material including: a block copolymer, and functionalized graphene.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: November 22, 2016
    Assignee: LG Display Co., Ltd.
    Inventor: Jong Hyun Park
  • Patent number: 9412781
    Abstract: The present disclosure relates to a method the present disclosure relates to an active pixel sensor having a gate dielectric protection layer that reduces damage to an underlying gate dielectric layer during fabrication, and an associated method of formation. In some embodiments, the active pixel sensor has a photodetector disposed within a semiconductor substrate. A transfer transistor having a first gate structure is located on a first gate dielectric layer disposed above the semiconductor substrate. A reset transistor having a second gate structure is located on the first gate dielectric layer. A gate dielectric protection layer is disposed onto the gate oxide at a position extending between the first gate structure and the second gate structure and over the photodetector. The gate dielectric protection layer protects the first gate dielectric layer from etching procedures during fabrication of the active pixel sensor.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: August 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Hsien Chou, Wen-I Hsu, Tsun-Kai Tsao, Chih-Yu Lai, Jiech-Fun Lu, Yeur-Luen Tu
  • Patent number: 9266437
    Abstract: A betavoltaic power source for transportation devices and applications is disclosed, wherein the device having a stacked configuration of isotope layers and energy conversion layers. The isotope layers have a half-life of between about 0.5 years and about 5 years and generate radiation with energy in the range from about 15 keV to about 200 keV. The betavoltaic power source is configured to provide sufficient power to operate the transportation device over its useful lifetime.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: February 23, 2016
    Assignee: Ultratech, Inc.
    Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk
  • Patent number: 9035410
    Abstract: An avalanche photodiode detector is provided. The avalanche photodiode detector comprises an absorber region having an absorption layer for receiving incident photons and generating charged carriers; and a multiplier region having a multiplication layer; wherein the multiplier region is on a mesa structure separate from the absorber region and is coupled to the absorber region by a bridge for transferring charged carriers between the absorber region and multiplier region.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: May 19, 2015
    Assignee: THE BOEING COMPANY
    Inventors: Ping Yuan, Joseph C. Boisvert, Dmitri D. Krut, Rengarajan Sudharsanan
  • Publication number: 20150129999
    Abstract: The method of wafer-scale integration of semiconductor devices comprises the steps of providing a semiconductor wafer (1), a further semiconductor wafer (2), which differs from the first semiconductor wafer in at least one of diameter, thickness and semiconductor material, and a handling wafer (3), arranging the further semiconductor wafer on the handling wafer, and bonding the further semiconductor wafer to the semiconductor wafer. The semiconductor device may comprise an electrically conductive contact layer (6) arranged on the further semiconductor wafer (2) and a metal layer connecting the contact layer with an integrated circuit.
    Type: Application
    Filed: April 5, 2013
    Publication date: May 14, 2015
    Inventors: Cathal Cassidy, Joerg Siegert, Franz Schrank
  • Publication number: 20150129747
    Abstract: A photodiode architecture comprises first, second, and third independent photodiodes, and a shared electrode. The first, second, and third photodiodes are each connected to respective sources of bias voltage and to a common shared electrode, whereby the photodiode architecture comprises at least one of a shared anode and shared cathode photodiode architecture. The photodiode architecture selectively reverse biases the first, second, and third photodiodes so that, during operation, at least one of the first, second and third photodiodes is always operating in a photoconducting mode, to enable capture and storage of charge from any photodiode in the architecture operating in photoconducting mode. Advantageously, the first photodiode can be configured to respond to a first wavelength of light and at least one of the second and third photodiodes can be configured to be responsive to a respective second or third wavelength of light shorter than the first wavelength of light.
    Type: Application
    Filed: November 12, 2014
    Publication date: May 14, 2015
    Applicant: INTRINSIX CORPORATION
    Inventor: Eugene M. Petilli
  • Publication number: 20150129668
    Abstract: A chip package includes a set of layers including conductive planes connected by vias. A first portion has at least one antenna, antenna ground plane, and first grounded vias. A second portion has a conductive plane parallel to the ground plane that forms an interface for connecting to at least one integrated circuit device. A third portion between the first and the second portion has a vertical transmission line that includes a signal via connecting the antenna feed line to the at least one integrated circuit and a parallel-plate mode suppression mechanism. The parallel-plate mode suppression mechanism includes a grounded reflector that forms a cage with the grounded vias around an antenna region and further includes second ground vias surrounding the signal via.
    Type: Application
    Filed: January 23, 2015
    Publication date: May 14, 2015
    Inventors: DONG G. KAM, DUIXIAN LlU, SCOTT K. REYNOLDS
  • Patent number: 9029252
    Abstract: A nanostructure, an optical device including the nanostructure, and methods of manufacturing the nanostructure and the optical device. A method of manufacturing a nanostructure may include forming a block copolymer template layer and a precursor pattern of metal coupled to the block copolymer template layer on a graphene layer, and forming a metal nanopattern on the graphene layer by removing the block copolymer template layer and reducing the precursor pattern.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: May 12, 2015
    Assignees: Samsung Electronics Co., Ltd., Unist Academy—Industry Research Corporation
    Inventors: Un-jeong Kim, Jin-eun Kim, Young-geun Roh, Soo-jin Park, Yeon-sang Park, Seung-min Yoo, Chang-won Lee, Jae-soong Lee, Sang-mo Cheon
  • Patent number: 9024344
    Abstract: A semiconductor device has a multilayer doping to provide improved passivation by quantum exclusion. The multilayer doping includes at least two doped layers fabricated using MBE methods. The dopant sheet densities in the doped layers need not be the same, but in principle can be selected to be the same sheet densities or to be different sheet densities. The electrically active dopant sheet densities are quite high, reaching more than 1×1014 cm?2, and locally exceeding 1022 per cubic centimeter. It has been found that silicon detector devices that have two or more such dopant layers exhibit improved resistance to degradation by UV radiation, at least at wavelengths of 193 nm, as compared to conventional silicon p-on-n devices.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: May 5, 2015
    Assignee: California Institute of Technology
    Inventor: Michael E. Hoenk
  • Patent number: 9024363
    Abstract: In a photoelectric conversion apparatus including a charge holding portion, a part of an element isolation region contacting with a semiconductor region constituting the charge holding portion extends from a reference surface including the light receiving surface of a photoelectric conversion element into a semiconductor substrate at a level equal to or deeper than the depth of the semiconductor region in comparison with the semiconductor region.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: May 5, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takanori Watanabe
  • Publication number: 20150115381
    Abstract: Embodiments of mechanisms of forming a radio frequency area of an integrated circuit are provided. The radio frequency area of an integrated circuit structure includes a substrate, a buried oxide layer formed over the substrate, and an interface layer formed between the substrate and the buried oxide layer. The radio frequency area of an integrated circuit structure also includes a silicon layer formed over the buried oxide layer and an interlayer dielectric layer formed in a deep trench. The radio frequency area of an integrated circuit structure further includes the interlayer dielectric layer extending through the silicon layer, the buried oxide layer and the interface layer. The radio frequency area of an integrated circuit structure includes an implant region formed below the interlayer dielectric layer in the deep trench and a polysilicon layer formed below the implant region.
    Type: Application
    Filed: October 31, 2013
    Publication date: April 30, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuo-Yu CHENG, Keng-Yu CHEN, Wei-Kung TSAI, Kuan-Chi TSAI, Tsung-Yu YANG, Chung-LONG CHANG, Chun-Hung CHEN, Chih-Ping CHAO
  • Patent number: 9018080
    Abstract: A wafer processing method of dividing a wafer along a plurality of crossing streets formed on the wafer to obtain individual chips. The wafer processing method includes a modified layer forming step of applying a laser beam having a transmission wavelength to the wafer along each street to thereby form a modified layer inside the wafer and a dividing step of applying an external force to the wafer to thereby divide the wafer into the individual chips along each street with the modified layer functioning as a division start point. In the modified layer forming step, the modified layer is formed at each intersection of the crossing streets at a height where cracking can be avoided on the corner edges of each chip obtained by dividing the wafer.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: April 28, 2015
    Assignee: Disco Corporation
    Inventor: Kenji Furuta
  • Patent number: 9018721
    Abstract: In one preferred embodiment, a semiconductor photodiode is provided which includes a substrate layer fabricated from a Si32 radioisotope of a first type of conductivity material and a thick-field oxide layer formed on the substrate layer. The oxide layer has a selectively patterned area to form an open region on the substrate layer. The semiconductor photodiode further includes a dopant material of a second conductivity material, which is different from the first conductivity material. The dopant material is formed within the open region on the substrate layer to form a photodiode junction. The semiconductor photodiode further includes an enclosure package enclosing the semiconductor diode for containing any radiation from the radioisotope.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: April 28, 2015
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Bryan George Moosman, Richard Lee Waters
  • Patent number: 9018723
    Abstract: The present disclosure is directed to an infrared sensor that includes a plurality of pairs of support structures positioned on the substrate, each pair including a first support structure adjacent to a second support structure. The sensor includes plurality of pixels, where each pixel is associated with one of the pairs of support structures. Each pixel includes a first infrared reflector layer on the substrate between the first and the second support structures, a membrane formed on the first and second support structures, a thermally conductive resistive layer on the membrane and positioned above the first infrared reflector layer, a second infrared reflector layer on the resistive layer, and an infrared absorption layer on the second infrared reflector layer.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: April 28, 2015
    Assignee: STMicroelectronics Pte Ltd
    Inventors: Olivier Le Neel, Ravi Shankar, Tien Choy Loh
  • Patent number: 9018535
    Abstract: A touch panel includes a touch sensor layer including a first transparent electrode and a second transparent electrode, wherein an arrangement direction of the first transparent electrode can be perpendicular to that of the second transparent electrode, and both of the first and second transparent electrodes include two transparent metallic patterns which are stacked and electrically connected to each other.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: April 28, 2015
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Guang-Yi Zeng, Liang-Hao Kang, Yi-Cheng Tsai
  • Publication number: 20150107667
    Abstract: In accordance with certain embodiments, semiconductor dies are at least partially coated with a polymer and a conductive adhesive prior being bonded to a substrate having electrical traces thereon.
    Type: Application
    Filed: October 24, 2014
    Publication date: April 23, 2015
    Inventor: Michael A. Tischler
  • Patent number: 9012883
    Abstract: A semiconductor nanowire device includes at least one semiconductor nanowire having a bottom surface and a top surface, an insulating material which surrounds the semiconductor nanowire, and an electrode ohmically contacting the top surface of the semiconductor nanowire. A contact of the electrode to the semiconductor material of the semiconductor nanowire is dominated by the contact to the top surface of the semiconductor nanowire.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: April 21, 2015
    Assignee: Sol Voltaics AB
    Inventors: Ingvar Åberg, Martin Magnusson, Damir Asoli, Lars Ivar Samuelson, Jonas Ohlsson
  • Publication number: 20150091113
    Abstract: This invention relates to a direct conversion X-ray sensor and to a method of manufacturing the same. This X-ray sensor includes an array substrate including a pixel electrode formed so as to protrude from a surface thereof at a pixel region; a photoconductive substrate including an upper electrode, and a photoconductive layer formed on a surface of the upper electrode so as to be in contact with the pixel electrode and having a PIN diode structure; and a bonding material filling a space around a contact region of the pixel electrode and the photoconductive layer so as to bond the array substrate and the photoconductive substrate.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 2, 2015
    Inventors: Sung Kyn HEO, Ho Seok LEE
  • Publication number: 20150085978
    Abstract: An image sensor for capturing X-ray image data and optical image data includes an X-ray absorption layer and a plurality of photodiodes disposed in a semiconductor layer. The X-ray absorption layer is configured to emit photons in response to receiving X-ray radiation. The plurality of photodiodes disposed in the semiconductor layer is optically coupled to receive image light to generate the optical image data, and is optically coupled to receive photons from the X-ray absorption layer to generate X-ray image data.
    Type: Application
    Filed: September 23, 2013
    Publication date: March 26, 2015
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Dominic Massetti, Yu Zheng
  • Patent number: 8987851
    Abstract: The invention provides a radio-frequency (RF) device package and a method for fabricating the same. An exemplary embodiment of a radio-frequency (RF) device package includes a base, wherein a radio-frequency (RF) device chip is mounted on the base. The RF device chip includes a semiconductor substrate having a front side and a back side. A radio-frequency (RF) component is disposed on the front side of the semiconductor substrate. An interconnect structure is disposed on the RF component, wherein the interconnect structure is electrically connected to the RF component, and a thickness of the semiconductor substrate is less than that of the interconnect structure. A through hole is formed through the semiconductor substrate from the back side of the semiconductor substrate, and is connected to the interconnect structure. A TSV structure is disposed in the through hole.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: March 24, 2015
    Assignee: MediaTek Inc.
    Inventors: Ming-Tzong Yang, Cheng-Chou Hung, Tung-Hsing Lee, Wei-Che Huang, Yu-Hua Huang