Electromagnetic Or Particle Radiation Patents (Class 257/428)
  • Patent number: 11430825
    Abstract: An image capturing assembly includes an encapsulation layer, embedded with functional components. The top surface and bottom surface of the encapsulation layer expose the functional components. A through hole is formed in the encapsulation layer; and the functional components have soldering pads facing away from a bottom of the encapsulation layer. A photosensitive unit including a photosensitive chip and an optical filter is mounted on the photosensitive chip. The photosensitive chip is embedded in the through hole; the optical filter is outside the through hole; the top surface and bottom surface of the encapsulation layer expose the photosensitive chip; and the photosensitive chip includes soldering pads facing away from the bottom of the encapsulation layer. A redistribution layer structure is on the top side of the encapsulation layer and electrically connects the soldering pads of the photosensitive chip with the soldering pads of the functional components.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: August 30, 2022
    Assignee: Ningbo Semiconductor International Corporation
    Inventors: Da Chen, Mengbin Liu
  • Patent number: 11415713
    Abstract: A product includes a transparent scintillator material, a beta emitter material having an end-point energy of greater than 225 kiloelectron volts (keV), and a photovoltaic portion configured to convert light emitted by the scintillator material to electricity.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: August 16, 2022
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Joshua Jarrell, Nerine Cherepy, John Winter Murphy, Rebecca J. Nikolic, Erik Lars Swanberg, Jr.
  • Patent number: 11340398
    Abstract: A waveguide structure includes a first surface having a first width, a second surface having a second width, the second surface being opposite to the first surface, and a sidewall surface connecting the first surface and the second surface. The first width is greater than the second width.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: May 24, 2022
    Assignee: ARTILUX, INC.
    Inventors: Szu-Lin Cheng, Chien-Yu Chen, Han-Din Liu, Chia-Peng Lin, Chung-Chih Lin, Yun-Chung Na, Pin-Tso Lin, Tsung-Ting Wu, Yu-Hsuan Liu, Kuan-Chen Chu
  • Patent number: 11315976
    Abstract: A solid-state imaging device includes a pixel having a photoelectric conversion element which generates a charge in response to incident light, a first transfer gate which transfers the charge from the photoelectric conversion element to a charge holding section, and a second transfer gate which transfers the charge from the charge holding section to a floating diffusion. The first transfer gate includes a trench gate structure having at least two trench gate sections embedded in a depth direction of a semiconductor substrate, and the charge holding section includes a semiconductor region positioned between adjacent trench gate sections.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: April 26, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Takahiro Kawamura
  • Patent number: 11296254
    Abstract: A diode array is provided. The diode array includes a substrate and a plurality of light emitting diodes disposed on the substrate and arranged in an array, wherein each of the light emitting diodes includes a stack of functional layers comprising a first type semiconductor layer, a second type semiconductor layer, and a light emitting layer located between the first type semiconductor layer and the second type semiconductor layer, wherein at least one of the light emitting diodes includes: a first current limiting region abutting a vertically extending boundary of the second semiconductor layer; wherein, with respect to a top down view, the first current limiting region is formed about an outer edge of the light emitting diode and an outer perimeter of the first current limiting region is equal to or less than 400 micrometers (?m).
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: April 5, 2022
    Assignee: VISIONLABS CORPORATION
    Inventors: Hung-Cheng Lin, Hung-Kuang Hsu, Hua-Chen Hsu
  • Patent number: 11264521
    Abstract: A photosensitive field-effect transistor which can be configured to provide an electrical response when illuminated by electromagnetic radiation incident on the transistor. The field-effect transistor has a channel (13) made from a two-dimensional material and comprises a photoactive layer (22) which can be configured to donate charge carriers to the transistor channel (13) when electromagnetic radiation is absorbed in the photoactive layer (22). The photosensitive field-effect transistor comprises a top electrode (21) which is in contact with the photoactive layer on one or more contact areas which together form a contact pattern. With a suitably patterned top electrode (21), a voltage applied to the electrode can function as an electrical shutter which can switch the photosensitive field-effect transistor between a light-sensitive state and a light-immune state.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: March 1, 2022
    Assignee: EMBERION OY
    Inventors: Martti Voutilainen, Sami Kallioinen, Juha Rakkola
  • Patent number: 11245192
    Abstract: A chip antenna includes: a first dielectric layer; a second dielectric layer upwardly spaced apart from the first dielectric layer; a patch antenna pattern disposed on the second dielectric layer; a feed via extending through the first dielectric layer; a feed pattern disposed between the first and second dielectric layers, electrically connected to the feed via, and spaced apart from the patch antenna pattern; and an adhesive layer adhered to the first and second dielectric layers. The adhesive layer includes a cavity surrounding the feed pattern between the first and second dielectric layers and; and a vent disposed between the cavity and an external side surface of the adhesive layer.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: February 8, 2022
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Dae Ki Lim, Young Sik Hur, Kyu Bum Han, Ju Hyoung Park, Myeong Woo Han, Jeong Ki Ryoo
  • Patent number: 11239266
    Abstract: A semiconductor substrate includes a first main surface and a second main surface opposing each other. The semiconductor substrate includes a plurality of second semiconductor regions in a side of the second main surface. Each of the second semiconductor regions includes a first region including a textured surface, and a second region where a bump electrode is disposed. An insulating film includes a first insulating film covering surfaces of the second semiconductor regions, and a second insulating film covering peripheries of pad electrodes. The pad electrodes include a first electrode region in contact with the second region, and a second electrode region continuous with the first electrode region. The second electrode region is disposed on at least a part of a region included in the first insulating film and corresponding to the first region. The first main surface is a light incident surface of the semiconductor substrate.
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: February 1, 2022
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Tomoya Taguchi, Yuki Yoshida, Katsumi Shibayama
  • Patent number: 11231381
    Abstract: Nanoparticle(NP)-decorated carbon nanotube (CNT) ropes used as sensing elements for hydrogen gas (H2) chemiresistors are described herein. The NP-decorated CNT rope sensors were prepared by dielectrophoretic deposition of a single semiconducting CNT rope followed by the electrodeposition of metal nanoparticles to highly disperse said nanoparticles on the CNT surfaces. The rope sensors produced a relative resistance change 20-30 times larger than what was observed at single, pure Pd nanowires. Thus, the rope sensors improved upon all H2 sensing metrics (speed, dynamic range, and limit-of-detection) relative to single Pd nanowires.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: January 25, 2022
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Reginald M. Penner, Xiaowei Li
  • Patent number: 11209318
    Abstract: A radiation detection device includes a plurality of field effect transistors (FETs) arranged to form a resonant cavity. The cavity includes a first end and a second end. The plurality of FETs provide an electromagnetic field defining an standing wave oscillating at a resonant frequency defined by a characteristic of the cavity. A radiation input passing through the cavity induces a perturbation of the electromagnetic field.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: December 28, 2021
    Assignee: Timbre Technologies, Inc.
    Inventors: Saeed Assadi, James Pogge
  • Patent number: 11205627
    Abstract: A semiconductor device package includes a first circuit layer, a first emitting device and a second emitting device. The first circuit layer has a first surface and a second surface opposite to the first surface. The first emitting device is disposed on the second surface of the first circuit layer. The first emitting device has a first surface facing the first circuit layer and a second surface opposite to the first surface. The first emitting device has a first conductive pattern disposed on the first surface of the first emitting device. The second emitting device is disposed on the second surface of the first emitting device. The second emitting device has a first surface facing the second surface of the first emitting device and a second surface opposite to the first surface. The second emitting device has a second conductive pattern disposed on the second surface of the emitting device.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: December 21, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Meng-Wei Hsieh, Kuo-Chang Kang
  • Patent number: 11204283
    Abstract: A cavity blackbody radiation source is provide. A cavity blackbody radiation source comprises a blackbody radiation cavity and a carbon nanotube layer. The blackbody radiation cavity comprises an inner surface. The carbon nanotube layer is located on the inner surface. The carbon nanotube carbon nanotube layer comprises a plurality of carbon nanotubes and a plurality of microporous. A method of making the cavity blackbody radiation source is also provide.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: December 21, 2021
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yang Wei, Guang Wang, Shou-Shan Fan
  • Patent number: 11125626
    Abstract: A cavity black body radiation source is provided. The cavity black body radiation source comprises a blackbody radiation cavity, a black lacquer, and a carbon nanotube layer. The blackbody radiation cavity comprises an inner surface. The black lacquer is located on the inner surface. The carbon nanotube layer is located on a surface of the black lacquer away from the blackbody radiation cavity. The carbon nanotube layer comprises a plurality of carbon nanotubes and a plurality of microporous. A method of making the cavity blackbody radiation source is also provided.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: September 21, 2021
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yang Wei, Guang Wang, Shou-Shan Fan
  • Patent number: 11127880
    Abstract: An optoelectronic semiconductor device and a method for producing an optoelectronic semiconductor device are disclosed. In an embodiment an optoelectronic semiconductor device includes a semiconductor body having a first region of a first conductivity type, an active region configured to generate electromagnetic radiation and a second region of a second conductivity type in a stacking direction, an electrical contact metallization arranged on a side of the second region facing away from the active region and being opaque to the electromagnetic radiation, a radiation coupling-out region surrounding the electrical contact metallization at an edge side and an absorber layer structure arranged between the electrical contact metallization and the second region.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: September 21, 2021
    Assignee: OSRAM OLED GMBH
    Inventors: Johannes Unger, Franz Eberhard, Fabian Kopp, Katharina Christoph
  • Patent number: 11114745
    Abstract: This application relates to a device for signal transmission (e.g., radio frequency transmission) and a method for forming the device. For example, the method includes: depositing an insulating layer that includes polybenzobisoxazole (PBO) on a carrier; forming a backside layer including polyimide (PI) over the adhesive layer; forming a die-attach film (DAF) over the backside layer; forming one or more through-insulator via (TIV)-wall structures and one or more TIV-grating structures on the second backside layer, placing a die, such as a radio frequency (RF) integrated circuit (IC) die, on the DAF; encapsulating the die, the one or more TIV-wall structures, and the one or more TIV-grating structures, with a molding compound to form an antenna package including one or more antenna regions; and forming a redistribution layer (RDL) structure on the encapsulated package. The RDL structure can include one or more antenna structures coupled to the die.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: September 7, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Patent number: 11114391
    Abstract: The present disclosure provides an antenna package structure and an antenna packaging method. The package structure includes a rewiring layer, wherein the rewiring layer comprises a first dielectric layer and a first metal wiring layer in the first dielectric layer; metal connecting column, formed on the first metal wiring layer of the rewiring layer; a packaging layer, disposed on the rewiring layer, an antenna metal layer, formed on the packaging layer, an antenna circuit chip, bonded to the first metal layer of the rewiring layer, and electrically connected to the antenna metal layer through the metal connecting column; and a metal bump, formed on the first metal wiring layer of the rewiring layer, to achieve electrical lead-out of the rewiring layer.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: September 7, 2021
    Assignee: SJ Semiconductor (Jiangyin) Corporation
    Inventors: Yenheng Chen, Chengchung Lin, Chengtar Wu, Jangshen Lin
  • Patent number: 11082550
    Abstract: A capacitive proximity sensor for use in mobile devices such as smartphones and connected tables, in which it is used to switch off a display (70) when the device is brought to the ear, and to reduce selectively the RF power when the device is in close proximity to a body part of a user, in order to fulfil regulatory SAR limits. The capacitive sensor uses two electrodes (60, 30), the first of which may also serve as RF antenna, and the other is preferably on the back of the phone and is opposite the display.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: August 3, 2021
    Assignee: Semtech Corporation
    Inventors: Chaouki Rouaissia, Hehai Zheng
  • Patent number: 11004810
    Abstract: A semiconductor package structure including an encapsulation body, an RFIC chip, a first antenna structure, and a second antenna structure is provided. The RFIC chip may be embedded in the encapsulation body. The first antenna structure may be disposed at a lateral side of the RFIC chip, electrically connected to the RFIC chip, and include a first conductor layer and a plurality of first patches opposite to the first conductor layer. The second antenna structure may be stacked on the RFIC chip, electrically connected to the RFIC chip, and include a second conductor layer and a plurality of second patches opposite to the second conductor layer. The first patches and the second patches are located at a surface of the encapsulation body. A first distance between the first conductor layer and the first patches is different from a second distance between the second conductor layer and the second patches.
    Type: Grant
    Filed: December 15, 2019
    Date of Patent: May 11, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Chiang Wu, Chun-Lin Lu, Chao-Wen Shih, Han-Ping Pu, Nan-Chin Chuang
  • Patent number: 11004799
    Abstract: A package structure and the method thereof are provided. The package structure includes a conductive plate, a semiconductor die, a molding compound, and antenna elements. The conductive plate has a first surface, a second surface and a sidewall connecting the first surface and the second surface. The semiconductor die is located on the second surface of the conductive plate. The molding compound laterally encapsulates the semiconductor die and covers the sidewall and a portion of the second surface exposed by the semiconductor die, wherein the first surface of the conductive plate is coplanar with a surface of the molding compound. The antenna elements are located over the first surface of the conductive plate.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: May 11, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Chiang Wu, Chen-Hua Yu, Kuo-Chung Yee
  • Patent number: 10989749
    Abstract: An apparatus for detecting a condition or authenticity of one or more electronic devices includes an enclosure having an antenna integrated therewithin, a fixture mounted within a hollow interior of the enclosure, the fixture being configured to receive the one or more electronic devices and connect one or more signals to each of the one or more electronic devices and a sensor and controller assembly connected to the antenna and configured to process a signature of an emission of a radiofrequency (RF) energy from of one or more electronic devices having the one or more signals connected thereto.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: April 27, 2021
    Assignee: NOKOMIS, INC.
    Inventors: Walter John Keller, III, Andrew Richard Portune, Todd Eric Chornenky, William Anthony Davis
  • Patent number: 10983010
    Abstract: The present disclosure is an infrared sensor capable of being integrated into a IR focal plane array. It includes of a CMOS based readout circuit with preamplification, noise filtering, and row/column address control. Using either a microbolometer device structure with either a thermal sensing element of vanadium oxide or amorphous silicon, a nanocomposite is fabricated on top of either of these materials comprising aligned or unaligned carbon nanotube films with IR transmissive layer of silicon nitride followed by one to five monolayers of graphene. These layers are connected in series minimizing the noise sources and enhancing the NEDT of each film. The resulting IR sensor is capable of NEDT of less than 1 mK. The wavelength response is from 2 to 12 microns. The approach is low cost using a process that takes advantage of the economies of scale of wafer level CMOS.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: April 20, 2021
    Assignee: Magnolia Optical Technologies, Inc.
    Inventors: Ashok K. Sood, Elwood J. Egerton
  • Patent number: 10971825
    Abstract: An antenna module includes: an integrated circuit (IC) configured to generate a radio frequency (RF) signal; and a substrate including an antenna portion providing a first surface of the substrate, and a circuit pattern portion providing a second surface of the substrate. The antenna portion includes first antenna members configured to transmit the RF signal, cavities corresponding to the first antenna members, through vias respectively disposed in the cavities and respectively electrically connected to the first antenna members, and a plating member disposed in at least one cavity among the cavities. The circuit pattern portion includes a circuit pattern and an insulating layer forming, for each of the through vias, an electrical connection path to the IC.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: April 6, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ho Kyung Kang, ThomasA Kim
  • Patent number: 10964652
    Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a circuit layer, a first package body, a first antenna and an electronic component. The circuit layer has a first surface and a second surface opposite to the first surface. The first package body is disposed on the first surface of the circuit layer. The first antenna penetrates the first package body and is electrically connected to the circuit layer. The electronic component is disposed on the second surface of the circuit layer.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: March 30, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chien-Hua Chen, Sheng-Chi Hsieh
  • Patent number: 10867939
    Abstract: A package structure includes a semiconductor die, an insulating encapsulant, a first redistribution layer, a second redistribution layer, antenna elements and a first insulating film. The insulating encapsulant is encapsulating the at least one semiconductor die, the insulating encapsulant has a first surface and a second surface opposite to the first surface. The first redistribution layer is disposed on the first surface of the insulating encapsulant. The second redistribution layer is disposed on the second surface of the insulating encapsulant. The antenna elements are located over the second redistribution layer. The first insulating film is disposed in between the second redistribution layer and the antenna elements, wherein the first insulating film comprises a resin rich region and a filler rich region, the resin rich region is located in between the filler rich region and the second redistribution layer and separating the filler rich region from the second redistribution layer.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Yu Kuo, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu, Yi-Yang Lei, Wei-Jie Huang
  • Patent number: 10804171
    Abstract: Disclosed in the present invention are a sensor packaging structure and a manufacturing method thereof. The sensor packaging structure includes a protection board, a circuit structure and a filling structure. A front surface of the circuit structure is connected to a first surface of the protection board. A second surface of the protection board is used as a sensing function surface. The filling structure is located on the outer periphery of the circuit structure and connected to the first surface of the protection board. The sensor packaging structure of the present invention uses the protection board as a protection layer of the functional circuit, which can effectively protect the functional circuit of the sensor. Meanwhile, the protection board is first connected to the circuit structure in the manufacturing method to avoid tolerance accumulation, increasing the manufacturing accuracy of the protection layer.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: October 13, 2020
    Assignee: MICROARRAY MICROELECTRONICS CORP., LTD.
    Inventors: Yangyuan Li, Shaobo Ding
  • Patent number: 10797195
    Abstract: The invention relates to semiconductor devices for converting ionizing radiation into an electrical signal. The present ionizing radiation sensor has an n+-i-p+ structure, produced using the planar process. The sensor contains an i-region in the form of a high-resistivity substrate of high-purity float-zone silicon with p-type conductivity, having on its front face n+-regions (2, 3), an SiO2 layer (4), aluminium metallization (5), and a passivation layer. On the front face of the substrate (1) n-regions (2) are formed by ion implantation; a masking layer of SiO2 (layer 4) is grown; aluminium metallization (5) is deposited; and a passivation layer (6) is applied.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: October 6, 2020
    Inventors: Vladimir Aleksandrovich Elin, Mikhail Moiseevich Merkin
  • Patent number: 10797100
    Abstract: An imaging device includes a semiconductor substrate, pixels, a charge detector, charge storage portions, an output gate portion and a shift gate portion. The pixels and the charge detector are provided in the semiconductor substrate. The charge storage portions are provided on the charge detector side of the pixels, and linked to the pixels. The output gate portion is positioned between the charge detector and the charge storage portions, and includes charge transfer channels extending in a radial configuration in directions from the charge detector toward the pixels. The shift gate portion is positioned between one charge storage portion and one charge transfer channel. The shift gate portion includes a gate electrode provided on the semiconductor substrate. A planar configuration of the gate electrode has a side orthogonal to the extending direction of the one charge transfer channels, the side being most proximal to the one charge transfer channel.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: October 6, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Ryuta Inobe
  • Patent number: 10707173
    Abstract: A package structure and the method thereof are provided. The package structure includes a conductive plate, a semiconductor die, a molding compound, and antenna elements. The conductive plate has a first surface, a second surface and a sidewall connecting the first surface and the second surface. The semiconductor die is located on the second surface of the conductive plate. The molding compound laterally encapsulates the semiconductor die and covers the sidewall and a portion of the second surface exposed by the semiconductor die, wherein the first surface of the conductive plate is coplanar with a surface of the molding compound. The antenna elements are located over the first surface of the conductive plate.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: July 7, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai-Chiang Wu, Chen-Hua Yu, Kuo-Chung Yee
  • Patent number: 10674100
    Abstract: The present disclosure relates to an imaging device, a driving method, and an electronic apparatus that can capture an image with a higher dynamic range. The imaging device includes a pixel region in which pixels are arranged, the pixels each including a photoelectric conversion unit that converts incident light into electric charges through electric conversion and stores the electric charges, and two or more charge storage units that store the electric charges transferred from the photoelectric conversion unit, and a drive unit that drives the pixels. The drive unit drives each pixel to cause the photoelectric conversion unit to repeatedly transfer electric charges with different exposure times to the two or more charge storage units during the light reception period of one frame. The present technology can be applied to an imaging device capable of capturing an HDR image, for example.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: June 2, 2020
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Isao Hirota
  • Patent number: 10672728
    Abstract: An integrated fan-out (InFO) package includes a first redistribution structure, a plurality of dies, a plurality of first conductive structures, an encapsulant, a second redistribution structure, and insulating layer, a plurality of second conductive structures, an antenna confinement structure, and a slot antenna. The dies and the first conductive structures are disposed on the first redistribution structure. The first conductive structures surround the dies. The encapsulant encapsulates the dies and the first conductive structures. The second redistribution structure is disposed on the dies, the first conductive structures, and the encapsulant. The insulating layer is over the second redistribution structure. The second conductive structures and the antenna confinement structure are embedded in the insulating layer. The slot antenna is disposed on the insulating layer.
    Type: Grant
    Filed: November 22, 2018
    Date of Patent: June 2, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chuei-Tang Wang, Tzu-Chun Tang, Chieh-Yen Chen, Che-Wei Hsu
  • Patent number: 10658220
    Abstract: A device transferring method for transferring a plurality of devices to a mounting substrate provided with a plurality of electrodes includes: a step of adhering an expandable tape to the plurality of devices formed on a front surface side of a substrate through a buffer layer; a step of applying a laser beam to the buffer layer from a back surface side of the substrate, to break the buffer layer; a step of moving the tape in a direction for spacing away from the substrate to separate the substrate and the plurality of devices from each other, thereby transferring the plurality of devices to the tape; a step of expanding the tape in such a manner that the layout of the plurality of devices corresponds to the layout of the plurality of electrodes; and a step of bonding the plurality of devices to the plurality of electrodes at once.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: May 19, 2020
    Assignee: DISCO CORPORATION
    Inventors: Tasuku Koyanagi, Akihito Kawai
  • Patent number: 10622544
    Abstract: A composite substrate production method of the invention includes (a) a step of mirror polishing a substrate stack having a diameter of 4 inch or more, the substrate stack including a piezoelectric substrate and a support substrate bonded to each other, the mirror polishing being performed on the piezoelectric substrate side until the thickness of the piezoelectric substrate reaches 3 ?m or less; (b) a step of creating data of the distribution of the thickness of the mirror-polished piezoelectric substrate; and (c) a step of performing machining with an ion beam machine based on the data of the thickness distribution so as to produce a composite substrate have some special technical features.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: April 14, 2020
    Assignee: NGK INSULATORS, LTD.
    Inventors: Yuji Hori, Tomoyoshi Tai, Mitsuo Ikejiri
  • Patent number: 10491847
    Abstract: An example sensor for image capturing may include a pixel array including a plurality of pixels; a read-out circuit configured to receive an analog electrical signal output from each of the plurality of pixels, convert the analog electrical signal into a digital electrical signal, and output the digital electrical signal; and a memory temporarily storing the digital electrical signal output from the read-out circuit and outputting at least part of the temporarily stored digital electrical signal to an external circuit.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: November 26, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Soo Kim, Hwa-Young Kang, Yeo-Tak Youn, Young-Kwon Yoon, Jong-Hun Won, Ki-Huk Lee
  • Patent number: 10473709
    Abstract: An integrated circuit chip stack includes a main integrated circuit chip and at least one auxiliary integrated circuit chip. The main integrated circuit chip contains circuit components to be protected. The auxiliary integrated circuit chip is mounted to a surface of the main integrated circuit chip and includes a metal plane connected to ground located opposite the circuit components to be protected. The auxiliary integrated circuit chip further includes at least one insulated conductive track forming a tight pattern opposite the circuit components to be protected. A detection circuit is connected to the at least one conductive track and is configured to detect interruption of the at least one insulated conductive track.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: November 12, 2019
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Alexandre Sarafianos, Thomas Ordas
  • Patent number: 10374128
    Abstract: An optoelectric device can comprise a substrate and at least one junction configured to provide an active region within the substrate. Additionally, the device can comprise a metal-mesh semiconductor electrical contact structure attached to a surface of the substrate. The metal-mesh semiconductor electrical contact structure can further comprise a mesh line width, a mesh opening size, and a mesh thickness.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: August 6, 2019
    Assignee: Terahertz Device Corporation
    Inventor: Mark S. Miller
  • Patent number: 10276496
    Abstract: Methods and apparatus are disclosed for manufacturing metal contacts under ground-up contact pads within a device. A device may comprise a bottom metal layer with a bottom metal contact, a top metal layer with a top metal contact, and a plurality of middle metal layers. Any given metal layer of the plurality of middle metal layers comprises a metal contact, the metal contact is substantially vertically below the top metal contact, substantially vertically above the bottom metal contact, and substantially vertically above a metal contact in any metal layer that is below the given metal layer. The metal contacts may be of various and different shapes. All the metal contacts in the plurality of middle metal layers and the bottom metal contact may be smaller than the top metal contact, therefore occupying less area and saving more area for other functions such as device routing.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsien-Wei Chen, Ching-Jung Yang, Chia-Wei Tu
  • Patent number: 10264197
    Abstract: The present disclosure relates to an imaging device, a driving method, and an electronic apparatus that can capture an image with a higher dynamic range. The imaging device includes: a pixel region in which pixels are arranged, the pixels each including a photoelectric conversion unit that converts incident light into electric charges through electric conversion and stores the electric charges, and two or more charge storage units that store the electric charges transferred from the photoelectric conversion unit; and a drive unit that drives the pixels. The drive unit drives each pixel to cause the photoelectric conversion unit to repeatedly transfer electric charges with different exposure times to the two or more charge storage units during the light reception period of one frame. The present technology can be applied to an imaging device capable of capturing an HDR image, for example.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: April 16, 2019
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Isao Hirota
  • Patent number: 10199317
    Abstract: An electronic package includes a circuit structure having a first metal layer, a packaging layer formed on the circuit structure, and a second metal layer formed on the packaging layer and separated from the first metal layer at a distance. The first metal layer and the second metal layer constitute an antenna structure. Since the second metal layer is formed on a portion of a surface of the packaging layer, a propagating wave emitted by the first metal layer cannot pass through the second metal layer, but a surface of the packaging layer not covered by the second metal layer. Therefore, the propagating wave can be transmitted to a predetermined target, and the electronic package performs the function of an antenna.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: February 5, 2019
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Chia-Yang Chen, Ying-Wei Lu, Jyun-Yuan Jhang, Ming-Fan Tsai
  • Patent number: 9851386
    Abstract: An apparatus for detecting a condition or authenticity of one or more electronic devices includes an enclosure having an antenna integrated therewithin, a fixture mounted within a hollow interior of the enclosure, the fixture being configured to receive the one or more electronic devices and connect one or more signals to each of the one or more electronic devices and a sensor and controller assembly connected to the antenna and configured to process a signature of an emission of a radiofrequency (RF) energy from of one or more electronic devices having the one or more signals connected thereto.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: December 26, 2017
    Assignee: NOKOMIS, INC.
    Inventors: Walter John Keller, III, Andrew Richard Portune, Todd Eric Chornenky, William Anthony Davis
  • Patent number: 9820394
    Abstract: According to one embodiment, a circuit board attachment structure comprise a housing to which the circuit board is attached, a mount provided on the housing and provided outside a portion of the housing where the circuit board is attached, a holding piece extending from the mount to and on the circuit board and sandwiching the circuit board with the housing, and a conductive gasket contacting the circuit board. The gasket is provided at least in a region where the circuit board is sandwiched between the holding piece and the housing, and the gasket is pressed between the holding piece and the housing, and the circuit board and the housing is electrically connected to each other via the pressed gasket.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: November 14, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiromichi Suzuki, Masataka Tokoro
  • Patent number: 9787412
    Abstract: Aspects of the subject disclosure may include, for example, a system for generating electromagnetic waves having a fundamental wave mode, and directing the electromagnetic waves to an interface of a transmission medium for guiding propagation of the electromagnetic waves. Other embodiments are disclosed.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: October 10, 2017
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: Paul Shala Henry, Robert Bennett, Farhad Barzegar, Irwin Gerszberg, Donald J Barnickel, Thomas M. Willis, III
  • Patent number: 9733357
    Abstract: Disclosed are various embodiments of an infrared proximity sensor package comprising an infrared transmitter die, an infrared receiver die, a housing comprising sidewalls, a first recess, a second recess, a partitioning divider disposed between the first and second recesses, and an overlying shield comprising an infrared-absorbing material. The transmitter die is positioned in the first recess, and the receiver die is positioned within the second recess. The partitioning divider comprises liquid crystal polymer (LCP) such that the partitioning divider and the infrared-absorbing material of the shield cooperate together to substantially attenuate and absorb undesired infrared light that might otherwise become internally-reflected within the housing or incident upon the receiver as a false proximity or object detection signal.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: August 15, 2017
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: James Costello, Wee Sin Tan
  • Patent number: 9728838
    Abstract: Approaches for an on-chip antenna are provided. A method includes forming an antenna in an insulator layer at a front side of a substrate. The method also includes forming a trench in the substrate underneath the antenna. The method further includes forming a fill material in the trench. The substrate is composed of a material having a first dielectric constant. The fill material has a second dielectric constant that is less than the first dielectric constant.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: August 8, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Hanyi Ding, Mark D. Jaffe, Alvin J. Joseph, Anthony K. Stamper
  • Patent number: 9685249
    Abstract: Provided is a beta voltaic battery including a first semiconductor layer, a second semiconductor layer, and a beta-ray generator which is disposed between the first semiconductor layer and the second semiconductor layer and includes a metal substrate having both sides coated with a radioisotope layer. The beta voltaic battery according to the present invention has no sealing layer, but may efficiently shield beta rays through a sandwich structure. Since the sealing layer is absent, the absorption of beta rays by the semiconductor may be improved, and excellent energy conversion efficiency may be obtained because output is improved due to the two semiconductor layers and the radioisotope ray source coated on the both sides.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: June 20, 2017
    Assignees: KOREA ATOMIC ENERGY RESEARCH INSTITUTE, Electronics and Telecommunications Research Institute
    Inventors: Young Rang Uhm, Kwang Jae Son, Sung-Weon Kang, Kyung-Hwan Park, Byoung-Gun Choi
  • Patent number: 9666634
    Abstract: In various example embodiments, the inventive subject matter is an image sensor and methods of formation of image sensors. In an embodiment, the image sensor comprises a semiconductor substrate and a plurality of pixel regions. Each of the pixel regions includes an optically sensitive material over the substrate with the optically sensitive material positioned to receive light. A pixel circuit for each pixel region is also included in the sensor. Each pixel circuit comprises a charge store formed on the semiconductor substrate and a read out circuit. A non-metallic contact region is between the charge store and the optically sensitive material of the respective pixel region, the charge store being in electrical communication with the optically sensitive material of the respective pixel region through the non-metallic contact region.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: May 30, 2017
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Igor Constantin Ivanov, Edward Hartley Sargent
  • Patent number: 9577123
    Abstract: Provided are nanostructures and optical devices having the nanostructures. The nanostructure may include a carbon nanomaterial layer, a nanopattern formed on the carbon nanomaterial layer, and a metal layer formed on a surface of the nanopattern. The nanostructure may be formed in a ring shape, and the metal layer may include a plurality of metal layers formed of different metals.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: February 21, 2017
    Assignees: SAMSUNG ELECTRONICS CO., LTD., UNIST (Ulsan National Institute of Science and Technology)
    Inventors: Unjeong Kim, Younggeun Roh, Jineun Kim, Soojin Park, Yeonsang Park, Chanwook Baik, Seungmin Yoo, Jaesoong Lee, Sangmo Cheon
  • Patent number: 9509415
    Abstract: Aspects of the subject disclosure may include, for example, a system for generating electromagnetic waves having a fundamental wave mode, and directing the electromagnetic waves to an interface of a transmission medium for guiding propagation of the electromagnetic waves. Other embodiments are disclosed.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: November 29, 2016
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: Paul Shala Henry, Robert Bennett, Farhad Barzegar, Irwin Gerszberg, Donald J Barnickel, Thomas M. Willis, III
  • Patent number: 9502688
    Abstract: Provided are an organic light emitting display apparatus and a method of manufacturing the same. The organic light emitting display apparatus includes: a thin film transistor (TFT) substrate including a plurality of thin film transistors, an organic light-emissive device on the TFT substrate, and an encapsulation layer on the TFT substrate and the organic light-emissive device, the encapsulation layer being configured to cover the organic light-emissive device, the encapsulation layer including a hybrid material including: a block copolymer, and functionalized graphene.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: November 22, 2016
    Assignee: LG Display Co., Ltd.
    Inventor: Jong Hyun Park
  • Patent number: 9412781
    Abstract: The present disclosure relates to a method the present disclosure relates to an active pixel sensor having a gate dielectric protection layer that reduces damage to an underlying gate dielectric layer during fabrication, and an associated method of formation. In some embodiments, the active pixel sensor has a photodetector disposed within a semiconductor substrate. A transfer transistor having a first gate structure is located on a first gate dielectric layer disposed above the semiconductor substrate. A reset transistor having a second gate structure is located on the first gate dielectric layer. A gate dielectric protection layer is disposed onto the gate oxide at a position extending between the first gate structure and the second gate structure and over the photodetector. The gate dielectric protection layer protects the first gate dielectric layer from etching procedures during fabrication of the active pixel sensor.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: August 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Hsien Chou, Wen-I Hsu, Tsun-Kai Tsao, Chih-Yu Lai, Jiech-Fun Lu, Yeur-Luen Tu
  • Patent number: 9266437
    Abstract: A betavoltaic power source for transportation devices and applications is disclosed, wherein the device having a stacked configuration of isotope layers and energy conversion layers. The isotope layers have a half-life of between about 0.5 years and about 5 years and generate radiation with energy in the range from about 15 keV to about 200 keV. The betavoltaic power source is configured to provide sufficient power to operate the transportation device over its useful lifetime.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: February 23, 2016
    Assignee: Ultratech, Inc.
    Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk