Light Patents (Class 257/431)
  • Patent number: 12278252
    Abstract: A photo-detecting apparatus is provided. The photo-detecting apparatus includes a carrier conducting layer having a first surface; an absorption region is doped with a first dopant having a first conductivity type and a first peak doping concentration, wherein the carrier conducting layer is doped with a second dopant having a second conductivity type and a second peak doping concentration, wherein the carrier conducting layer comprises a material different from a material of the absorption region, wherein the carrier conducting layer is in contact with the absorption region to form at least one heterointerface, wherein a ratio between the first peak doping concentration of the absorption region and the second peak doping concentration of the carrier conducting layer is equal to or greater than 10; and a first electrode and a second electrode both formed over the first surface of the carrier conducting layer.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: April 15, 2025
    Assignee: Artilux, Inc.
    Inventors: Yen-Cheng Lu, Yun-Chung Na, Tsung-Ting Wu, Shu-Lu Chen, Chih-Wei Yeh
  • Patent number: 12250488
    Abstract: A merged frame-based and event-based image sensor pixel is provided, comprising a reverse-biased photodiode; a frame-based signal readout circuit connected to a cathode of the photodiode; and an event-based signal readout circuit connected to an anode of the photodiode. Light received in the photodiode causes the production of electrons and holes. The recombination current of the holes is continuously measured for producing the event-based signal.
    Type: Grant
    Filed: December 21, 2023
    Date of Patent: March 11, 2025
    Assignee: Prophesee
    Inventors: Thomas Finateu, Christian Bouvier
  • Patent number: 12237356
    Abstract: Provided are a solid-state imaging device, a manufacturing method thereof, and an electronic device that enable improvement of the sensitivity in a near infrared region by a simpler process. A solid-state imaging device includes a first semiconductor layer in which a first photoelectric conversion unit and a first floating diffusion are formed, a second semiconductor layer in which a second photoelectric conversion unit and a second floating diffusion are formed, and a wiring layer including a wiring electrically connected to the first and second floating diffusions. The first semiconductor layer and the second semiconductor layer are laminated, and the wiring layer is formed on a side of the first or second semiconductor layer, the side being opposite to a side on which the first semiconductor layer and the second semiconductor layer face each other.
    Type: Grant
    Filed: November 2, 2023
    Date of Patent: February 25, 2025
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Shinya Yamakawa
  • Patent number: 12215022
    Abstract: A microelectromechanical microphone including a microphone unit made from a first substrate, the microphone unit including a movable element capable of being displaced under the effect of a pressure difference and a device for measuring the displacement of the movable element, a cover made from a second substrate, the cover having a first recess, first device for electrically connecting the measurement device to a control unit, the microphone unit and the cover delimiting between them a vacuum space housing the measurement device and a first cavity, from the first recess, partly closed by the movable element, the vacuum space and the first cavity being insulated in a sealed manner from each other, the microphone including a device for mechanically transmitting the displacement of the movable element to the measurement device and a sealed insulation element through which the transmission device passes.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: February 4, 2025
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Samer Dagher, Loic Joet
  • Patent number: 12211866
    Abstract: An imaging device according to an embodiment of the present disclosure includes a photoelectric conversion section provided in a semiconductor substrate, a charge holding section that is provided as being laminated over the photoelectric conversion section in a thickness direction of the semiconductor substrate and holds a charge photoelectrically converted by the photoelectric conversion section, a horizontal light shielding film that is provided between the photoelectric conversion section and the charge holding section and extends in an in-plane direction of the semiconductor substrate, and a plurality of vertical gate electrodes that passes through an identical opening provided in the horizontal light shielding film and extends to the photoelectric conversion section in the thickness direction of the semiconductor substrate.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: January 28, 2025
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Yusuke Matsumura
  • Patent number: 12205964
    Abstract: The present technology relates to a light receiving device and a distance measurement system that enable light to be surely received by a reference pixel. A light receiving device includes a plurality of pixels each including a light receiving element having a light receiving surface, and a light emission source provided on an opposite side of the light receiving surface with respect to the light receiving element. The plurality of pixels includes a first pixel including a light shielding member provided between the light receiving element and the light emission source, and a second pixel including a light guiding unit that is configured to propagate a photon and is provided between the light receiving element and the light emission source. The present technology can be applied to a distance measurement system or the like that detects a distance to a subject in a depth direction, for example, for example.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: January 21, 2025
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Yasunori Tsukuda
  • Patent number: 12204143
    Abstract: A transparent display includes a display including a transparent substrate and a patterned diamond layer formed on the transparent substrate to at least in part define a diamond waveguide. At least two electronic devices can be connected by the diamond waveguide, and can include a sensor, a transducer, or electronic circuitry, including communication, control, or data processing electronic circuitry.
    Type: Grant
    Filed: February 14, 2024
    Date of Patent: January 21, 2025
    Assignee: AKHAN SEMICONDUCTOR, INC.
    Inventors: Adam Khan, Kiran Kumar Kovi, Ernest Schirmann, William Alberth
  • Patent number: 12191632
    Abstract: Disclosed is a terahertz wave generating apparatus. The terahertz wave generating apparatus includes a dual mode laser including a first single mode laser that generates a first beating signal, a gain adjustment region that modulates the first beating signal, and a second single mode laser that generates a second beating signal, and a photomixer that mixes the modulated first beating signal and the second beating signal, and that modulates a current supplied based on a beating frequency of the mixed beating signals to generate a terahertz wave signal, and the gain adjustment region is formed between the first single mode laser and the second single mode laser, and the first beating signal is output from the first single mode laser to the gain adjustment region and is modulated based on a reverse bias voltage supplied to the gain adjustment region.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: January 7, 2025
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hyun Soo Kim, Kyung Hyun Park, Eui Su Lee, Il Min Lee, Kiwon Moon, Dong Woo Park, Jun-Hwan Shin
  • Patent number: 12181711
    Abstract: A binary photonics lattice that includes a waveguide array having a plurality of single mode waveguides disposed in a substrate, the plurality of single mode waveguides including one or more first waveguides having a first V-number V1 and one or more second waveguides having a second V-number V2. The first V-number V1 is smaller than the second V-number V2. The one or more first and second waveguides are arranged in a linear distribution having first and second edge waveguide regions and a binary waveguide region positioned between the first and second edge waveguide regions. The binary waveguide region is a symmetrical binary representation of a decimal number of two or greater. Further, the binary waveguide region includes at least one first waveguide representing a digit 0 of the symmetrical binary representation and/or at least one second waveguide representing a digit 1 of the symmetrical binary representation.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: December 31, 2024
    Assignee: CORNING INCORPORATED
    Inventors: Nicholas Francis Borrelli, Dan Trung Nguyen, Daniel Aloysius Nolan
  • Patent number: 12170341
    Abstract: A photodiode, such as a linear mode avalanche photodiode can be made free of excess noise via having a superlattice multiplication region that allows only one electrical current carrier type, such as an electron or a hole, to accumulate enough kinetic energy to impact ionize when biased, where the layers are lattice matched. A photodiode can be constructed with i) a lattice matched pair of a first semiconductor alloy and a second semiconductor alloy in a superlattice multiplication region, ii) an absorber region, and iii) a semiconductor substrate. A detector with multiple photodiodes can be made with these construction layers in order to have a cutoff wavelength varied anywhere from 1.7 to 4.9 ?m as well as a noise resulting from a dark current at a level such that an electromagnetic radiation signal with the desired minimum wavelength cutoff can be accurately sensed by the photodiode.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: December 17, 2024
    Assignee: SRI International
    Inventor: Winston K. Chan
  • Patent number: 12165956
    Abstract: Package structures, modules containing such packages and methods of manufacture. are described. In an embodiment, a package includes a plurality of terminal pads, a plurality of passive components bonded to top sides of the plurality of terminal pads, a die bonded to top sides of the plurality of passive components and a molding compound encapsulating at least the plurality of passive components and the die.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: December 10, 2024
    Assignee: Apple Inc.
    Inventors: Kumar Nagarajan, Flynn P. Carson, Karthik Shanmugam, Menglu Li, Raymundo M. Camenforte, Scott D. Morrison
  • Patent number: 12159946
    Abstract: A photoelectric conversion apparatus comprises a semiconductor layer including a plurality of photoelectric conversion portions and having a first surface and a second surface that is the surface opposite to the first surface, a wiring structure disposed on the second surface side of the semiconductor layer, and a metal compound film disposed on the first surface side of the semiconductor layer. The metal compound film contains hydrogen and carbon. The concentration of the hydrogen in the interface on the semiconductor layer side of the metal compound film is 1×1021 atoms/cm3 or more and 1×1022 atoms/cm3 or less. The concentration of the carbon in the interface on the semiconductor layer side of the metal compound film is 5×1020 atoms/cm3 or more and 1×1022 atoms/cm3 or less.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: December 3, 2024
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoshiei Tanaka, Takumi Ogino, Tsutomu Tange
  • Patent number: 12117563
    Abstract: The present technology relates to a light receiving device and a distance measuring module capable of improving sensitivity. A light receiving device includes a pixel array unit in which pixels each having a first tap detecting charge photoelectrically converted by a photoelectric conversion unit and a second tap detecting charge photoelectrically converted by the photoelectric conversion unit are two-dimensionally arranged in a matrix. The first tap and the second tap each have a voltage application unit that applies a voltage, the pixel array unit has a groove portion formed by digging from a light incident surface side of a substrate to a predetermined depth, and the groove portion is arranged so as to overlap at least a part of the voltage application unit in plan view. The present technology can be applied to a distance measuring sensor or the like of the indirect ToF scheme, for example.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: October 15, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Ryota Watanabe, Takeshi Yamazaki, Sangman Han
  • Patent number: 12095223
    Abstract: This application provides a laser device with an edge emitting source surface-mounted for emission and an electronic device. The laser device includes parts involved in the following: A bottom plate of a housing covers a bottom end of a housing body, and the bottom plate includes a first conductive region and a second conductive region apart from each other. An inner cavity of the housing body and the bottom plate form a mounting cavity with a light outlet opposite the bottom plate, and the mounting cavity is provided in a light source assembly. A side surface of the light source chip facing the light outlet is a light-emitting surface, and light is projected from the front of the light outlet. The technical solution provided by this application is to attach an edge emitting source chip onto the mounting side surface of the support member, so as to achieve frontward projecting.
    Type: Grant
    Filed: March 14, 2024
    Date of Patent: September 17, 2024
    Inventor: Lijian Sun
  • Patent number: 12094897
    Abstract: An imaging element according to an embodiment of the present disclosure includes: a semiconductor substrate having an effective pixel region in which a plurality of pixels is disposed and a peripheral region provided around the effective pixel region; a photoelectric converter; a first hydrogen block layer; an interlayer insulating layer; and a separation groove. The photoelectric converter includes a first electrode, a second electrode, and an electric charge accumulation layer and a photoelectric conversion layer. The first electrode is provided on a light receiving surface side of the semiconductor substrate and includes a plurality of electrodes. The second electrode is disposed to be opposed to the first electrode. The electric charge accumulation layer and the photoelectric conversion layer are stacked and provided in order between the first electrode and the second electrode and extend in the effective pixel region.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: September 17, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Takahiro Kamei
  • Patent number: 12087789
    Abstract: An imaging apparatus including a semiconductor substrate which includes a charge accumulation portion containing an impurity of a first conductivity type; a contact plug which is connected to the charge accumulation portion, contains an impurity of the first conductivity type, and is not silicide; a first insulating film which includes an upper wall located above the contact plug; and a second insulating film which includes a portion located above the upper wall. A material of the second insulating film is different from a material of the first insulating film.
    Type: Grant
    Filed: June 27, 2023
    Date of Patent: September 10, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Kosaku Saeki
  • Patent number: 12081276
    Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to coherent optical receivers, including coherent receivers with integrated all-silicon waveguide photodetectors and tunable local oscillators implemented within CMOS technology. Embodiments are also directed to tunable silicon hybrid lasers with integrated temperature sensors to control wavelength. Embodiments are also directed to post-process phase correction of optical hybrid and nested I/Q modulators. Embodiments are also directed to demultiplexing photodetectors based on multiple microrings. In embodiments, all components may be implements on a silicon substrate. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: September 3, 2024
    Assignee: Intel Corporation
    Inventors: Meer Nazmus Sakib, Peicheng Liao, Ranjeet Kumar, Duanni Huang, Haisheng Rong, Harel Frish, John Heck, Chaoxuan Ma, Hao Li, Ganesh Balamurugan
  • Patent number: 12078856
    Abstract: A photonic structure is provided. The photonic structure includes a guiding region, a sensing region, and logic region. The guiding region has a first side and a second side opposite to the first side. The sensing region is disposed on the second side of the guiding region. The logic region is disposed on a side of the sensing region opposite to the guiding region. The guiding region, the sensing region, and the logic region are stacked along a vertical direction. A method for manufacturing the photonic structure is also provided.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: September 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tao-Cheng Liu, Ying-Hsun Chen
  • Patent number: 12058877
    Abstract: An imaging apparatus includes a semiconductor substrate; a first electrode; a second electrode; a photoelectric conversion layer disposed between the first electrode and the second electrode, and including a donor organic semiconductor material and an acceptor organic semiconductor material; a charge accumulation node positioned within the semiconductor substrate and electrically connected to the second electrode; and a first blocking layer disposed between the first electrode and the photoelectric conversion layer. The photoelectric conversion layer has an ionization potential of lower than or equal to 5.3 eV. The first blocking layer has an electron affinity lower than an electron affinity of the acceptor organic semiconductor material included in the photoelectric conversion layer. The imaging apparatus has spectral sensitivity in a near-infrared light region having wavelengths of greater than or equal to 650 nm and less than or equal to 3000 nm.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: August 6, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masaya Hirade, Hiroaki Iijima
  • Patent number: 12044956
    Abstract: A light-emitting device including: a package including a light-emitting element, a reflection member that reflects light outputted from the light-emitting element, and a sealed space that accommodates the light-emitting element and the reflection member; a base plate on which a plurality of the packages is mounted; and lenses opposed to the base plate with the plurality of packages interposed therebetween, the lenses being opposed to the respective packages.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: July 23, 2024
    Assignee: Sony Corporation
    Inventors: Hisayoshi Motobayashi, Hidekazu Kawanishi, Yoshiro Takiguchi, Masahiro Murayama, Hiroyuki Miyahara, Hitoshi Domon
  • Patent number: 12040337
    Abstract: Provided is a semiconductor package. The semiconductor package includes an image sensor chip including a first surface and a second surface opposite to each other in a first direction; a transparent substrate spaced apart from the second surface of the image sensor chip in a second direction, wherein the transparent substrate includes a first part and a second part with a width different from the first part; an adhesive layer disposed between the second surface of the image sensor chip and the first part of the transparent substrate; and a mold layer on the second part of the transparent substrate, wherein the mold layer comprises side surfaces that extend along the first part of the transparent substrate, and further extend along side surfaces of the adhesive layer and side surfaces of the image sensor chip, and not extending along the first surface of the image sensor chip.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: July 16, 2024
    Assignee: SAMSUNG ELECTRONICS CO, LTD.
    Inventors: Sun Jae Kim, Sun Kyoung Seo, Yong Hoe Cho
  • Patent number: 12002825
    Abstract: A solid-state imaging device of an embodiment of the present disclosure includes a semiconductor substrate having one surface and another surface opposed to the one surface, a photoelectric conversion section formed to be embedded in the semiconductor substrate, a charge holding section provided in the one surface of the semiconductor substrate while being stacked on the photoelectric conversion section, an n-type semiconductor region provided in the one surface of the semiconductor substrate, and a charge-voltage conversion section provided in the one surface of the semiconductor substrate. A charge generated in the photoelectric conversion section is transferred via the n-type semiconductor region to the charge holding section.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: June 4, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Ryo Fukui, Takashi Machida
  • Patent number: 11973161
    Abstract: A photo sensor circuit includes: a photo transistor; a first switching transistor; a second switching transistor; and a capacitance element. The photo transistor includes: a gate connected to a first wiring; a source connected to a second wiring; and a drain. The first switching transistor includes: a gate connected to a third wiring; a source connected to a fourth wiring; and a drain connected to the drain of the photo transistor. The capacitance element includes: a first terminal connected to the drain of the photo transistor; and a second terminal connected to the source of the first switching transistor. The second switching transistor includes: a gate connected to a gate line; a source connected to a signal line; and a drain connected to the first terminal of the capacitance element. The photo transistor, first switching transistor, and second transistor each include an oxide semiconductor layer as a channel layer.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: April 30, 2024
    Assignee: JAPAN DISPLAY INC.
    Inventors: Masashi Tsubuku, Takanori Tsunashima, Marina Mochizuki
  • Patent number: 11955561
    Abstract: A disclosed transistor structure includes a gate electrode, an active layer, a source electrode, a drain electrode, an insulating layer separating the gate electrode from the active layer, and a carrier modification device that reduces short channel effects by reducing carrier concentration variations in the active layer. The carrier modification device may include a capping layer in contact with the active layer that acts to increase a carrier concentration in the active layer. Alternatively, the carrier modification device may include a first injection layer in contact with the source electrode and the active layer separating the source electrode from the active layer, and a second injection layer in contact with the drain electrode and the active layer separating the drain electrode from the active layer. The first and second injection layers may act to reduce a carrier concentration within the active layer near the source electrode and the drain electrode.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Wu-Wei Tsai, Hai-Ching Chen
  • Patent number: 11942405
    Abstract: A semiconductor package assembly includes a semiconductor package that includes a semiconductor chip bonded to a substrate. The assembly also includes a plurality of passive devices mounted on a bottom surface of the substrate opposite the semiconductor chip, the plurality of passive devices including a plurality of operable passive devices and a plurality of standoff passive devices, wherein a height of each of the plurality of standoff passive devices is greater than a height of any of the plurality of operable passive devices. The assembly also includes a plurality of solder structures attached to the bottom surface of the substrate. When mounted on a circuit board, the standoff passive devices prevent solder bridging.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: March 26, 2024
    Assignee: ATI TECHNOLOGIES ULC
    Inventors: Jianguo Li, Roden Topacio
  • Patent number: 11916161
    Abstract: A semiconductor light-receiving element, includes: a semiconductor substrate; a high-concentration layer of a first conductivity type formed on the semiconductor substrate; a low-concentration layer of the first conductivity type formed on the high-concentration layer of the first conductivity type and in contact with the high-concentration layer of the first conductivity type; a low-concentration layer of a second conductivity type configured to form a PN junction interface together with the low-concentration layer of the first conductivity type; and a high-concentration layer of the second conductivity type formed on the low-concentration layer of the second conductivity type and in contact with the low-concentration layer of the second conductivity type. The low-concentration layers have a carrier concentration of less than 1×1016/cm3. The high-concentration layers have a carrier concentration of 1×1017/cm3 or more.
    Type: Grant
    Filed: October 17, 2022
    Date of Patent: February 27, 2024
    Assignee: Lumentum Japan, Inc.
    Inventors: Takashi Toyonaka, Hiroshi Hamada, Shigehisa Tanaka
  • Patent number: 11908884
    Abstract: An inductive device includes an insulating layer, a lower magnetic layer, and an upper magnetic layer that are formed such that the insulating layer does not separate the lower magnetic layer and the upper magnetic layer at the outer edges or wings of the inductive device. The lower magnetic layer and the upper magnetic layer form a continuous magnetic layer around the insulating layer and the conductors of the inductive device. Magnetic leakage paths are provided by forming openings through the upper magnetic layer. The openings may be formed through the upper magnetic layer by semiconductor processes that have relatively higher precision and accuracy compared to semiconductor processes for forming the insulating layer such as spin coating. This reduces magnetic leakage path variation within the inductive device and from inductive device to inductive device.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: February 20, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yu Chou, Yang-Che Chen, Chen-Hua Lin, Victor Chiang Liang, Huang-Wen Tseng, Chwen-Ming Liu
  • Patent number: 11908832
    Abstract: The invention relates to a process for collectively bending microelectronic components comprising transferring microelectronic components (10) to and bending them on curved surfaces (21) of a shaping carrier (20), an adhesive layer (6) ensuring adhesion of the microelectronic components (10), and comprising producing conductive vias (22) that extend through the shaping carrier (20) and the adhesive lower layer (6), from the lower face (20i) of the shaping carrier (20), in order to emerge onto the lower conductive pads (12) of the microelectronic components (10).
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: February 20, 2024
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Alexis Rochas, David Henry, Stéphane Caplet
  • Patent number: 11894232
    Abstract: Methods for adjusting a work function of a structure in a substrate leverage near surface doping. In some embodiments, a method for adjusting a work function of a structure in a substrate may include coating surfaces of the structure to form a doping layer in a non-solid phase that contains dopants on the surfaces of the structure and performing a dopant diffusion process using an oxidation process to drive the dopants through the surfaces the structure to embed the dopants in the structure to adjust the work function of the structure near the surfaces to form an abrupt junction profile and form an oxidation layer on the surfaces of the structure. The coating of the surfaces of the structure may be performed using a gas-phase or liquid-phase process.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: February 6, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventor: Taichou Papo Chen
  • Patent number: 11881497
    Abstract: An image sensor, which stores electric charge overflowing from a photoelectric conversion layer, includes: (1) a substrate including a first surface and a second surface, which is opposite to the first surface and upon which light is incident, (2) a photoelectric conversion layer in the substrate, (3) an isolation film disposed on the substrate, along the photoelectric conversion layer, (4) a storage conductive pattern disposed in the isolation film, (5) a transfer gate disposed on a first surface of the substrate, (6) a first impurity-injected area disposed between the photoelectric conversion layer and the isolation film, and (7) a second impurity-injected area disposed on the first surface of the substrate and connected to the transfer gate. The first and second impurity-injected areas are electrically connected.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: January 23, 2024
    Inventors: Young Gu Jin, Young Chan Kim
  • Patent number: 11864877
    Abstract: The invention relates to a photoplethysmography (PPG) sensing device comprising—a pulsed light source, —at least one pixel to create photo-generated electrons, synchronized with said pulsed light source. It is mainly characterized in that each pixel comprises: —a pinned photodiode (PPD) having two electronic connection nodes, —a sense node (SN), to convert the photo-generated electrons into a voltage, and—a Transfer Gate (TGtransfer) transistor, having its source electronically connected to one electronic connection node of said pinned photodiode (PPD), and being configured to act as a transfer gate (TG) between said pinned photodiode (PPD) and said sense node (SN), allowing the photo-generated electrons to sink when the light is pulsed-off, the photo-generated electrons integration when the light is pulsed-on and the transfer of at least part of the integrated photo-generated electrons to said sense node for a read-out.
    Type: Grant
    Filed: January 4, 2023
    Date of Patent: January 9, 2024
    Assignee: ECOLE POLYTECHNIQUE FÉDÉRALE DE LAUSANNE (EPFL)
    Inventors: Assim Boukhayma, Antonino Caizzone, Christian Enz
  • Patent number: 11871569
    Abstract: A nonvolatile memory device according to an embodiment includes a substrate, a channel structure extending in a direction perpendicular to the substrate; a charge storage structure disposed to be in contact with the channel structure; and a cell electrode structure disposed to be in contact with the charge storage structure in a lateral direction, wherein the channel structure comprises a hole conduction layer and an electron conduction layer.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: January 9, 2024
    Assignee: SK hynix Inc.
    Inventors: Hyangkeun Yoo, Ju Ry Song, Se Ho Lee, Jae Gil Lee
  • Patent number: 11869910
    Abstract: The present disclosure provides a light sensing element including a unit. The unit includes a plurality of photodiodes, a color filter disposed above the photodiodes, and a light host embedded in the color filter. The light host is a hollow structure disposed above the photodiodes. The color filter includes a first portion surrounding the light host, a second portion surrounded by the light host, and a third portion covering and physically contacting the first portion, the light host, and the second portion.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: January 9, 2024
    Assignee: VisEra Technologies Company Ltd.
    Inventors: Ching-Hua Li, Zong-Ru Tu, Po-Hsiang Wang, Han-Lin Wu
  • Patent number: 11852756
    Abstract: A flexible digital radiographic detector assembly includes a flexible sleeve enclosing a photosensor array supported by a flexible substrate. Integrated circuit readout electronics are coupled to the photosensor array and to a circuit board having conductive contacts. The contacts engage a hand carried read out electronics box to initiate a read out of image data captured in the photosensor array and to display the image data on a screen in the read out electronics box.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: December 26, 2023
    Assignee: Carestream Health, Inc.
    Inventors: Todd D. Bogumil, Ravi K. Mruthyunjaya
  • Patent number: 11839101
    Abstract: A display substrate includes a display region and hollowed-out grooves provided at a periphery of the display region. The display substrate includes a first organic base layer, a light-emitting unit provided on the base structure layer and located at the display region; the first organic base layer is provided with a groove structure located between the hollowed-out grooves and the display region. The display substrate further includes a first inorganic package layer for covering the light-emitting unit and the groove structure.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: December 5, 2023
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Chengyuan Luo
  • Patent number: 11818482
    Abstract: An image sensor and a camera are provided. The image sensor includes: a demodulation clock generation circuit configured to generate first to fourth demodulation clock signals respectively having first to fourth phases; a demodulation phase selection circuit configured to generate first to fourth pre-demodulation signals based on the first to fourth demodulation clock signals and a random number that changes for each of a plurality of packets; a delay circuit configured to generate a first delay signals, second delay signals, third delay signals and fourth delay signals by delaying the first to fourth pre-demodulation signals by a plurality of delay phases; and a phase mixer configured to generate first to fourth demodulation signals of which phases are changed based on an address that changes for each of the plurality of packets. The first to fourth phases have a phase difference of 90° from each other.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: November 14, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Daeyun Kim, Myoungoh Ki, Seungchul Shin
  • Patent number: 11815716
    Abstract: An arrayed waveguide grating device includes an input coupler configured to receive a light signal and split the light signal into a plurality of output light signals. The device also includes a plurality of waveguides optically connected to the input coupler, each waveguide having a plurality of waveguide portions having respective sensitivities to variance in one or more parameters associated with operating of the optical arrayed grating device. Lengths of the respective portions are determined such that each waveguide applies a respective phase shift to the output light signal that propagates through the waveguide and the plurality of waveguides have at least substantially same change in phase shift with respective changes in the one or more parameters associated with operation of the device. An output coupler is optically connected to the plurality of waveguides to map respective light signals output from the plurality of waveguides to respective focal positions.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: November 14, 2023
    Assignee: MACOM Technology Solutions Holdings, Inc.
    Inventor: Sean P. Anderson
  • Patent number: 11810988
    Abstract: The present disclosure provides an integrated infrared circular polarization detector with a high extinction ratio and a design method thereof. The detector structurally includes a metal reflective layer, a bottom electrode layer, a quantum well layer, a top electrode layer, and a two-dimensional chiral metamaterial layer. Under circularly polarized light with the selected handedness, surface plasmon polariton waves are generated at the interface between the two-dimensional chiral metamaterial layer and the semiconductor, and has a main electric field component aligned with the absorption direction of the quantum wells, thereby enhancing the absorption of the quantum wells. Under circularly polarized light with the opposite handedness, since most of the optical power is reflected, surface plasmon polariton waves cannot be effectively excited, and the absorption of the quantum wells is extremely low, thus realizing the capability of infrared circular polarization detection with a high extinction ratio.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: November 7, 2023
    Assignee: Shanghai Institute of Technical Physics, Chinese Academy of Sciences
    Inventors: Jing Zhou, Zeshi Chu, Xu Dai, Yu Yu, Mengke Lan, Shangkun Guo, Jie Deng, Xiaoshuang Chen, Qingyuan Cai, Fangzhe Li, Zhaoyu Ji
  • Patent number: 11810809
    Abstract: A method for transferring micro light emitting diodes (micro-LEDs) includes forming a plurality of micro light emitting diode (micro-LED) chips having an epitaxial stacked layer and an electrode on a base; attaching the electrodes of the micro-LED chips to a temporary substrate and removing the base from the micro-LED chips; forming a light shielding layer on the temporary substrate; forming a light-transmissible packaging layer to cover the light shielding layer and the micro-LED chips; removing the temporary substrate to form a light emitting assembly; dividing the light emitting assembly to separate a plurality of pixels constituted by the micro-LEDs; and transferring the pixels to a permanent substrate.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: November 7, 2023
    Assignee: MACROBLOCK, INC.
    Inventors: Shih-Sian Liang, Wei-Ming Tseng
  • Patent number: 11762159
    Abstract: Embodiments described herein include an apparatus comprising a semiconductor-based photodiode disposed on a semiconductor layer, and an optical waveguide spaced apart from the semiconductor layer and evanescently coupled with a depletion region of the photodiode. The photodiode may be arranged as a vertical photodiode or a lateral photodiode.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: September 19, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Prakash B. Gothoskar, Vipulkumar K. Patel, Soha Namnabat, Ravi S. Tummidi
  • Patent number: 11757060
    Abstract: Short-wave infrared (SWIR) focal plane arrays (FPAs) comprising a Si layer through which light detectable by the FPA reaches photodiodes of the FPA, at least one germanium (Ge) layer including a plurality of distinct photosensitive areas including at least one photosensitive area in each of a plurality of photosensitive photosites, each of the distinct photosensitive areas comprising a plurality of proximate steep structures of Ge having height of at least 0.5 ?m and a height-to-width ratio of at least 2, and methods for forming same.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: September 12, 2023
    Assignee: TriEye Ltd.
    Inventor: Uriel Levy
  • Patent number: 11749760
    Abstract: A device and method for fabricating the same is disclosed. For example, the device includes a sensor having a front side and a back side, a metal interconnect layer formed on the front side of the sensor, an anti-reflective coating formed on the back side of the sensor, a composite etch stop mask layer formed on the anti-reflective coating wherein the composite etch stop mask layer includes a hydrogen rich layer and a compressive high density layer, and a light filter formed on the composite etch stop mask layer.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: September 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Han Lin, Chao-Ching Chang, Yi-Ming Lin, Yen-Ting Chou, Yen-Chang Chen, Sheng-Chan Li, Cheng-Hsien Chou
  • Patent number: 11728364
    Abstract: A method includes forming image sensors in a semiconductor substrate, thinning the semiconductor substrate from a backside of the semiconductor substrate, forming a dielectric layer on the backside of the semiconductor substrate, and forming a polymer grid on the backside of the semiconductor substrate. The polymer grid has a first refractivity value. The method further includes forming color filters in the polymer grid, wherein the color filters has a second refractivity value higher than the first refractivity value, and forming micro-lenses on the color filters.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: August 15, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kun-Huei Lin, Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Cheng Yuan Wang
  • Patent number: 11688640
    Abstract: Systems and methods for manufacturing flexible electronics are described herein. Methods in accordance with embodiments of the present technology can include disposing electrical features, such as thin film circuits, on a first side of a glass substrate, applying a first protective material over the electronic features, and exposing a second side of the glass substrate to a chemical etching tank to thin the glass substrate to a predetermined thickness. The thinning process can remove cracks and other defects from the second side of the glass substrate and enhance the flexibility of the electronic assembly. A second protective material can be disposed on the second side of the thinned glass substrate to maintain the enhanced backside surface of the glass substrate. In some embodiments, the method also includes singulating the plurality of electronic features into individual electronic components by submerging the electronic assembly into a chemical etching tank.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: June 27, 2023
    Assignee: NEXT Biometrics Group ASA
    Inventors: Tian Xiao, King Hong Kwan, Sheng-Hsiang Hung, Mark W. Naumann
  • Patent number: 11677036
    Abstract: A meta optical device configured to sense incident light includes a plurality of nanorods each having a shape dimension less than a wavelength of the incident light. Each nanorod includes a first conductivity type semiconductor layer, an intrinsic semiconductor layer, and a second conductivity type semiconductor layer. The meta optical device may separate and sense wavelengths of the incident light.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: June 13, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeongyub Lee, Woong Ko, Changseung Lee, Hongkyu Park, Chanwook Baik, Hongseok Lee, Wonjae Joo
  • Patent number: 11676976
    Abstract: A PIN photodetector includes an n-type semiconductor layer, an n-type semiconductor cap layer, a first plurality of p-type regions located within the n-type semiconductor cap layer and separated from one another by a distance d1, and an absorber layer located between the n-type semiconductor layer and the n-type semiconductor cap layer including the first plurality of p-type regions. The plurality of p-type regions are electrically connected to one another to provide an electrical response to light incident to the PIN photodetector.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: June 13, 2023
    Assignee: Attollo Engineering, LLC
    Inventors: Jonathan Geske, Andrew Hood, Michael MacDougal
  • Patent number: 11670659
    Abstract: An imaging element includes a photoelectric conversion unit including a first electrode 11, a photoelectric conversion layer 13, and a second electrode 12 that are stacked, in which the photoelectric conversion unit further includes a charge storage electrode 14 arranged apart from the first electrode 11 and arranged to face the photoelectric conversion layer 13 through an insulating layer 82, and when photoelectric conversion occurs in the photoelectric conversion layer 13 after light enters the photoelectric conversion layer 13, an absolute value of a potential applied to a part 13C of the photoelectric conversion layer 13 facing the charge storage electrode 14 is a value larger than an absolute value of a potential applied to a region 13B of the photoelectric conversion layer 13 positioned between the imaging element and an adjacent imaging element.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: June 6, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Taiichiro Watanabe, Fumihiko Koga, Kyosuke Ito, Hideaki Togashi, Yusaku Sugimori
  • Patent number: 11658274
    Abstract: A component is disclosed. In an embodiment the component includes a light-emitting element and a structured layer having an optical functionality, wherein the structured layer is arranged on the light-emitting element.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: May 23, 2023
    Assignee: TDK ELECTRONICS AG
    Inventors: Thomas Feichtinger, Stefan Sax
  • Patent number: 11653508
    Abstract: A polymer solar cell includes a photoactive layer, a cathode electrode, and an anode electrode. The photoactive layer includes a polymer layer and a carbon nanotube layer. The polymer layer includes a first polymer surface and a second polymer surface opposite to the first polymer surface. A portion of the carbon nanotube layer is embedded in the polymer layer, and another portion of the carbon nanotube layer is exposed from the polymer layer. The cathode electrode is located a surface of the carbon nanotube layer away from the polymer layer. The anode electrode is located on the first polymer surface and spaced apart from the carbon nanotube layer. The entire second polymer surface is exposed.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: May 16, 2023
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Wen Ning, Peng Liu, Kai-Li Jiang, Shou-Shan Fan
  • Patent number: 11639332
    Abstract: Provided herein are azo prodrugs of small-molecule isoindoline-1,3-diones and isoindoles anti-inflammatory inhibitors according to formula IA, in particular PDE4 inhibitors, which prodrugs can be administered orally to a subject in need thereof, whereby the prodrugs are cleaved in the colon and the PDE4 inhibitor released.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: May 2, 2023
    Assignees: AMGEN (EUROPE) GMBH
    Inventor: William R. Baker