Abstract: The semiconductor component, such as a Schottky diode with a low leakage current, has a metal-semiconductor junction between a first metal electrode and the semiconductor. The semiconductor, which is of a first conductivity type, has a defined drift path and a plurality of supplementary zones of a second conductivity type extending from the semiconductor surface into the drift path. A number of foreign atoms in the supplementary zones is substantially equal to a number of foreign atoms in intermediate zones surrounding the supplementary zones and the number of foreign atoms does not exceed a number corresponding to a breakdown charge of the semiconductor.

Abstract: A Schottky barrier diode is provided which has a substrate including a first-conductivity-type low concentration layer and a first-conductivity-type high concentration layer, and a guard ring region, comprising a second-conductivity-type diffusion layer having an impurity surface concentration of not greater than 5×1017/cm3, formed in the first-conductivity-type low concentration layer. The first-conductivity-type low concentration layer has a thickness large enough to prevent a depletion layer that appears in the low concentration layer upon application of the maximum reverse voltage from reaching the first-conductivity-type high concentration layer.

Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least {fraction (1/100)} of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.

Abstract: A semiconductor integrated circuit device has a semiconductor chip, on which are formed a plurality of input/output circuits and input/output pads individually connected electrically thereto. The input/output pads are connected electrically to a plurality of inner leads formed on the frame on which the semiconductor chip is mounted. The input/output circuits are arranged in two rows along each edge of the semiconductor chip, with the first row of input/output circuits arranged closer to the edge than the second row of input/output circuits. The input/output pads connected to the first-row input/output circuits are arranged in two rows in such a way that the first and second rows of input/output pads sandwich the first row of input/output circuits. The input/output pads connected to the second-row input/output circuits are arranged to form a third row of input/output pads along the second row of input/output circuits.

Abstract: A semiconductor integrated circuit is made up of a plurality of input-output circuit portions which are aligned at irregular intervals between a core portion and an external portion, a first guard-ring which is formed in the respective input-output circuit portions, and a second guard-ring which is formed between the respective input-output circuit portions. Accordingly, the semiconductor integrated circuit can prevent latch-up between the respective input-output circuit portions without changing the layout of the respective input-output circuit portions.

Abstract: The specification describes Schottky barrier devices with distributed guard rings. In one embodiment the guard ring only partially overlaps the barrier. In another embodiment the guard ring is spaced from the barrier throughout, but separated by an MOS gate so that the guard ring and barrier are connected at low bias by an inversion layer.

Abstract: An integrated circuit (IC) is provided. The IC includes a silicon substrate and a dielectric layer formed upon the silicon substrate. The IC further includes a terminal metal layer (TML) formed upon the dielectric layer. The dielectric layer and the TML form a die active area. The TML has formed therein a plurality of spaced locking structures. The plurality of space locking structures are electrically isolated therebetween. Each locking structure is formed outside the die active area. The IC further includes a passivation layer adhering to the locking structures.

Abstract: A multi guard ring structure for a reach-through type semiconductor device has at least first and second guard ring regions. The first guard ring region surrounds a main region with a predetermined first spacing. The second guard ring region surrounds the first guard ring region with a predetermined second spacing. To improve the ability to withstand reverse bias voltage, the second spacing between the first and second guard ring regions is made smaller than the first spacing between the main region and the first guard ring region in order that a maximum value of an electric field strength at a junction between the first guard ring region and the drift region may be equal to or lower than 85% of a maximum value of a field strength at the main junction at the avalanche breakdown condition of the main junction.

Abstract: A method of forming a guard wall for a semiconductor die is described. A dielectric layer is deposited over a semiconductor substrate. The dielectric layer is patterned to form a guard wall opening extending through the dielectric layer. The guard wall opening lies adjacent to an electrically active region of the die. The guard wall opening has a pattern without any straight line segments greater than about 10 .mu.m long. A first layer is deposited over the substrate and etched to form a first layer sidewall spacer along a side of the guard wall opening. A second layer is deposited within the guard wall opening to form the guard wall.

Abstract: The present invention relates to a schottky-barrier diode capable of decreasing a leakage current due to damage generated on inner walls of trenches, and securing a large operation region for itself. In the device, an N.sup.- -type epitaxial layer is formed on a N.sup.+ -type silicon substrate. In a predetermined region in the epitaxial layer, a P.sup.+ -type base diffusion layer having high impurity concentration is formed. Trenches are formed through from the surface of the base diffusion layer to the epitaxial layer. In each of the trenches, an N.sup.- -type selective epitaxial growth region is formed. A schottky metal is formed on a surface comprising the surfaces of the base diffusion layer, which includes the selective epitaxial growth regions, and the epitaxial layer. Surface regions as the surfaces of the selective epitaxial growth regions filling the trenches function as diode operation regions.

Abstract: In the present invention, a vertical type MOSFET and a Schottky barrier diode which are used as a switching device of a DC--DC converter are formed on the same semiconductor substrate. Further, a barrier metal which is required for the Schottky barrier diode is also formed on an electrode portion of the vertical type MOSFET. In addition, a Schottky barrier diode forming region is formed to have low impurity concentration than a vertical type MOSFET forming region.

Abstract: A Schottky diode assembly includes a Schottky contact formed on a semiconductor substrate and having a semiconductor region of a first conduction type, a metal layer disposed adjacently on the semiconductor region, a protective structure constructed on a peripheral region of the Schottky contact and a doped region in the semiconductor substrate having a second conduction type of opposite polarity from the first conduction type. The doped region extends from a main surface of the semiconductor substrate to a predetermined depth into the semiconductor substrate. The doped region of the protective structure has at least two different first and second doped portions located one below the other relative to the main surface of the semiconductor substrate. The first doped portion is at a greater depth and has a comparatively lesser doping, and the second doped portion has a comparatively higher doping and a slight depth adjacent the main surface of the semiconductor substrate.

Abstract: A vertical conduction Schottky device having a reverse voltage rating in excess of 400 volts uses an aluminum barrier metal in contact with an N.sup.- epitaxial silicon surface. A diffused P.sup.+ guard ring surrounds the barrier metal contact and is spaced therefrom by a small gap which is fully depleted at a low reverse voltage to connect the ring to the barrier contact under reverse voltage conditions. Lifetime killing is used for the body of the diode.

Abstract: A MESFET structure (20) and a method that minimizes the effects of processing steps and device performance of the MESFET structure (20). The MESFET structure (20) has a gate (30) positioned over a channel region (28) and between a source region (36) and a drain region (34). The MESFET structure (20) further includes a hole injector region (32) formed near the channel region (28). The hole injector region (32) injects holes beneath the channel region (28) which decrease the ability of the trap sites to attract electrons generated by impact ionization. Thus, this supply of holes beneath the channel region (28) prevents the effects of IV-kink and hysteresis caused by electrons that are accumulated in the trap sites.

Abstract: The preferred embodiment of the present invention overcomes the limitations of the prior art and provides a device and method to decrease the latch-up susceptibility of an ESD structure by suppressing the injection of minority carriers that cause transistor action to occur. This is accomplished, for example, by using a metal contact to the n-substrate or n-well in place of or in parallel with the prior art p-diffusion. Using such a metal contact forms a Schottky Barrier Diode (SBD) with the ESD structure. Since the SBD is a majority-carrier device, negligible minority carriers are injected when the SBD is in forward bias, thereby reducing the likelihood of latch-up.

Abstract: In a semiconductor electron emission device for causing an avalanche breakdown by applying a reverse bias voltage to a Schottky barrier junction between a metallic material or metallic compound material and a p-type semiconductor, and externally emitting electrons from a solid-state surface, a p-type semiconductor region (first region) for causing the avalanche breakdown contacts a p-type semiconductor region (second region) for supplying carriers to the first region, and a semi-insulating region is formed around the first region.

Abstract: An n- or p-doped semiconductor region accommodates the depletion zone of an active area of the semiconductor component with a vertical extension dependent upon an applied blocking voltage. The junction termination for the active area is constituted with a semiconductor doped oppositely to the semiconductor region, and is arranged immediately adjacently around the active area on or in a surface of the semiconductor region. The lateral extension of the junction termination is greater than the maximum vertical extension of the depletion zone, and the semiconductor region as well as the junction termination are constituted with a semiconductor with a band gap of at least 2 eV.

Abstract: A Schottky barrier diode having improved breakdown characteristics has an n.sup.+ semiconductor layer and an n.sup.- semiconductor layer provided on the n.sup.+ semiconductor layer. The n.sup.- semiconductor layer is configured to form a mesa. An insulating layer is formed so as to expose the upper surface of the mesa. An anode electrode is provided on the exposed surface and a side surface of the mesa, while a cathode is electrically connected to the n.sup.+ layer. A plasma treated layer is provided in the n.sup.- semiconductor layer so as to extend inwardly from at least a portion of the side surface of the mesa.

Abstract: A high operating voltage bipolar transistor (42) includes a base including a first region (52) of a lightly doped layer (44) of semiconductor material of a first conductivity type. The transistor (42) also includes a collector including a buried layer (50) and a collector region (48). The lightly doped layer (44) is formed over the buried layer (50) and the collector region (48) extends through the lightly doped layer (44) and contacts the buried layer (50). The transistor (42) also includes an emitter formed in the base. The transistor (42) provides a high operating voltage without requiring an increased thickness epitaxial layer or additional processing steps. A high Hfe transistor and high voltage Schottky diode are also described.

Abstract: A high speed soft recovery diode having a large breakdown voltage is disclosed. Anode P layers (3) are selectively formed in a top portion of an N.sup.- body (2). A P.sup.- layer (4a) is disposed in the top portion of the N.sup.- body (2) so as to be spacewise complementary to the anode P layers (3). In the N.sup.- body (2), P regions (5) are selectively formed below the P.sup.- layer (4a). On the N.sup.- body (2), an anode electrode (6) is disposed in contact with both the P.sup.- layer (4a) and the anode P layers (3). A cathode electrode (7) is disposed under the N.sup.- body (2) through a cathode layer (1). When the diode is reverse-biased, a depletion layer does not have a sharply curved configuration due to the P regions (5). Hence, concentration of electric field is avoided and a breakdown voltage would not deteriorate. During forward-bias state of the diode, injection of excessive holes from the anode P layers (3) into the N.sup.- body (2) is prevented, thereby reducing a recovery current.

Abstract: A method for making a schottky diode structure (10) simultaneously with a polysilicon contact structure (31,33) to a transistor is provided. In a single process step, a polysilicon layer is patterned to expose a single crystal semiconductor region (22a) over one portion of a substrate, while leaving portions the polysilicon layer (31, 33, 29) intact over other portions of the substrate (22b). Multi-layer metal electrodes are deposited and patterned to form a rectifying schottky contact to the exposed single crystal region (22a), and to form an ohmic contact to the exposed polysilicon (31, 33, 29).

Abstract: This is an electron emission with a semiconductor substrate having a p-type semiconductor layer whose impurity concentration falls within a concentration range for causing an avalanche breakdown in a least a portion of a surface of the semiconductor layer. A Schottky electrode is connected to the semiconductor layer. There are a means for applying a reverse bias voltage between the Schottky electrode and the p-type semiconductor layer to cause the Schotty electrode to emit electrons, and a lead electrode, formed at a proper position, for externally guiding the emitted electrons. At least a portion of the Schottky electrode is formed of a thin film of a material selected from metals of Group 1A, Group 2A, Group 3A, and lanthanoids, metal silicides of Group 1A, Group 2A, Group Group 3A, and lanthanoids, and metal borides of Group 1A, Group 2A, Group 3A, and lanthanoids, and metal carbides of Group 4A. A film thickness of the Schotty electrode is set to be not more than 100 .ANG..

Abstract: A Schottky diode circuit 20 is formed on a semiconductor layer 24. A conductive contact 36 on the surface of the semiconductor layer 24 forms a Schottky barrier 40 at the junction of the conductive contact 36 and the semiconductor layer 24. A guard ring 26 in the semiconductor layer 24 is adjacent to the Schottky barrier 40 and is separated from the conductive contact 36 by a portion of the semiconductor layer 24. No direct electrical path exists between the guard ring 26 and the conductive contact 36.

Abstract: A sensing transducer (10,30) and a method therefor uses a Schottky junction (12) having a conductive layer (16) disposed on a semiconductor substrate (14). The conductive layer (16) is generally formed from the reaction of a metal with a portion of the semiconductor substrate (14). One example of the conductive layer (16) is a metal silicide layer. In one pressure sensing approach, a substantially constant reverse current (I.sub.1) is applied to the Schottky junction (12). The change in reverse output voltage of the junction (12) is proportional to the change in pressure on the junction (12) itself, and can thus be used to sense pressure. This output voltage change is significantly higher than that achieved with prior pressure transducers and permits the output signal of the transducer (10,30) according to the present invention to be substantially used without extra amplification or other conditioning.

Abstract: A method of producing a semiconductor device including a Schottky barrier diode (SBD) comprising the steps of: selectively forming an insulating layer having a first contact hole and a second contact hole, on a (100) silicon semiconductor substrate; selectively forming a polysilicon layer extending from the first contact hole to the second contact hole, the polysilicon layer having a viahole within the first contact hole for selectively exposing the silicon semiconductor substrate; and selectively depositing a refractory metal (tungsten or molybdenum) layer on the polysilicon layer and an exposed portion of the substrate within the viahole by a selective CVD process, so that the SBD is formed between the exposed portion and the metal layer. The refractory metal layer is formed on the silicon of the exposed portion of the substrate and the polysilicon layer and is not formed on the insulating layer, and thus it is unnecessary to perform a photolithography process for patterning the refractory metal layer.

Abstract: A semiconductor device is provided having a first semiconductor region comprising an n-type semiconductor and a second semiconductor region of an n-type semiconductor having a higher resistivity than the first semiconductor region. An insulation film is provided adjacent to the semiconductor region having an aperture therein, and an electrode region is provided in the aperture. A third semiconductor region comprising a p-type semiconductor is provided at a junction between the insulation film and the electrode region. The electrode comprises a monocrystalline metal and constitutes a Schottky junction with the semiconductor region. An ohmic electrode comprising aluminum is arranged on the electrode region.

Abstract: A Schottky diode circuit 20 is formed on a semiconductor layer 24. A conductive contact 36 on the surface of the semiconductor layer 24 forms a Schottky barrier 40 at the junction of the conductive contact 36 and the semiconductor layer 24. A guard ring 26 in the semiconductor layer 24 is adjacent to the Schottky barrier 40 and is separated from the conductive contact 36 by a portion of the semiconductor layer 24. No direct electrical path exists between the guard ring 26 and the conductive contact 36.

Abstract: An integrated circuit including an array of diodes includes first Schottky diodes, each of which is connected by its cathode to a point to be protected and by its anode to a reference voltage, and second Schottky diodes, each of which is connected by its anode to a point to be protected and by its cathode to the cathode of an avalanche diode, the anode of which is connected to the reference voltage. This integrated circuit includes, in a P-type substrate, a first and a second group of N-type wells; an ohmic contact and a Schottky contact on each well; an N-type region on the upper surface of the substrate; a metallization connecting the ohmic contacts of the first group of wells to the N-type region; a metallization connecting the Schottky contacts of the second wells; metallizations respectively connecting a Schottky contact of the second group of wells to an ohmic contact of the first wells; and a rear surface metallization.

Abstract: A Schottky barrier diode includes a semiconductor substrate, an ohmic electrode formed on a first region of the semiconductor substrate, and a Schottky metal electrode formed on a second region spaced apart from the first region on the semiconductor substrate. The Schottky electrode includes at least one ohmic portion forming an ohmic contact with the semiconductor substrate, whereby rectifying characteristics of the Schottky barrier diode are improved.

Abstract: A semiconductor device includes a diode having a Schottky barrier and a MOS transistor integrally formed in one and the same semiconductor substrate in which the diode and MOS transistor have their main electrode in common use. The diode has a first diode portion having a pn junction in a current-passing direction and a second diode portion having a combination of the Schottky barrier and another pn junction in the current passing direction.

Abstract: A semiconductor rectifier having a high breakdown voltage and a high speed operation is provided, which includes a semiconductor substrate having an N.sup.+ -type semiconductor layer and an N-type semiconductor layer, a P.sup.+ -type semiconductor layer formed in the N-type semiconductor layer to provide a PN junction therebetween, the P.sup.+ -type semiconductor layer defining exposed regions of the N-type semiconductor layer, and a metal layer provided on an entire surface of the semiconductor substrate having the P.sup.+ -type semiconductor layer to provide contact surfaces of Schottky barrier between the metal layer and each of the exposed regions of the N-type semiconductor layer. In the structure, a configuration of the PN junction is provided to satisfy conditions given by 0.degree.<.theta..ltoreq.135.degree. and 3Wbi.ltoreq.W.ltoreq.2W.sub.B where .theta.