Abstract: An embodiment of a semiconductor device includes a gallium nitride (GaN) substrate having a first surface and a second surface. The second surface is substantially opposite the first surface, at least one device layer is coupled to the first surface, and a backside metal is coupled to the second surface. A top metal stack is coupled to the at least one device layer. The top metal stack includes a contact metal coupled to a surface of the at least one device layer, a protection layer coupled to the contact metal, a diffusion barrier coupled to the protection layer, and a pad metal coupled to the diffusion barrier. The semiconductor device is configured to conduct electricity between the top metal stack and the backside metal.

Abstract: A microelectronic device, including: a substrate and a plurality of metal interconnection levels stacked on the substrate; a first metal line of a given metal interconnection level; a second metal line of another metal interconnection level located above the given metal interconnection level, the first and second lines are interconnected via at least one semiconductor connection element extending in a direction forming a nonzero angle with the first metal lines and the second metal line; and a gate electrode capable of controlling conduction of the semiconductor connection element.

Abstract: A light emitting device, a light emitting device package, and a lighting system are provided. The light emitting device includes a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first and second conductive type semiconductor layers. The active layer includes a first active layer adjacent to the second conductive type semiconductor layer, a second active layer adjacent to the first conductive type semiconductor layer, and a gate quantum barrier between the first and second active layers.

Abstract: This invention reveals a constant current semiconductor device of an N-type or a P-type epitaxial layer on a semi-insulating substrate, the device is treated by using a Schottky barrier to cut off current in conduction channels under certain bias and to provide constant current within cut-off voltage and breakdown voltage region between Schottky barrier section/ohmic contact section as the first electrode and the other ohmic contact section as the second electrode respectively, and has excellent characteristics as lower cut-off voltage (Vkp) than bipolar devices and easily gets higher constant current (Ip) by integrating several constant current units.

Abstract: A light emitting device, a light emitting device package, and a lighting system are provided. The light emitting device includes a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first and second conductive type semiconductor layers. The active layer includes a first active layer adjacent to the second conductive type semiconductor layer, a second active layer adjacent to the first conductive type semiconductor layer, and a gate quantum barrier between the first and second active layers.

Abstract: In some embodiments, a memory cell includes a transistor gate spaced from a channel region by gate dielectric; a source region on one side of the channel region; and a drain region on an opposing side of the channel region from the source region. The channel region has phase change material adjacent the drain region. In some embodiments, the phase change material may be adjacent both the source region and the drain region. Some embodiments include methods of programming a memory cell that has phase change material adjacent a drain region. An inversion layer is formed within the channel region adjacent the gate dielectric, with the inversion layer having a pinch-off region within the phase change material adjacent the drain region. Hot carriers (for instance, electrons) within the pinch-off region are utilized to change a phase within the phase change material.

Abstract: An exemplary light emitting diode includes a conductive base, an LED die, a transparent conductive layer and at least one pad. The LED die includes a p-type GaN layer connected to the base, an active layer on the p-type GaN layer, and an n-type GaN layer on the active layer. The transparent conductive layer is coated on an exposed side of the n-type GaN layer. The exposed side has an arched central portion, which in one embodiment is concave and in another embodiment is convex. The at least one n-side pad is mounted on the transparent conductive layer. The at least one n-side pad and the conductive base are for connecting with a power source.

Abstract: In some embodiments, a memory cell includes a transistor gate spaced from a channel region by gate dielectric; a source region on one side of the channel region; and a drain region on an opposing side of the channel region from the source region. The channel region has phase change material adjacent the drain region. In some embodiments, the phase change material may be adjacent both the source region and the drain region. Some embodiments include methods of programming a memory cell that has phase change material adjacent a drain region. An inversion layer is formed within the channel region adjacent the gate dielectric, with the inversion layer having a pinch-off region within the phase change material adjacent the drain region. Hot carriers (for instance, electrons) within the pinch-off region are utilized to change a phase within the phase change material.

Abstract: The present invention provides for nanostructures grown on a conducting or insulating substrate, and a method of making the same. The nanostructures grown according to the claimed method are suitable for interconnects and/or as heat dissipators in electronic devices.

Abstract: In some embodiments, a memory cell includes a transistor gate spaced from a channel region by gate dielectric; a source region on one side of the channel region; and a drain region on an opposing side of the channel region from the source region. The channel region has phase change material adjacent the drain region. In some embodiments, the phase change material may be adjacent both the source region and the drain region. Some embodiments include methods of programming a memory cell that has phase change material adjacent a drain region. An inversion layer is formed within the channel region adjacent the gate dielectric, with the inversion layer having a pinch-off region within the phase change material adjacent the drain region. Hot carriers (for instance, electrons) within the pinch-off region are utilized to change a phase within the phase change material.

Abstract: The present invention provides for an array of nanostructures grown on a conducting substrate. The array of nanostructures as provided herein is suitable for manufacturing electronic devices such as an electron beam writer, and a field emission device.

Abstract: A means for effectively preventing the temperature rise of the diode when the bypass diode is operating in a terminal box for a crystalline silicon solar cell panel is provided. The present invention is characterized in that, in the terminal box for a crystalline silicon solar cell panel, Schottky barrier diode is used as a bypass diode. Preferably, the forward-direction voltage drop of the Schottky barrier diode is the specific value or below at the specific junction temperature. Preferably, as a Schottky barrier diode, a package diode which is surface-mounting type or non-insulation type is used.

Abstract: In some embodiments, a memory cell includes a transistor gate spaced from a channel region by gate dielectric; a source region on one side of the channel region; and a drain region on an opposing side of the channel region from the source region. The channel region has phase change material adjacent the drain region. In some embodiments, the phase change material may be adjacent both the source region and the drain region. Some embodiments include methods of programming a memory cell that has phase change material adjacent a drain region. An inversion layer is formed within the channel region adjacent the gate dielectric, with the inversion layer having a pinch-off region within the phase change material adjacent the drain region. Hot carriers (for instance, electrons) within the pinch-off region are utilized to change a phase within the phase change material.

Abstract: A semiconductor device comprises a first layer (1) of a wide band gap semiconductor material doped according to a first conductivity type and a second layer (3) on top thereof designed to form a junction blocking current in the reverse biased state of the device at the interface to said first layer. The device comprises extension means for extending a termination of the junction laterally with respect to the lateral border (6) of the second layer. This extension means comprises a plurality of rings (16-21) in juxtaposition laterally surrounding said junction (15) and being arranged as seen in the lateral direction away from said junction alternatively a ring (16-18) of a semiconductor material of a second conductivity type opposite to that of said first layer and a ring (19-21) of a semi-insulating material.

Abstract: The present invention provides for an array of nanostructures grown on a conducting substrate. The array of nanostructures as provided herein is suitable for manufacturing electronic devices such as an electron beam writer, and a field emission device.

Abstract: Failure light emission of an EL element due to failure film formation of an organic EL material in an electrode hole 46 is improved. By forming the organic EL material after embedding an insulator in an electrode hole 46 on a pixel electrode and forming a protective portion 41b, failure film formation in the electrode hole 46 can be prevented. This can prevent concentration of electric current due to a short circuit between a cathode and an anode of the EL element, and can prevent failure light emission of an EL layer.

Abstract: Disclosed are a liquid crystal display and a substrate for the same. The substrate comprises first wires formed in one direction on the substrate; second wires intersecting and insulated from the first wires; pixel electrodes formed in pixel regions defined by the first wires and the second wires; and switching elements connected to the first wires, the second wires and the pixel electrodes, wherein an interval between two adjacent second wires has a predetermined dimension that repeatedly varies from one set of adjacent second wires to the next, and a side of the pixel electrodes adjacent to the second wires is shaped in a pattern identical to the second wires such that the pixel electrodes have a wide portion and a narrow portion.

Abstract: Metal-Semiconductor-Metal (“MSM”) photodetectors and methods to fabricate thereof are described. The MSM photodetector includes a thin heavily doped (“delta doped”) layer deposited at an interface between metal contacts and a semiconductor layer to reduce a dark current of the MSM photodetector. In one embodiment, the semiconductor layer is an intrinsic semiconductor layer. In one embodiment, the thickness of the delta doped layer is less than 100 nanometers. In one embodiment, the delta doped layer has a dopant concentration of at least 1×1018 cm?3. A delta doped layer is formed on portions of a semiconductor layer over a substrate. Metal contacts are formed on the delta doped layer. A buffer layer may be formed between the substrate and the semiconductor layer. In one embodiment, the substrate includes silicon, and the semiconductor layer includes germanium.

Abstract: On the back surface of a transparent plate having a light extracting part for outputting lights to the outside, an electrode for wiring, and an electrode for an electromagnetic shield, an optical device is flip-chip mounted right under the light extracting part, an a driver IC is flip-chip mounted at a desired position with metal bumps. When currents driving the optical device flow from the driver IC according to an electric logical signal from the outside, an optical signal is emitted from the optical device, and is output to the outside through the light extracting part. The light extracting part may be provided with a light coupling material or an optical axis converter.

Abstract: The present invention provides for nanostructures grown on a conducting substrate, and a method of making the same. The nanostructures grown according to the claimed method are suitable for manufacturing electronic devices such as an electron beam writer, and a field emission display.

Abstract: This invention discloses a bottom-anode Schottky (BAS) diode that includes an anode electrode disposed on a bottom surface of a semiconductor substrate. The bottom-anode Schottky diode further includes a sinker dopant region disposed at a depth in the semiconductor substrate extending substantially to the anode electrode disposed on the bottom surface of the semiconductor and the sinker dopant region covered by a buried Schottky barrier metal functioning as an Schottky anode.

Abstract: Disclosed is a photoelectric surface including: a first group III nitride semiconductor layer that produces photoelectrons according to incidence of ultraviolet rays; and a second group III nitride semiconductor layer provided adjacent to the first group III nitride semiconductor layer and made of a thin-film crystal having c-axis orientation in a thickness direction, the second group III nitride semiconductor layer having an Al composition higher than that of the first group III nitride semiconductor layer.

Abstract: Planar AWG circuits and systems are disclosed that use air trench bends to increase planar circuit compactness.

Abstract: A method of fabricating an image sensor device (5) transferring an intensity of radiation (1) into an electrical current (i-i, a2) depending on said intensity, comprising the following steps in a vacuum deposition device: Depositing onto a dielectric, insulating surface a matrix of electrically conducting pads (7a, 7b) as rear electrical contacts, plasma assisted exposing said surface with pads to a donor delivering gas without adding a silicon containing gas, depositing a layer (15) of intrinsic silicon from a silicon delivering gas depositing a doped layer (17) and arranging an electrically conductive layer (19) transparent for said radiation (1) as a front contact. The method of fabricating an image-sensor-device and the image-sensor-device are avoiding disadvantages of the prior art. This means the image-sensor-device of the invention has a good ohmic contact, a low dark-current, no pixel-cross-talk and a reproducible fabrication-process.

Abstract: The invention relates to a TFA image sensor with stability-optimized photodiode for converting electromagnetic radiation into an intensity-dependent photocurrent with an intermetal dielectric, on which, in the region of the pixel matrix, a lower barrier layer is situated and a conductive layer is situated on the barrier layer, and vias being provided for the contact connection to the ASIC, the vias in metal contacts on the ASIC. A TFA image sensor having improved electrical properties is provided. This is achieved in that an intrinsic absorption layer is provided between the TCO layer and the barrier layer with a layer thickness of between 300 nm and 600 nm. Before the application of the photodiodes, the topmost, comparatively thick metal layer of the ASIC is removed and replaced by a matrix of thin metal electrodes which form the back electrodes of the photodiodes, the matrix being patterned in the pixel raster.

Abstract: A semiconductor light-receiving device has a substrate including upper, middle and lower regions in its front side. A p-type layer on the lower region has a top surface including a portion on a level with the middle region. An electrode covers at least part of the boundary between the portion of the p-type layer and the middle region. An n-type layer on the p-type layer has a top surface including a portion on a level with the upper region. Another electrode covers at least part of the boundary between the portion of the n-type layer and the upper region.

Abstract: Electromagnetic energy is detected with high efficiency in the spectral range having wavelengths of about 1–2 microns by coupling an absorber layer having high quantum efficiency in the spectral range having wavelengths of about 1–2 microns to an intrinsic semiconducting blocking region of an impurity band semiconducting device included in a solid state photon detector.

Abstract: Fabrication of a light emitting device includes etching of a substrate of the light emitting device. The etch may be an aqueous etch sufficient to increase an amount of light extracted through the substrate. The etch may be a direct aqueous etch of a silicon carbide substrate. The etch may remove damage from the substrate that results from other processing of the substrate, such as damage from sawing the substrate. The etch may remove an amorphous region of silicon carbide in the substrate.

Abstract: An active pixel includes a a photosensitive element formed in a semiconductor substrate. A transfer transistor is formed between the photosensitive element and a floating diffusion and selectively operative to transfer a signal from the photosensitive element to the floating diffusion. The floating diffusion is formed from an n-type implant with a dosage in the range of 5e13 to 5e14 ions/cm2. Finally, an amplification transistor is controlled by the floating diffusion.

Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.

Abstract: A board for an electronic device is provide comprising a substrate having an amorphous layer, a buffer layer formed on the amorphous layer, the buffer layer having an orientation at least in the direction of its thickness, and a conductive oxide layer formed on the buffer layer by means of epitaxial growth, the conductive oxide layer having a metal oxide of a perovskite structure. The buffer layer contains at least one of the group consisting of a metal oxide of a NaCl structure and a metal oxide of a fluorite structure. Furthermore, the buffer layer 12 is formed by epitaxial growth in the cubic crystal (100) orientation.

Abstract: In a method of forming a semiconductor device with a first channel layer formed over a portion of a second channel layer, a portion of the second channel underlying the first channel is etched so as to form an overhanging ledge in the first channel, and then a metallic contact disposed on top of the ledge portion is diffused into the first channel by ohmic alloying to form an electrode in the first channel.

Abstract: This invention relates to a MOS transistor made in the thin film of silicon of an SOI chip (10), said thin film (13) being slightly doped and of less than 30 nm in thickness, the source (14) and drain (15) contacts being of the Schottky type at the lowest level of Schottky barrier possible for majority carriers, with an accumulation type transistor operation.

Abstract: A semiconductor device includes a SiC substrate and an ohmic electrode, a semiconductor member including a SiC member and a SiGe member being formed between the SiC substrate and the ohmic electrode, wherein the semiconductor member is composed of a SiGe member formed on a SiC member, and the ohmic electrode is formed on the SiGe member, whereby the ohmic electrode with a low resistance can be formed on the SiC substrate without conducting a heat treatment at a high temperature.

Abstract: An integrated circuit is provided that includes a substrate incorporating a semiconductor photodiode device having a p-n junction. The photodiode device includes at least one capacitive trench buried in the substrate and connected in parallel with the junction. In a preferred embodiment, the substrate is formed from silicon, and the capacitive trench includes an internal doped silicon region partially enveloped by an insulating wall that laterally separates the internal region from the substrate. Also provided is a method for fabricating an integrated circuit including a substrate that incorporates a semiconductor photodiode device having a p-n junction.

Abstract: The present invention provides a photovoltaic device including a plurality of unit devices stacked, each unit device consisting of a silicon-based non-single-crystal semiconductor material and having a pn or pin structure, in which an oxygen atom concentration and/or a carbon atom concentration have maximum peaks in the vicinity of a p/n interface between the plurality of unit devices, thereby stabilizing the p/n interface and improving the interfacial characteristics and the film adhesion to attain a high photoelectric conversion efficiency of the photovoltaic device.

Abstract: There is provided a semiconductor device having TFTs whose thresholds can be controlled. There is provided a semiconductor device including a plurality of TFTs having a back gate electrode, a first gate insulation film, a semiconductor active layer a second gate insulation film and a gate electrode, which are formed on a substrate, wherein an arbitrary voltage is applied to the back gate electrode.

Abstract: The prevention of the deterioration of the minority carrier lifetime of a semiconductor substrate can be achieved by patterning the material of an impurity diffusion protecting layer on the surface of a semiconductor substrate by a making except a thermal oxidation process of the semiconductor substrate, for example by printing and firing paste material or by depositing paste material using a mask by CVD and forming a diffusion layer in the shape of an inverted pattern of the impurity diffusion protecting layer. Also, a low-priced photovoltaic device the photo-electric conversion efficiency of which is high can be manufactured by patterning and forming them.

Abstract: The performance of nitride based diodes is currently limited by the resistivity of the ohmic contacts to the p-type GaN. The large value of the contact resistance contributes to a large voltage for device operation. This in turn causes device heating, making cw operation difficult and limiting the device lifetime. A layer of GaP or GaNP alloy between the GaN and the metal contact layer serves to bridge the energetic barrier between the GaN valence band and the metal Fermi level, thus enhancing the hole injection and reducing the contact resistance.

Abstract: A photoelectric converter of a high signal-to-noise ratio, low cost, high productivity and stable characteristics and a system including the above photoelectric converter. The photoelectric converter includes a photoelectric converting portion in which a first electrode layer, an insulating layer for inhibiting carriers from transferring, a photoelectric converting semiconductor layer of a non-single-crystal type, an injection blocking layer for inhibiting a first type of carriers from being injected into the semiconductor layer and a second electrode layer are laminated in this order on an insulating substrate.

Abstract: A semiconductor device including a conductive substrate or a first conductive layer formed on the substrate, a non-single-crystal semiconductor layer member is disposed on the conductive substrate or the conductive layer, the non-single-crystal semiconductor layer member having at least one intrinsic, non-single-crystal semiconductor layer, and a second conductive layer disposed on the non-single-crystal semiconductor layer. The intrinsic non-single-crystal semiconductor layer contains sodium and oxygen in very low concentrations where each concentration is 5×1018 atoms/cm3 or less.

Abstract: A Schottky barrier diode and process of making is disclosed. The process forms a metal contact pattern in masked areas on a silicon carbide wafer. A preferred embodiment includes on insulating layer that is etched in the windows of the mask. An inert edge termination is implanted into the wafer beneath the oxide layer and adjacent the metal contacts to improve reliability. A further oxide layer may be added to improve surface resistance to physical damage.

Abstract: An improved diode or rectifier structure and method of fabrication is disclosed involving the incorporation in a Schottky rectifier, or the like, of a dielectric filled isolation trench structure formed in the epitaxial layer adjacent the field oxide layers provided at the edge of the active area of the rectifier, for acting to enhance the field plate for termination of the electric field generated by the device during operation. The trench is formed in a closed configuration about the drift region and by more effectively terminating the electric field at the edge of the drift region the field is better concentrated within the drift region and acts to better interrupt reverse current flow and particularly restricts leakage current at the edges.

Abstract: A photoelectric conversion device has a non-single-crystal semiconductor laminate member formed on a substrate having a conductive surface, and a conductive layer formed on the non-single-crystal semiconductor laminate member. The non-single-crystal semiconductor laminate member has such a structure that a first non-single-crystal semiconductor layer having a P or N first conductivity type, an I-type second non-single-crystal semiconductor layer and a third non-single-crystal semiconductor layer having a second conductivity type opposite the first conductivity type are laminated in this order. The first (or third) non-single-crystal semiconductor layer is disposed on the side on which light is incident, and is P-type. The I-type non-single-crystal semiconductor layer has introduced thereinto a P-type impurity, such as boron which is distributed so that its concentration decreases towards the third (or first) non-single-crystal semiconductor layer in the thickwise direction of the I-type layer.

Abstract: A Schottky diode comprises a semiconductor body of one conductivity type, the semiconductor body having a grooved surface, a metal layer on the grooved surface and forming a Schottky junction with sidewalls of the grooved surface and ohmic contacts with top portions of the grooved surface. The semiconductor body preferably includes a silicon substrate with the grooved surface being on a device region defined by a guard ring of a conductivity type opposite to the conductivity type of the semiconductor body, and a plurality of doped regions at the bottom of grooves and forming P-N junctions with the semiconductor body. The P-N junctions of the doped regions form carrier depletion regions across and spaced from the grooves to increase the reverse bias breakdown voltage and reduce the reverse bias leakage current. The ohmic contacts of the metal layer increase forward current and reduce forward voltage of the Schottky diode.

Abstract: The invention relates to a semiconductor device, in particular a Schottky hybrid diode with a guard ring (S). The semiconductor device comprises a semiconductor substrate (1), an epitaxial layer (2) on which an insulating layer (3) with an opening (10) is deposited, with a Schottky metal layer (9) covering the epitaxial layer (2) lying at the bottom of the opening (10), and with an annular semiconductor region (4) which is present in the epitaxial layer (2). A doping region (6) is present in the epitaxial layer (2) along the outer contour of the semiconductor device, and in addition an oxide layer (8) is present on the epitaxial layer (2).

Abstract: A thin film transistor (TFT) which may be used as a pixel drive element in an active matrix LCD display includes a pair of side wall spacers adjacent to the opposing side walls of its gate electrode. The side wall spacers provide the gate electrode with a substantially rectangular cross section, such that the gate electrode has a substantially constant thermal conductivity over its area. The TFT has a uniform device characteristic.

Abstract: Disclosed is an inductively coupled plasma chemical vapor deposition method for depositing a selected thin film on a substrate from inductively coupled plasma, the method including the steps of: providing a vacuum reaction chamber including an interior bounded, in part by a dielectric shield, the dielectric shield having an amorphous silicon layer on its interior surface, and an antenna arranged outside the deposition chamber adjacent to the dielectric shield where RF power is applied; placing the substrate on a stage with the chamber; exhausting the vacuum reaction chamber leaving a vacuum state; introducing a reactant gas to the vacuum reaction chamber at a predetermined pressure; and applying RF power to the antenna, whereby inductively coupled plasma for deposition of a thin film from the reactant gas is formed within the vacuum chamber.

Abstract: A photoelectric converter of a high signal-to-noise ratio, low cost, high productivity and stable characteristics and a system including the above photoelectric converter. The photoelectric converter includes a photoelectric converting portion in which a first electrode layer, an insulating layer for inhibiting carriers from transferring, a photoelectric converting semiconductor layer of a non-single-crystal type, an injection blocking layer for inhibiting a first type of carriers from being injected into the semiconductor layer and a second electrode layer are laminated in this order on an insulating substrate.

Abstract: A photoelectric converter of a high signal-to-noise ratio, low cost, high productivity and stable characteristics and a system including the above photoelectric converter. The photoelectric converter includes a photoelectric converting portion in which a first electrode layer, an insulating layer for inhibiting carriers from transferring, a photoelectric converting semiconductor layer of a non-single-crystal type, an injection blocking layer for inhibiting a first type of carriers from being injected into the semiconductor layer and a second electrode layer are laminated in this order on an insulating substrate.