Responsive To Nonelectrical External Signals (e.g., Light) Patents (Class 257/53)
  • Patent number: 11372281
    Abstract: A display panel includes: a substrate, a pixel layer and a sensing layer. The pixel layer is disposed on the substrate. The pixel layer includes pixel units arranged in an array. The sensing layer is disposed on one side of the substrate away from the pixel layer or disposed on one side of the substrate close to the pixel layer and is configured to convert a received optical signal into an electrical signal.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: June 28, 2022
    Assignee: BEIJING XIAOMI MOBILE SOFTWARE CO., LTD.
    Inventor: Quanhua He
  • Patent number: 11367494
    Abstract: The present disclosure provides semiconductor device and methods of forming the same. A semiconductor device according to the present disclosure includes a gate structure, a source/drain feature adjacent the gate structure, a dielectric layer disclosed over the gate structure and the source/drain feature, a gate contact disposed in the dielectric layer and over the gate structure, and a source/drain contact disposed in the dielectric layer and over the source/drain feature. The dielectric layer is doped with a dopant and the dopant includes germanium or tin.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: June 21, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Wen Su, Shih-Hao Lin, Jui-Lin Chen, Lien Jung Hung, Ping-Wei Wang
  • Patent number: 11344873
    Abstract: Disclosed herein is a multi-layered composite thin film material formed from graphene quantum dots (GQDs) and metal nanocrystals in a layer-by-layer design, wherein the metal nanocrystals can be selected from the group consisting of Ru, Rh, Os, Ir, Pd, Au, Ag and Pt. In a preferred embodiment, the multi-layered composite thin film material is prepared via a facile, green, and easily accessible layer-by-layer (LbL) self-assembly strategy. In this strategy, positively charged GOQDs and negatively charged metal nanocrystals are alternately and uniformly integrated with each other in a “face-to-face” stacked fashion under substantial electrostatic attractive interaction, and then the obtained GOQDs/metal composite thin film is calcined into GQDs/metal composite thin film. The composite thin film material disclosed herein may be used to catalyse a wide range or reactions, including selective reduction of aromatic nitro compounds in water and electrocatalytic oxidation of methanol at ambient conditions.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: May 31, 2022
    Assignee: Nanyang Technological University
    Inventors: Thatt Yang Timothy Tan, Zhiping Zeng
  • Patent number: 11278893
    Abstract: A microfluidic substrate and the driving method for the microfluidic substrate are provided. The microfluidic substrate may include a base substrate (10) and a plurality of detecting modules (100) on the base substrate (10). Each of the detecting modules (100) may include a switching unit (1), a driving electrode (3), and a photosensor (2). The photosensor (2) may have a first terminal (21) and a second terminal (23). A signal output terminal (13) of the switching unit (1) may be connected to both the driving electrode (3) and the second terminal (23) of the photosensor (2).
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: March 22, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yingming Liu, Haisheng Wang, Xue Dong, Xiaoliang Ding, Chuncheng Che, Peizhi Cai, Pinchao Gu, Changfeng Li, Lei Wang
  • Patent number: 11257868
    Abstract: A display substrate includes: a base substrate including a photosensitive region, the photosensitive region including a plurality of display regions spaced apart and a gap region between the plurality of display regions; a first electrode layer on the base substrate; a light-emitting layer on a side of the first electrode layer away from the base substrate; and a second electrode layer on a side of the light-emitting layer away from the base substrate. Each display region corresponds to at least one first luminescent material region of the light-emitting layer; the gap region corresponds to the plurality of second luminescent material regions of the light-emitting layer; a part of the second electrode layer in the photosensitive region includes a plurality of second electrodes spaced apart, and an orthographic projection of each second electrode on the base substrate overlaps with each display region.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: February 22, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhihui Xiao, Yu Feng, Ge Zhang
  • Patent number: 11211519
    Abstract: The method for manufacturing a solar cell includes: forming a first semiconductor layer of first conductivity type on a surface of a semiconductor substrate; forming a lift-off layer containing a silicon-based material on the first semiconductor layer; selectively removing the lift-off layer and first semiconductor layer; forming a second semiconductor layer of second conductivity type on a surface having the lift-off layer and first semiconductor layer; and removing the second semiconductor layer covering the lift-off layer by removing the lift-off layer using an etching solution.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: December 28, 2021
    Assignee: KANEKA CORPORATION
    Inventors: Ryota Mishima, Kunihiro Nakano, Katsunori Konishi, Daisuke Adachi, Takashi Kuchiyama, Kenji Yamamoto
  • Patent number: 11139357
    Abstract: An OLED display substrate, a manufacturing method thereof, and a display device are provided. The manufacturing method includes forming a PIN photodiode on a base substrate, forming an insulative protection layer covering the PIN photodiode, and forming an oxide TFT. The PIN photodiode is formed prior to the formation of an active layer of the oxide TFT, and the insulative protection layer covering the PIN photodiode is formed prior to the formation of a source electrode and a drain electrode of the oxide TFT.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: October 5, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Pan Xu, Yicheng Lin, Cuili Gai, Ling Wang, Yongqian Li
  • Patent number: 11127591
    Abstract: Methods of direct growth of high quality group III-V and group III-N based materials and semiconductor device structures in the form of nanowires, planar thin film, and nanowires-based devices on metal substrates are presented. The present compound semiconductor all-metal scheme greatly simplifies the fabrication process of high power light emitters overcoming limited thermal and electrical conductivity of nanowires grown on silicon substrates and metal thin film in prior art. In an embodiment the methods include: (i) providing a metal substrate; (ii) forming a transition metal dichalcogenide (TMDC) layer on a surface of the metal substrate; and (iii) growing a semiconductor epilayer on the transition metal dichalcogenide layer using a semiconductor epitaxy growth system. In an embodiment, the semiconductor device structures can be compound semiconductors in contact with a layer of metal dichalcogenide, wherein the layer of metal dichalcogenide is in contact with a metal substrate.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: September 21, 2021
    Assignee: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Chao Zhao, Tien Khee Ng, Lain-Jong Li, Boon Siew Ooi, Ahmed Y. Alyameni, Munir M. Eldesouki
  • Patent number: 11121270
    Abstract: There is provided a photoelectric conversion element which can prevent the contact resistance between a non-crystalline semiconductor layer containing impurities and an electrode formed on the non-crystalline semiconductor layer from increasing, and can improve the element characteristics. A photoelectric conversion element (10) includes a semiconductor substrate (12), a first semiconductor layer (20n), a second semiconductor layer (20p), a first electrode (22n), and a second electrode (22p). The first semiconductor layer (20n) has a first conductive type. The second semiconductor layer (20p) has a second conductive type opposite to the first conductive type. The first electrode (22n) is formed on the first semiconductor layer (20n). The second electrode (22p) is formed on the second semiconductor layer (20p). At least one electrode of the first electrode (22n) and the second electrode (22p) includes a plurality of metal crystal grains.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: September 14, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kenji Kimoto, Naoki Koide, Takeshi Hieda, Junichi Nakamura
  • Patent number: 11101212
    Abstract: A device including a thin film resistor (TFR) structure. The TFR structure is accessible by one or more conductive vias that extend vertically from an upper metal layer to completely penetrate a TFR layer positioned thereunder. The conductive vias are coupled to one or more sidewalls of the TFR layer at or near the sites of penetration. The TFR structure can be manufactured by a method that includes etching a via trench completely through the TFR layer and a dielectric layer above the TFR layer, and filling the via trench with a conductor coupled to a sidewall of the TFR layer.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: August 24, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Dhishan Kande, Qi-Zhong Hong, Abbas Ali, Gregory B. Shinn
  • Patent number: 11101617
    Abstract: A wafer includes a number of die, with each die including electronic integrated circuits and optical devices. The wafer has a top surface and a bottom surface and a base layer. The bottom surface of the wafer corresponds to a bottom surface of the base layer. A wafer support system is attached to the top surface of the wafer. A thickness of the base layer is removed to expose a target layer within the wafer and to give the wafer a new bottom surface. A replacement handle structure is attached to the new bottom surface of the wafer. The replacement handle structure includes a first thickness region and a second thickness region. The first thickness region is positioned closest to the new bottom surface. The first thickness region is formed of an optical cladding material that mitigates optical coupling between optical devices within the die and the replacement handle structure.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: August 24, 2021
    Assignee: Ayar Labs, Inc.
    Inventor: Roy Edward Meade
  • Patent number: 11076078
    Abstract: The present disclosure relates to a solid-state imaging device, a method for manufacturing the same, and an electronic apparatus capable of improving sensitivity while suppressing degradation of color mixture. The solid-state imaging device includes an anti-reflection portion having a moth-eye structure provided on a boundary surface on a light-receiving surface side of a photoelectric conversion region of each pixel arranged two-dimensionally, and an inter-pixel light-blocking portion provided below the boundary surface of the anti-reflection portion to block incident light. In addition, the photoelectric conversion region is a semiconductor region, and the inter-pixel light-blocking portion has a trench structure obtained by digging the semiconductor region in a depth direction at a pixel boundary. The techniques according to the present disclosure can be applied to, for example, a solid-state imaging device of a rear surface irradiation type.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: July 27, 2021
    Assignee: SONY CORPORATION
    Inventors: Yoshiaki Masuda, Yuki Miyanami, Hideshi Abe, Tomoyuki Hirano, Masanari Yamaguchi, Yoshiki Ebiko, Kazufumi Watanabe, Tomoharu Ogita
  • Patent number: 11069816
    Abstract: A semiconductor device that can be highly integrated is provided. The semiconductor device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a first conductive layer, and a second conductive layer. The second semiconductor layer is positioned over the first semiconductor layer, the second conductive layer is positioned on the second semiconductor layer, and the second insulating layer is provided so as to cover a top surface and a side surface of the second conductive layer. The second conductive layer and the second insulating layer include a first opening, and the third semiconductor layer is provided in contact with a top surface of the second insulating layer, a side surface of the first opening, and the second semiconductor layer.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: July 20, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukinori Shima, Masataka Nakada, Masayoshi Dobashi, Kenichi Okazaki
  • Patent number: 11031516
    Abstract: There is provided a photoelectric conversion element which can prevent the contact resistance between a non-crystalline semiconductor layer containing impurities and an electrode formed on the non-crystalline semiconductor layer from increasing, and can improve the element characteristics. A photoelectric conversion element (10) includes a semiconductor substrate (12), a first semiconductor layer (20n), a second semiconductor layer (20p), a first electrode (22n), and a second electrode (22p). The first semiconductor layer has a first conductive type. The second semiconductor layer has a second conductive type. The first electrode is formed on the first semiconductor layer. The second electrode is formed on the second semiconductor layer. The first electrode includes a first transparent conductive layer (26n) formed on the first semiconductor layer, and a first metal layer (28n) formed on the first transparent conductive layer.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: June 8, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kenji Kimoto, Naoki Koide, Yuta Matsumoto, Junichi Nakamura
  • Patent number: 11024664
    Abstract: An imaging panel includes an active matrix substrate that has a plurality of pixels each provided with a photoelectric conversion element, and the pixels each include a first electrode provided at a first surface of the photoelectric conversion element, a first flattening film provided above the photoelectric conversion element and the first electrode, and a bias conductive part provided below the first flattening film. The bias conductive part is connected to the first electrode and applies bias voltage to the first electrode. The first flattening film has no opening in a region overlapped with a pixel region.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: June 1, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Rikiya Takita, Fumiki Nakano, Makoto Nakazawa
  • Patent number: 10991902
    Abstract: There provide an organic light emitting diode substrate and preparation method thereof and a display panel. The preparation method includes: forming a pixel defining layer which defines a pixel region and has a via hole on a base; forming an auxiliary electrode in the via hole; forming a capsule structure encapsulating a conductive liquid on the auxiliary electrode; expanding the capsule structure to be broken so as to enable the conductive liquid to form a connection electrode; and forming a first electrode covering the base, the first electrode being connected to the auxiliary electrode through the connection electrode. In the present disclosure, the connection electrode is formed through the capsule structure encapsulating the conductive liquid, so that the first electrode is connected to the auxiliary electrode through the connection electrode. The preparation process is simpler and the production cost is lower.
    Type: Grant
    Filed: December 29, 2019
    Date of Patent: April 27, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Donghui Yu
  • Patent number: 10903379
    Abstract: A photovoltaic device includes: a semiconductor substrate stretching in a first direction and a second direction that intersects the first direction; and a first amorphous semiconductor film and a second amorphous semiconductor film both provided on the semiconductor substrate. The second amorphous semiconductor film has a differ conductivity type from the first amorphous semiconductor film. The first amorphous semiconductor film and the second amorphous semiconductor film are divided into a plurality of sections in the first direction and the second direction. Therefore, the photovoltaic device has an improved heat resistance.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: January 26, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Teruaki Higo, Chikao Okamoto, Naoki Asano, Masamichi Kobayashi, Natsuko Fujiwara, Rihito Suganuma, Toshihiko Sakai, Kazuya Tsujino, Liumin Zou
  • Patent number: 10879284
    Abstract: An imaging device includes a pixel, the pixel including a photoelectric converter which converts light into a signal charge and a charge detection circuit which detects the signal charge. The photoelectric converter includes a photoelectric conversion layer having a first surface and a second surface opposite to the first surface, a pixel electrode on the first surface, a first electrode adjacent to the pixel electrode on the first surface, the first electrode being electrically conductive to the photoelectric conversion layer, and a counter electrode on the second surface, the counter electrode facing the pixel electrode and the first electrode. A shortest distance between the pixel electrode and the first electrode in a plan view is smaller than a shortest distance between the pixel electrode and the first electrode.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: December 29, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Akio Nakajun, Sanshiro Shishido, Shunsuke Isono
  • Patent number: 10847568
    Abstract: An image sensor: includes a pixel matrix in which pixels are disposed in a matrix, each pixel including a photoelectric conversion element and a switching element connected to the photoelectric conversion element; performs selection processing, on each pixel row of the pixel matrix, including selecting a pixel row and outputting a signal to the selected pixel row to make switching elements conductive; performs detection processing of detecting signals from the photoelectric conversion elements in the selected pixel row; and performs the selection processing based on received control signals, wherein the control signals include first control signals having a cycle shorter than a first period in which the selection processing and the detection processing are performed on all pixel rows, and wherein the cycle is equal to or shorter than a second period in which the selection processing and the detection processing are performed on one pixel row.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: November 24, 2020
    Assignee: TIANMA JAPAN, LTD.
    Inventor: Hiroyuki Sekine
  • Patent number: 10804301
    Abstract: A pixel cell for differential light sensing includes a plurality of photodiodes and a corresponding plurality of storage diodes. Each storage diode is disposed between a first adjacent photodiode and a second adjacent photodiode, and each storage diode is configured to receive photo charges from either or both of the first adjacent photodiode and the second adjacent photodiode. Each photodiode is disposed between a first adjacent storage diode and a second adjacent storage diode, and each photodiode is configured to transfer photo charges to either or both of the first adjacent storage diode and the second adjacent storage diode.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: October 13, 2020
    Assignee: Magic Leap, Inc.
    Inventors: Erez Tadmor, David Cohen, Giora Yahav
  • Patent number: 10777744
    Abstract: A resistive switching memory cell comprising a switchable solid electrolyte (E). The electrolyte (E) consists of a composition comprising a matrix comprising a metal oxide, metal sulphide and/or metal selenide as the matrix material, the metal oxide, metal sulphide and/or metal selenide comprising at least two metals M1 and M2, and a metal M3 which is mobile in the matrix. The atomic ratio of M1 to M2 is within the range of 75:25 to 99.99:0.01, preferably 90:10 to 99.99:0.01; the valence states of M1, M2 and M3 are all positive; the valence state of M1 is larger than the valence state of M2; the valence state of M2 is equal to or larger than the valence state of M3; and the metals M1, M2 and M3 are different.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: September 15, 2020
    Assignee: Heraeus Deutschland GmbH & Co. KG
    Inventor: Christian Neumann
  • Patent number: 10698359
    Abstract: An image forming apparatus includes an image bearing member and a static elimination device. The static elimination device irradiates static elimination light onto a circumferential surface of the image bearing member. The image bearing member includes a conductive substrate and a single-layer photosensitive layer. The photosensitive layer contains a charge generating material, a hole transport material, an electron transport material, and a binder resin. The static elimination light has a wavelength of at least 600 nm and no greater than 800 nm. The photosensitive layer has an optical absorption coefficient of at least 600 cm?1 and no greater than 1,500 cm?1 with respect to light having a wavelength of 660 nm.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: June 30, 2020
    Assignee: KYOCERA Document Solutions Inc.
    Inventors: Toshiki Fujita, Ikuo Makie, Masahito Ishino, Nariaki Tanaka, Kiyotaka Kobayashi
  • Patent number: 10534951
    Abstract: A fingerprint identification unit and a manufacturing method thereof, an array substrate, a display device and a fingerprint identification method are disclosed, which can realize fingerprint identification without increasing the thickness of the display device. The fingerprint identification unit can include a photosensitive device, a data read-out signal line and a thin film transistor for controlling the switching of the photosensitive device. On the photosensitive device is formed a first insulating layer for insulating the photosensitive device from an OLED luminescent layer, and the part of the OLED luminescent layer corresponding to the photosensitive device does not illuminate. The data read-out signal line can be configured to read out a photocurrent generated by the photosensitive device, and identify fingerprints according to the amount of each photocurrent. The array substrate includes the fingerprint identification unit mentioned in the above technical solution.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: January 14, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Rui Xu, Haisheng Wang
  • Patent number: 10527852
    Abstract: Examples are disclosed that relate to the use of diffractive filtering in a waveguide display system. One example provides a display system including a light source, a first waveguide configured to conduct light of a first wavelength band from the light source, the first waveguide comprising a first input coupler, a second waveguide configured to conduct light of a second wavelength band from the light source, the second waveguide comprising a second input coupler, and a diffractive filter positioned optically between the first waveguide and the second waveguide, the diffractive filter being configured to diffract light of the first wavelength band and transmit light of the second wavelength band.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: January 7, 2020
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Lasse Pekka Karvonen, Andreas Langner
  • Patent number: 10488560
    Abstract: An optical element is provided. The optical element includes an array structure having an implant area and a non-implant area. The non-implant area is adjacent to the implant area. The implant area has an implant concentration ranging from 1×1013 cm?2 to 6.7×1013 cm?2. The array structure is a color filter array including a plurality of color filters. At least one of the color filters has the implant area. The implant area has a first refractive index. The non-implant area has a second refractive index. The first refractive index is greater than the second refractive index.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: November 26, 2019
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Chung-Jung Hsu, Chin-Chuan Hsieh, Kuo-Feng Lin
  • Patent number: 10468543
    Abstract: Microstructure enhanced photodiodes and avalanche photodiodes are monolithically integrated with CMOS/BiCMOS circuitry such as transimpedance amplifiers. Microstructures, such as holes, can improve quantum efficiency in silicon and III-V materials and can also reduce avalanche voltages for avalanche photodiodes. Applications include optical communications within and between datacenters, telecommunications, LIDAR, and free space data communication.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: November 5, 2019
    Assignee: W&Wsens Devices, Inc.
    Inventors: Shih-Yuan Wang, Shih-Ping Wang, M. Saif Islam
  • Patent number: 10449573
    Abstract: A sorting apparatus is described and which includes a selectively heated avalanche photodiode (APD) which is maintained at a predetermined temperature and which further demonstrates a higher gain and signal-to-noise ratio with greater stability at a predetermined temperature for enhancing sorting efficiency.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: October 22, 2019
    Assignee: Key Technology, Inc.
    Inventors: Johan Calcoen, Peter Stulens
  • Patent number: 10439069
    Abstract: Two gate electrodes are provided on upper and lower sides of an oxide semiconductor active layer through respective insulating films. In addition, a first read-out electrode and a second read-out electrode are provided on right and left sides of the oxide semiconductor active layer. In the optical sensor element, in a case where a voltage is applied to each gate electrode, a potential difference occurs between the first read-out electrode and the second read-out electrode, and intensity of irradiation light is detected based on a current that flows between the read-out electrodes.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: October 8, 2019
    Assignee: NLT TECHNOLOGIES, LTD.
    Inventor: Kazushige Takechi
  • Patent number: 10347776
    Abstract: Disclosed are a back-surface bridge type contact electrode of a crystalline silicon solar battery and a preparation method therefor. The back-surface bridge type contact electrode of a crystalline silicon solar battery includes a local electrode connected to a local back surface field and a back surface electrode which is covered with a back surface passivation film on a contact surface with a silicon wafer substrate, at least one bridge electrode is provided between the local electrode and the back surface electrode, the contact surface of the bridge electrode and the silicon wafer substrate is also covered with the back surface passivation film, the local electrode is connected to the back surface electrode via the bridge electrode, and the back surface passivation film is also provided, besides at the connection region of the bridge electrode, between the local electrode and the back surface electrode.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: July 9, 2019
    Assignee: Trina Solar Co., Ltd.
    Inventors: Yifeng Chen, Pierre J. Verlinden, Zhiqiang Feng, Hui Shen, Pietro P. Altermatt
  • Patent number: 10330800
    Abstract: An X-ray detector includes a direct-conversion converter element and an evaluating unit in a stacked arrangement. In an embodiment, the X-ray detector includes a voltage source, configured to provide a first potential and a second potential different from the first potential; a pulse generating unit for generating voltage pulses; and a connecting unit, for applying the voltage pulses onto the first potential, configured at the output to provide a pulsed potential. In an embodiment, through the application of the pulsed potential to a first surface of the direct-conversion converter element and through the application of the second potential to a second surface of the converter element opposed to the first surface, a pulsed potential difference is formed in the direct-conversion converter element.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: June 25, 2019
    Assignee: SIEMENS HEALTHCARE GMBH
    Inventors: Shameem Kabir Chaudhury, Alfons Eismann, Thorsten Ergler, Thomas Hilderscheid
  • Patent number: 10320627
    Abstract: This invention provides a cooperative coverage method for distribution network information perception. The cooperative coverage method includes the following steps: construction of connected cooperative coverage sets, which can cover all target nodes with as few information perception nodes as possible, and maintain the connectivity of each cooperative coverage set with connected sets construction methods based on of hierarchical clustering; Cooperative coverage set scheduling, introducing the concept of energy ratio threshold, dividing the life cycle of the system into multiple time slices, calculating the energy ratio of perception device set in each time slice to realize the set scheduling. The invention realizes the efficient utilization of the energy of the perception device through the construction and scheduling of the connected coverage set in different time slices, and improves the use efficiency of the information perception network.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: June 11, 2019
    Assignees: STATE GRID JIANGSU ELECTRIC POWER COMPANY NANJING POWER SUPPLY COMPANY, STATE GRID JIANGSU ELECTRIC POWER COMPANY, STATE GRID COMPANY CORPORATION OF CHINA, STATE GRID INFORMATION & TELECOMMUNICATION GROUP CO., LTD
    Inventors: Lei Wei, Min Lu, Qinghai Ou, Zhu Liu, Shaoyong Guo, Wei Xu, Dong Yan, Shaojun Liu, Xinjian Zhao, Wei Li, Lisha Gao
  • Patent number: 10297625
    Abstract: A photoelectric conversion device includes a blocking unit located between a photoelectric conversion layer and a second electrode unit and configured to cause electric charge having a first polarity to be injected from the photoelectric conversion layer into the second electrode unit and to prevent electric charge having a second polarity opposite to the first polarity from being injected from the photoelectric conversion layer into the second electrode unit, and a voltage supply unit configured to supply a second voltage to one of a first electrode unit and the second electrode unit such that electric charge having the first polarity is prevented from being injected from the photoelectric conversion layer into the second electrode unit.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: May 21, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Kazuaki Tashiro
  • Patent number: 10217878
    Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: February 26, 2019
    Assignee: SunPower Corporation
    Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
  • Patent number: 10192892
    Abstract: A device includes a backplane having multiple output terminals arranged in an array on an output surface of the backplane. The device further includes an active matrix array comprising thin film solid state optical switches coupled respectively between an input terminal of the backplane and the output terminals. Storage capacitors may be coupled respectively to the output terminals. A pixelated light source provides pixelated light that controls the optical switches.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: January 29, 2019
    Assignee: Palo Alto Research Center Incorporated
    Inventors: JengPing Lu, David K. Biegelsen, Patrick Yasuo Maeda
  • Patent number: 10134940
    Abstract: A method of manufacturing a solar cell includes: forming a solar cell substrate having one main surface and the other main surface and having a p-type surface and an n-type surface which are exposed on one region and another region in the one main surface, respectively; forming seed layers in an electrically separated state on the p-type surface and the n-type surface, respectively; and forming a plated film on the seed layer on each of the p-type surface and the n-type surface by an electrolytic plating method.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: November 20, 2018
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Ryo Goto, Daisuke Ide, Mitsuaki Morigami, Youhei Murakami
  • Patent number: 10032948
    Abstract: A solar battery module is provided with a plurality of solar cells, a wiring material for connecting adjacent solar cells in the longitudinal directors to form strings, and a reflective body disposed on the rear-surface side of the solar cells, said body reflecting at least some incident light toward the solar cells. In the solar battery module, the strings are multiply disposed in the horizontal direction to constitute string groups, intervals D20 between adjacent strings being formed wider in the longitudinal center section of the string groups than in the longitudinal end sections.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: July 24, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kei Nakamura, Isao Hasegawa
  • Patent number: 9991305
    Abstract: The present invention reduces the leakage of the electric charge, which occurs at an end of a pixel electrode. An imaging apparatus includes: a plurality of pixel electrodes arranged separately from each other; an insulating film arranged on the pixel electrode; a pixel isolating film of an insulating member arranged between the pixel electrodes; and a photoelectric conversion film arranged on the insulating film, wherein the pixel isolating film contacts the pixel electrode.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: June 5, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tatsuhito Goden, Nobuhiko Sato
  • Patent number: 9976897
    Abstract: A radiation imaging apparatus includes a radiation detection panel configured to detect radiation irradiated by a radiation generation unit, a first member and second member arranged on the incident direction side of the radiation, and a third member and fourth member arranged on a side opposite to the incident direction of the radiation. The second member is arranged between the first member and the radiation detection panel, and the third member is arranged between the radiation detection panel and the fourth member. The second member and the third member are lower in elastic modulus than the first member and the fourth member, and the elastic modulus of the second member is equal to or lower than that of the third member.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: May 22, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Masataka Suzuki
  • Patent number: 9947822
    Abstract: One embodiment of the present invention provides a bifacial solar panel. The bifacial solar panel includes a first transparent cover on a first side of the solar panel, a second transparent cover on a second side of the solar panel, a plurality of solar cells sandwiched between the first cover and the second cover, and one or more lead wires for outputting power generated by the solar panel. The lead wires are positioned on an edge of the solar panel without shading the first and second sides of the solar panel. A respective solar cell comprises a photovoltaic structure, a first metal grid on the first side of the photovoltaic structure, which allows the solar cell to absorb light from the first side, and a second metal grid on the second side of the photovoltaic structure, which allows the solar cell to absorb light from the second side.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: April 17, 2018
    Assignee: Tesla, Inc.
    Inventors: Jiunn Benjamin Heng, Christoph Erben, Bobby Yang
  • Patent number: 9933303
    Abstract: A radiation imaging apparatus includes a radiation detection panel configured to detect radiation irradiated by a radiation generation unit, a first member and second member arranged on the incident direction side of the radiation, and a third member and fourth member arranged on a side opposite to the incident direction of the radiation. The second member is arranged between the first member and the radiation detection panel, and the third member is arranged between the radiation detection panel and the fourth member. The second member and the third member are lower in elastic modulus than the first member and the fourth member, and the elastic modulus of the second member is equal to or lower than that of the third member.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: April 3, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Masataka Suzuki
  • Patent number: 9871084
    Abstract: An organic light-emitting display device includes a first substrate, a second substrate, a sealing adhesive layer, an organic light-emitting device and a touch sensing device. The first substrate and the second substrate are disposed opposite to each other. The sealing adhesive layer is disposed between the first substrate and the second substrate in a peripheral region. The organic light-emitting device is disposed on the second substrate in a display region, and the sealing adhesive layer surrounds the organic light-emitting device. The touch sensing device is disposed on the first substrate and includes a touch sensing electrode array and a plurality of sensing wires electrically connected to the touch sensing electrode array, respectively, and the sensing wires are disposed along the peripheral region at at least one side of the display region and over the sealing adhesive layer.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: January 16, 2018
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Po-Sheng Liao, Chia-Yuan Yeh
  • Patent number: 9859305
    Abstract: Provided are liquid crystal display and the method for manufacturing the same. According to an aspect of the present invention, there is provided a liquid crystal display device, including a first substrate; a gate electrode disposed on the first substrate; a semiconductor pattern layer disposed on the gate electrode; and a source electrode and a drain electrode disposed on the semiconductor pattern layer and facing each other, wherein a diffusion prevention pattern is disposed on the semiconductor pattern layer to prevent diffusion into the semiconductor pattern layer or to maintain uniform thickness of the semiconductor pattern layer.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: January 2, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yung Bin Chung, Bo Geon Jeon, Eun Jeong Cho, Tae Young Ahn, Woo Seok Jeon, Sung Hoon Yang
  • Patent number: 9825079
    Abstract: A photoelectric conversion device includes a photoelectric conversion unit disposed above a substrate and a reading circuit. The photoelectric conversion unit includes a first electrode disposed above the substrate, a second electrode disposed above the first electrode, and a photoelectric conversion film disposed between the first electrode and the second electrode. The second electrode includes an opening, and is disposed in contact with the photoelectric conversion film at a boundary between adjacent photoelectric conversion units. An insulating film is disposed in contact with the second electrode.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: November 21, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tatsuya Ryoki
  • Patent number: 9685563
    Abstract: A semiconductor device includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, a source electrode in contact with the second oxide semiconductor film, a drain electrode in contact with the second oxide semiconductor film, a metal oxide film over the second oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the metal oxide film, and a gate electrode over the gate insulating film. The metal oxide film contains M (M represents Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) and Zn. The metal oxide film includes a portion where x/(x+y) is greater than 0.67 and less than or equal to 0.99 when a target has an atomic ratio of M:Zn=x:y.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: June 20, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Toshihiko Takeuchi, Yasumasa Yamane, Masashi Oota
  • Patent number: 9678370
    Abstract: A carrier-depletion based silicon waveguide resonant cavity modulator includes a silicon waveguide based resonant cavity. The resonant cavity includes an optical modulation section and an optical power monitoring section. The optical power monitoring section includes an integrated lateral PIN diode including a doping compensated I region having a high defect density and a low net free carrier concentration. The doping compensated I region may be formed by performing a P-type implantation step and an N-type implantation step with overlapping ion implantation windows.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: June 13, 2017
    Assignees: IMEC VZW, Universiteit Gent
    Inventors: Yu Hui, Wim Bogaerts
  • Patent number: 9575025
    Abstract: There is provided an electrolyte solution including a solvent formed from a sulfone, and a magnesium salt dissolved in the solvent.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: February 21, 2017
    Assignee: SONY CORPORATION
    Inventors: Yuri Nakayama, Hideki Kawasaki, Hiroyuki Morioka
  • Patent number: 9570495
    Abstract: A solid-state imaging device includes a substrate and a photoelectric conversion region. The substrate has a charge accumulation region. The photoelectric conversion region is provided on the substrate. The photoelectric conversion region is configured to generate signal charges to be accumulated in the charge accumulation region. The photoelectric conversion region comprises a material that is not transparent.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: February 14, 2017
    Assignee: SONY CORPORATION
    Inventors: Atsushi Toda, Teruo Hirayama
  • Patent number: 9570637
    Abstract: A solar cell includes: a semiconductor substrate having a light receiving surface and a back surface; a first semiconductor layer of the first conductivity type on the back surface; a second semiconductor layer of the second conductivity type on the back surface; a first electrode electrically connected to the first semiconductor layer; and an insulating layer for electrically insulating the first semiconductor layer and the second semiconductor layer from each other in a region in which an edge of the first semiconductor layer and an edge of second semiconductor layer overlap. The first electrode includes a first transparent electrode layer and a first collection electrode layer on the first transparent electrode layer. The first transparent electrode layer is separated into a primary electrode layer that is on the first semiconductor layer and a separated electrode layer that is on the second semiconductor layer in the region.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: February 14, 2017
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Naoteru Matsubara, Taiki Hashiguchi
  • Patent number: 9525071
    Abstract: A flexible high-voltage thin-film transistor includes a gate electrode, a source electrode, a drain electrode, a dielectric layer, and a flexible semiconductor layer. The flexible semiconductor layer serves as a channel for the transistor and is in electrical communication with the source electrode and the drain electrode. The drain electrode is laterally offset from the gate electrode. The dielectric layers is configured and arranged with respect to other elements of the transistor such that the transistor is stably operable to facilitate switching of relatively high drain voltages using relatively small controlling gate voltages.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: December 20, 2016
    Assignee: Massachusetts Institute of Technology
    Inventors: Melissa Alyson Smith, Akintunde I. Akinwande
  • Patent number: 9425341
    Abstract: According to one aspect of the invention, there is provided a pin photodetector comprising a dopant diffusion barrier layer disposed within an active light absorbing region of the pin photodetector.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: August 23, 2016
    Assignee: Agency for Science, Technology and Research
    Inventors: Andy Eu-Jin Lim, Tsung-Yang Liow, Patrick Guo-Qiang Lo