Abstract: A method of fabricating a neuromorphic device includes forming a variable-resistance layer between a first terminal and a second terminal, the variable-resistance layer varies in resistance based on an oxygen concentration in the variable-resistance layer. The method further includes forming an electrolyte layer over the variable-resistance layer that is stable at room temperature and that conducts oxygen ions in accordance with an applied voltage. The method further includes forming a gate layer over the electrolyte layer to apply a voltage on the electrolyte layer and the variable-resistance layer, the gate layer formed using an oxygen scavenging material.

Abstract: A method of detecting a target within a population of molecules comprising: contacting a plurality of labeled probe molecules with the population of molecules potentially containing a target of the probe molecules; acquiring a probe specific signal emitted by said labeled probe molecules that bound to said target together with a background signal; preferentially modulating said probe specific signal by at least one of modulating said acquisition and modulating an emission of said probe specific signal; and detecting said probe specific signal over said background signal using said preferential modulation.

Abstract: Various techniques are provided to utilize nanostructures for process monitoring and feedback control. In one example, a method includes forming a layer of material including nanostructures distributed therein. Each nanostructure includes a quantum dot and a shell encompassing the quantum dot. The shells and quantum dots are configured to emit a first and second wavelength, respectively, in response to an excitation signal. The method further includes applying the excitation signal to at least a portion of the layer of material. The method further includes detecting an emitted signal from the portion of the layer of material, where the emitted signal is provided by at least a subset of the nanostructures in response to the excitation signal. The method further includes determining whether a manufacturing characteristic has been satisfied based at least on a wavelength of the emitted signal. Related systems and products are also provided.

Abstract: A semiconductor device including a via plug formed on a substrate and a metal layer for interconnection formed at an end of the via plug, wherein an insulating structure is under the metal layer for interconnection and the insulating structure has a different layered structure according to a positional relationship with the metal layer for interconnection is disclosed.

Abstract: Certain dithio-compounds have been found to be superior capping ligands for quantum dot (QD) nanoparticles. Example dithio-ligands include dithiocarbamate ligands. These strongly binding ligands are capable of coordinating to both positive and negative atoms on the surface of the nanoparticle. The ligands are bi-dentate and thus their approach to the QD surface is not as sterically hindered as is the approach of mono-dentate ligands. These ligands can therefore completely saturate the QD surface.

Abstract: Heterojunction GaSb Photocells for operating in wavelengths around 1.6 microns have P type GaSb wafers with backside P+ back metal contacts. Patterned active areas are created on the front side and receive a thin passivation film. A thin N+ transparent SnO2 or tin conductive oxide is deposited on the passivation film. A front contact grid is deposited. The thin passivating film is either amorphous silicon (a-Si:H) or TiO2 with a hydrogen plasma pretreatment. The deposited N+ transparent SnO2 or tin conductive oxide forms an N+/P Heterojunction cell. Front grid contacts and full back contacts are deposited. An antireflective coating is applied through the grids.

Abstract: A solid state lighting device including a light source capable of emitting white light including a blue spectral component and having a deficiency in a spectral region, and an optical component that is positioned to receive at least a portion of the light generated by the light source, the optical component comprising an optical material for converting at least a portion of the blue spectral component of the light to one or more predetermined wavelengths such that light emitted by the solid state lighting device includes light emission from the light source supplemented with light emission at one or more predetermined wavelengths, wherein the optical material comprises quantum confined semiconductor nanoparticles. Also disclosed is lighting fixture, a cover plate for a lighting fixture and a method.

Abstract: A method for the fluorescence detection of metal ions and other environmental hazards utilizing ligand functionalized fluorescent nanoparticles. Synthesis of the non-toxic, air, and water stable nanoparticles has been optimized. The fluorescent nanoparticles of the present invention are made from varying ratios of metals including zinc, silver, copper, and indium and sulfur. By varying the ratios of these metals we are able to synthesize nanoparticles that emit over a large range of the visible spectrum. Charge transfer between a target molecule and the nanoparticle is readily identified by a fluorescence change allowing for a fast, simple, visual detection system without the need for expensive analytical instrumentation.

Abstract: A testing element, and methods of use therefor, for the detection of target analytes, for example metal ions and other environmental hazards, utilizing ligand functionalized fluorescent nanoparticles on a substrate. The non-toxic, air, and water stable fluorescent nanoparticles of the present invention are made from varying ratios of metals including zinc, silver, copper, and indium and sulfur. By varying the ratios of these metals nanoparticles can be synthesized that emit over a large range of the visible spectrum. Charge transfer between a target analyte and the nanoparticle is readily identified by a fluorescence change allowing for a fast, simple, visual detection system without the need for expensive analytical instrumentation. The test element can have more than one type of functionalized fluorescent nanoparticle which allows for the detection of multiple target analytes using a single test element.

Abstract: A nanostructured hybrid particle, a manufacturing method thereof, and a device including the nanostructured hybrid particle are disclosed. The nanostructured hybrid particle includes a hydrophobic base particle having a convex-concave nanopattern on a surface thereof; a hydrophobic light-emitting nanoparticle disposed in a concave portion of the convex-concave nanopattern on the surface of hydrophobic base particle; and a coating layer covering the hydrophobic base particle and the hydrophobic light-emitting nanoparticle. In the nanostructured hybrid particle, light extraction may occur in all 3-dimensional directions, and thus, the nanostructured hybrid particle can exhibit high light extraction efficiency compared to light extraction occurring on a two-dimensional plane.

Abstract: One object is to provide a semiconductor device including an oxide semiconductor with improved electrical characteristics. The semiconductor device includes a first insulating film including an element of Group 13 and oxygen; an oxide semiconductor film partly in contact with the first insulating film; a source electrode and a drain electrode electrically connected to the oxide semiconductor film; a gate electrode overlapping with the oxide semiconductor film; and a second insulating film partly in contact with the oxide semiconductor film, between the oxide semiconductor film and the gate electrode. Further, the first insulating film including an element of Group 13 and oxygen includes a region where an amount of oxygen is greater than that in a stoichiometric composition ratio.

Abstract: A method includes forming a resistance-switching layer and a second electrode over a first electrode. The method includes applying a forming voltage to the resistance-switching layer such that the resistance of the resistance-switching layer is decreased. The method includes applying an initial reset voltage to the first electrode or the second electrode such that the resistance of the resistance-switching layer is increased. The method includes applying a first set voltage to the first electrode or the second electrode such that the resistance of the resistance-switching layer is decreased. The method includes applying a second reset voltage to first electrode or the second electrode such that the resistance of the resistance-switching layer is increased. The method includes applying a second set voltage to first electrode or the second electrode such that the resistance of the resistance-switching layer is decreased. The second set voltage is lower than the first set voltage.

Abstract: An light apparatus used in forming a solar cell includes a housing separate from other processing in a deposition processing system, a transport mechanism for carrying a solar cell into the housing after deposition of a front contact layer in the deposition processing system, and one or more light source elements arranged to apply light on the solar cell after deposition of the front contact layer. A method of making a solar cell includes forming a back contact layer on a glass substrate, forming an absorber layer on the back contact layer, forming a buffer layer on the absorber layer, and forming a front contact layer above the buffer layer, the glass substrate, back contact layer, absorber layer, buffer layer, and front contact layer forming a first module. The method includes applying a light source to the first module after forming the front contact layer separate from other processing.

Abstract: A semiconductor device having a p base region and an n+ emitter region that come into contact with an emitter electrode and are selectively provided in a surface layer of an n? drift layer. A gate electrode is provided on a portion of the front surface of the n? drift layer which is interposed between the n+ emitter regions, with a gate insulating film interposed therebetween. In some exemplary embodiments, an n+ buffer layer and a p collector layer which have a higher impurity concentration than the n? drift layer are sequentially provided on a surface of the n? drift layer opposite to the front surface on which the n+ emitter region is provided. The impurity concentration of the n+ buffer layer is equal to or greater than 7×1016 cm?3 and equal to or less than 7×1017 cm?3. Accordingly, it is possible to obtain high field decay resistance.

Abstract: A semiconductor device includes a substrate, a buffer layer on the substrate, and a plurality of nitride semiconductor layers on the buffer layer. The semiconductor device further includes at least one masking layer and at least one inter layer between the plurality of nitride semiconductor layers. The at least one inter layer is on the at least one masking layer.

Abstract: A semiconductor element includes a CdTe-based semiconductor material and a number of connection points of the semiconductor element to connect to electronic components. In at least one embodiment, the connection points are provided with a special solder resist layer including a mixture AB of at least two metals with different coefficients of expansion. In at least one embodiment, a radiation detector includes such a semiconductor element and optionally includes evaluation electronics for reading out a detector signal. In at least one embodiment, a medical technology device includes such a radiation detector. Furthermore, a method is disclosed for creating a semiconductor element which includes applying a solder resist layer to connection points. In at least one embodiment, the solder resist layer includes a mixture of at least two metals with different coefficients of expansion.

Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.

Abstract: A silicon/germanium material and a silicon/carbon material may be provided in transistors of different conductivity type on the basis of an appropriate manufacturing regime without unduly contributing to overall process complexity. Furthermore, appropriate implantation species may be provided through exposed surface areas of the cavities prior to forming the corresponding strained semiconductor alloy, thereby additionally contributing to enhanced overall transistor performance. In other embodiments a silicon/carbon material may be formed in a P-channel transistor and an N-channel transistor, while the corresponding tensile strain component may be overcompensated for by means of a stress memorization technique in the P-channel transistor. Thus, the advantageous effects of the carbon species, such as enhancing overall dopant profile of P-channel transistors, may be combined with an efficient strain component while enhanced overall process uniformity may also be accomplished.

Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

Abstract: An object of the invention is to improve the accuracy of light detection in a photosensor, and to increase the light-receiving area of the photosensor. The photosensor includes: a light-receiving element which converts light into an electric signal; a first transistor which transfers the electric signal; and a second transistor which amplifies the electric signal. The light-receiving element includes a silicon semiconductor, and the first transistor includes an oxide semiconductor. The light-receiving element is a lateral-junction photodiode, and an n-region or a p-region included in the light-receiving element overlaps with the first transistor.

Abstract: The invention offers a method of producing a semiconductor device that can suppress the worsening of the property due to surface roughening of a wafer by sufficiently suppressing the surface roughening of the wafer in the heat treatment step and a semiconductor device in which the worsening of the property caused by the surface roughening is suppressed. The method of producing a MOSFET as a semiconductor device is provided with a step of preparing a wafer 3 made of silicon carbide and an activation annealing step that performs activation annealing by heating the wafer 3. In the activation annealing step, the wafer 3 is heated in an atmosphere containing a vapor of silicon carbide generated from the SiC piece 61, which is a generating source other than the wafer 3.

Abstract: A group III nitride semiconductor substrate production method includes preparing a bulk crystal formed of a group III nitride semiconductor single crystal. The group III nitride semiconductor single crystal has one crystalline plane and an other crystalline plane. Hardness of the other crystalline plane is smaller than hardness of the one crystalline plane. The prepared bulk crystal is cut from the other crystalline plane to the one crystalline plane of the bulk crystal.

Abstract: Embodiments of a thin-film heterostructure thermoelectric material and methods of fabrication thereof are disclosed. In general, the thermoelectric material is formed in a Group IIa and IV-VI materials system. The thermoelectric material includes an epitaxial heterostructure and exhibits high heat pumping and figure-of-merit performance in terms of Seebeck coefficient, electrical conductivity, and thermal conductivity over broad temperature ranges through appropriate engineering and judicious optimization of the epitaxial heterostructure.

Abstract: A nitride-based semiconductor light-emitting device capable of suppressing reduction of characteristics and a yield and method of fabricating the same is described. The method of fabricating includes the steps of forming a groove portion on a nitride-based semiconductor substrate by selectively removing a prescribed region of a second region of the nitride-based semiconductor substrate other than a first region corresponding to a light-emitting portion of a nitride-based semiconductor layer up to a prescribed depth and forming the nitride-based semiconductor layer having a different composition from the nitride-based semiconductor substrate on the first region and the groove portion of the nitride-based semiconductor substrate.

Abstract: Provided is a CdTe-based semiconductor substrate for epitaxial growth, which is capable of growing good-quality epitaxial crystals without urging a substrate user to implement etching treatment before the epitaxial growth. A CdTe-based semiconductor substrate, in which tracks of linear polishing damage with a depth of 1 nm or more are not observed within a viewing range of 10 ?m×10 ?m when a surface of the substrate is observed by an atomic force microscope, and orange peel defects are not observed when the surface of the substrate is visually observed under a fluorescent lamp, can grow the good-quality epitaxial crystals.

Abstract: The semiconductor device includes a thin film transistor which includes a gate electrode layer, a gate insulating layer over the gate electrode layer, a source electrode layer and a drain electrode layer over the gate insulating layer, a buffer layer over the source electrode layer and the drain electrode layer, and a semiconductor layer over the buffer layer. A part of the semiconductor layer overlapping with the gate electrode layer is over and in contact with the gate insulating layer and is provided between the source electrode layer and the drain electrode layer. The semiconductor layer is an oxide semiconductor layer containing indium, gallium, and zinc. The buffer layer contains a metal oxide having n-type conductivity. The semiconductor layer and the source and drain electrode layers are electrically connected to each other through the buffer layer.

Abstract: A virtual substrate structure includes a crystalline silicon substrate with a first layer of III-N grown on the silicon substrate. Ge clusters or quantum dots are grown on the first layer of III-N and a second layer of III-N is grown on the Ge clusters or quantum dots and any portions of the first layer of III-N exposed between the Ge clusters or quantum dots. Additional alternating Ge clusters or quantum dots and layers of III-N are grown on the second layer of III-N forming an upper surface of III-N. Generally, the additional alternating layers of Ge clusters or quantum dots and layers of III-N are continued until dislocations in the III-N adjacent the upper surface are substantially eliminated.

Abstract: The invention relates to a novel optical function layer and its production, the function layer imparting to materials coated with it protection against uv radiation while transmitting electromagnetic radiation of larger wavelengths. The function layer of the invention and the manufacturing method of the invention offer advantages over the state of the art by allowing very accurate and precise adjustability in the uv range of the relatively sharp absorption constant.

Abstract: There is disclosed methods of making photosensitive devices, such as flexible photovoltaic (PV) devices, through the use of epitaxial liftoff. Also described herein are methods of preparing flexible PV devices comprising a structure having a growth substrate, wherein the selective etching of protective layers yields a smooth growth substrate that us suitable for reuse.

Abstract: Provided are a transistor, a method of manufacturing the transistor, and an electronic device including the transistor. The transistor may include a gate insulator of which at least one surface is treated with plasma. The surface of the gate insulator may be an interface that contacts a channel layer. The interface may be treated with plasma by using a fluorine (F)-containing gas, and thus may include fluorine (F). The interface treated with plasma may suppress the characteristic variations of the transistor due to light.

Abstract: The present invention describes a hybrid integrated circuit comprising both CMOS and III-V devices, monolithically integrated in a single chip. It allows the almost complete elimination of the contamination issues related to the integration of different technologies, maintaining at the same time a good planarization of the structure. It further simplifies the fabrication process, allowing the growth of high quality III-V materials on (100) silicon substrates lowering the manufacturing cost. Moreover, differently from many prior art attempts, it does not require silicon on insulator technologies and/or other expensive process steps. This invention enables the consolidation on the same integrated circuit of a hybrid switching power converter that takes advantage of the established circuit topologies of CMOS circuitries and of the higher mobility and voltage withstanding of III-V HEMT devices.

Abstract: Provided is an oxynitride semiconductor comprising a metal oxynitride. The metal oxynitride contains Zn and In and at least one element selected from the group consisting of Ga, Sn, Mg, Si, Ge, Y, Ti, Mo, W, and Al. The metal oxynitride has an atomic composition ratio of N, N/(N+O), of 7 atomic percent or more to 80 atomic percent or less.

Abstract: A high quality II-VI semiconductor nanowire is disclosed. A plurality of II-VI semiconductor nanowires is provided, with each being fixed to a support. Each nanowire terminates in a free end and a metal alloy nanoparticle is fixed to each nanowire at its free end.

Abstract: A method of manufacturing a semiconductor wafer of the present invention includes the steps of: obtaining a composite base by forming a base surface flattening layer having a surface RMS roughness of not more than 1.0 nm on a base; obtaining a composite substrate by attaching a semiconductor crystal layer to a side of the composite base where the base surface flattening layer is located; growing at least one semiconductor layer on the semiconductor crystal layer of the composite substrate; and obtaining the semiconductor wafer including the semiconductor crystal layer and the semiconductor layer by removing the base surface flattening layer by wet etching and thereby separating the semiconductor crystal layer from the base.

Abstract: A light emitting apparatus may include a gate metal positioned between a p-type contact and an n-type contact, a gate oxide or other dielectric stack positioned below and attached to the gate metal, a Ge or Si1-zGez channel positioned below and attached to the gate dielectric stack, a buffer, and a silicon substrate positioned below and attached to the buffer. The light emitting apparatus may alternatively include a gate metal positioned between a p-type contact and an n-type contact, a wide bandgap semiconductor positioned below and attached to the gate metal, a Ge or Si1-zGez channel positioned below and attached to the wide bandgap semiconductor, a buffer, and a silicon substrate positioned below and attached to the buffer. Embodiments of the light emitting apparatus may be configured for use in current-injected on-chip lasers, light emitting diodes or other light emitting devices.

Abstract: In one aspect, the present invention provides a method of processing a substrate, e.g., a semiconductor substrate, by irradiating a surface of the substrate (or at least a portion of the surface) with a first set of polarized short laser pulses while exposing the surface to a fluid to generate a plurality of structures on the surface, e.g., within a top layer of the surface. Subsequently, the structured surface can be irradiated with another set of polarized short laser pulses having a different polarization than that of the initial set while exposing the structured surface to a fluid, e.g., the same fluid initially utilized to form the structured surface or a different fluid. In many embodiments, the second set of polarized laser pulses cause the surface structures formed by the first set to break up into smaller-sized structures, e.g., nano-sized features such as nano-sized rods.

Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

Abstract: A selenium/Group 3a ink, comprising (a) a selenium/Group 3a complex which comprises a combination of, as initial components: a selenium component comprising selenium; an organic chalcogenide component having a formula selected from RZ—Z?R? and R2—SH; wherein Z and Z? are each independently selected from sulfur, selenium and tellurium; wherein R is selected from H, C1-20 alkyl group, a C6-20 aryl group, a C1-20 hydroxyalkyl group, an arylether group and an alkylether group; wherein R? and R2 are selected from a C1-20 alkyl group, a C6-20 aryl group, a C1-20 hydroxyalkyl group, an arylether group and an alkylether group; and, a Group 3a complex, comprising at least one Group 3a material selected from aluminum, indium, gallium and thallium complexed with a multidentate ligand; and, (b) a liquid carrier; wherein the selenium/Group 3a complex is stably dispersed in the liquid carrier.

Abstract: We have observed anomalous behavior of II-VI semiconductor devices grown on certain semiconductor substrates, and have determined that the anomalous behavior is likely the result of indium atoms from the substrate migrating into the II-V layers during growth. The indium can thus become an unintended dopant in one or more of the II-VI layers grown on the substrate, particularly layers that are close to the growth substrate, and can detrimentally impact device performance. We describe a variety of semiconductor constructions and techniques effective to deplete the migrating indium within a short distance in the growth layers, or to substantially prevent indium from migrating out of the substrate, or to otherwise substantially isolate functional II-VI layers from the migrating indium, so as to maintain good device performance.

Abstract: The present invention discloses structures to increase carrier mobility using engineered substrate technologies for a solid state device. Structures employing rare-earth compounds enable heteroepitaxy of different semiconductor materials of different orientations.

Abstract: A method of manufacturing a nitride nanoparticle comprises manufacturing the nitride nanostructure from constituents including: a material containing metal, silicon or boron, a material containing nitrogen, and a capping agent having an electron-accepting group for increasing the quantum yield of the nitride nanostructure. Nitride nanoparticles, for example nitride nanocrystals, having a photoluminescence quantum yield of at least 1%, and up to 20% or greater, may be obtained.

Abstract: Provided are a compound semiconductor film which is manufactured at a low temperature and exhibits excellent p-type conductivity, and a light emitting film in which the compound semiconductor film and a light emitting material are laminated and with which high-intensity light emission can be realized. The compound semiconductor film has a composition represented by a Cu2—Zn—IV—S4 type, in which the IV is at least one of Ge and Si. The light emitting film includes the light emitting material and the compound semiconductor film laminated on a substrate in the stated order.

Abstract: Device and method of forming a device in which a substrate (10) is fabricated with at least part of an electronic circuit for processing signals. A bulk single crystal material (14) is formed on the substrate, either directly on the substrate (10) or with an intervening thin film layer or transition region (12). A particular application of the device is for a radiation detector.

Abstract: In a thin film transistor (1), a gate insulating layer (4) is formed on a gate electrode (3) formed on an insulating substrate (2). Formed on the gate insulating layer (4) is a semiconductor layer (5). Formed on the semiconductor layer (5) are a source electrode (6) and a drain electrode (7). A protective layer (8) covers them, so that the semiconductor layer (5) is blocked from an atmosphere. The semiconductor layer (5) (active layer) is made of, e.g., a semiconductor containing polycrystalline ZnO to which, e.g., a group V element is added. This allows practical use of a semiconductor device which has an active layer made of zinc oxide and which includes an protective layer for blocking the active layer from an atmosphere.

Abstract: Device and method of forming a device in which a substrate (10) is fabricated with at least part of an electronic circuit for processing signals. A bulk single crystal material (14) is formed on the substrate, either directly on the substrate (10) or with an intervening thin film layer or transition region (12). A particular application of the device is for a radiation detector.

Abstract: A layer including modified cadmium telluride and unmodified cadmium telluride disposed within the cadmium telluride layer. The modified area includes a concentration of telluride that is greater than the concentration of telluride in the unmodified cadmium telluride area. The modified area also includes a hexagonal close packed crystal structure. A method for modifying a cadmium telluride layer and a thin film device are also disclosed.

Abstract: Described herein are semiconductor structures comprising laterally varying II-VI alloy layer formed over a surface of a substrate. Further, methods are provided for preparing laterally varying II-VI alloy layers over at least a portion of a surface of a substrate comprising contacting at least a portion of a surface of a substrate within a reaction zone with a chemical vapor under suitable reaction conditions to form a laterally varying II-VI alloy layer over the portion of the surface of the substrate, wherein the chemical vapor is generated by heating at least two II-VI binary compounds; and the reaction zone has a temperature gradient of at least 50-100° C. along an extent of the reaction zone. Also described here are devices such as lasers, light emitting diodes, detectors, or solar cells that can use such semiconductor structures.

Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.

Abstract: A radiation detector comprising a II-VI compound semiconductor substrate that absorbs radiation having a first energy, a II-VI compound semiconductor layer of a first conductivity type provided on a main surface of the II-VI compound semiconductor substrate, a metal layer containing at least one of a group III element and a group V element provided on the II-VI compound semiconductor layer, a IV semiconductor layer having a second conductivity type opposite to the first conductivity type provided on the metal layer, and a IV semiconductor substrate that absorbs radiation having a second energy different from the first energy provided on the IV semiconductor layer.

Abstract: A semiconductor device including thin film transistors having high electrical properties and reliability is proposed. Further, a method for manufacturing the semiconductor devices with mass productivity is proposed. The semiconductor device includes a thin film transistor which includes a gate electrode layer, a gate insulating layer over the gate electrode layer, a source electrode layer and a drain electrode layer over the gate insulating layer, a buffer layer over the source electrode layer and the drain electrode layer, and a semiconductor layer over the buffer layer. A part of the semiconductor layer overlapping with the gate electrode layer is over and in contact with the gate insulating layer and is provided between the source electrode layer and the drain electrode layer. The semiconductor layer is an oxide semiconductor layer containing indium, gallium, and zinc. The buffer layer contains a metal oxide having n-type conductivity.