Smart (e.g., Credit) Card Package Patents (Class 257/679)
  • Patent number: 11942729
    Abstract: It is aimed to provide a shielded connector capable of improving heat dissipation performance while suppressing enlargement. A shielded connector 10 includes a housing 11, a shield shell 12 for covering the housing 11 from outside, a connection terminal 14 to be accommodated into the housing 11 and electrically connected to a mating device, and an inner conductive member 13 for electrically connecting the connection terminal 14 and a wire W. High radiation portions 51 having at least a higher radiation rate than a core W1 of the wire W are provided on at least some of a surface 11a of the housing 11, a surface 12a of the shield shell 12, a surface 14a of the connection terminal 14 and a surface 13a of the inner conductive member 13.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: March 26, 2024
    Assignees: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yusuke Yamada, Junichi Mukuno
  • Patent number: 11915075
    Abstract: A transaction card that includes a card body that can include a ceramic material. The card body can include a primary surface and a secondary surface, a laser marked feature disposed on the card body and a laser etched feature disposed on the card body. A method of making a transaction card can include forming a ceramic material slurry comprising a ceramic material and a binder, forming a green body from the ceramic material slurry, firing the green body at a firing temperature to create a fired ceramic body, grinding the fired ceramic body into a card body, and polishing a primary surface of the card body.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: February 27, 2024
    Assignee: American Express Travel Related Services Company, Inc.
    Inventors: Troy Patrick Williams, Peter Bates
  • Patent number: 11909063
    Abstract: An electronic device, according to various embodiments of the present disclosure, may comprise: a housing including a seating groove therein; a battery seated in the seating groove, at least a partial area of which includes a curved surface; and an adhesive member disposed between the battery and the seating groove and formed along at least a portion of an edge of the battery. The adhesive member may be formed having varied predetermined thicknesses, corresponding to a position of the battery.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: February 20, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soonwan Chung, Myungheon Kang, Junho Park, Junghyun Lee, Changhyun Kim
  • Patent number: 11903120
    Abstract: An adhesion between a sealing resin layer and a shield film is improved by a mesh sheet disposed on an opposite surface of the sealing resin layer. A radio frequency module includes a wiring board, a component mounted on an upper surface of the wiring board, a sealing resin layer that covers the component, a mesh sheet disposed on an upper surface of the sealing resin layer, and a shield film provided to cover the upper surface and side surfaces of the sealing resin layer, and the mesh sheet. The mesh sheet and the sealing resin layer, as well as the mesh sheet and the shield film are firmly in adhesion with one another. Thus, the adhesion between the sealing resin layer and the shield film can be improved.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: February 13, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Tadashi Nomura
  • Patent number: 11862539
    Abstract: A packaged electronic device includes a substrate having a lead. The lead includes an outward facing side surface having a first height, and an inward facing side surface having a second height that is less than the first height. An electronic device is electrically connected to the lead. A package body encapsulates the electronic device and portions of the lead. The outward facing side surface is exposed through a side surface of the package body, and the inward facing side surface is encapsulated by the package body. A conductive layer is disposed on the outward facing side surface to provide the packaged electronic device with an enhanced wettable flank. In one embodiment, the electronic device is electrically connected to a thick terminal portion having the outward facing side surface. In another embodiment, the electronic device is electrically connected to a thin terminal portion having the inward facing side surface.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: January 2, 2024
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventor: Pedro Joel Rivera-Marty
  • Patent number: 11862235
    Abstract: A stacked semiconductor device is disclosed that includes a plurality of semiconductor dies. Each die has oppositely disposed first and second surfaces, with pads formed on each of the surfaces. A plurality of through-vias connect respective pads on the first surface to respective pads on the second surface. The through-vias include a first group of through-vias coupled to respective I/O circuitry on the semiconductor die and a second group of through-vias not coupled to I/O circuitry on the semiconductor die. The plurality of semiconductor dies are stacked such that the first group of through-vias in a first one of the plurality of semiconductor dies are aligned with respective ones of at least a portion of the second group of through-vias in a second one of the plurality of semiconductor dies.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: January 2, 2024
    Assignee: Rambus Inc.
    Inventor: Frederick A. Ware
  • Patent number: 11855034
    Abstract: An electronic device package is provided. The electronic device package includes a redistribution layer (RDL), a first electronic component and an interconnector. The RDL includes a topmost circuit layer, and the topmost circuit layer includes a conductive trace. The first electronic component is disposed over the RDL. The interconnector is disposed between the RDL and the first electronic component. A direction is defined by extending from a center of the first electronic component toward an edge of the first electronic component, and the direction penetrates a first sidewall and a second sidewall of the interconnector, the second sidewall is farther from the center of the first electronic component than the first sidewall is, and the conductive trace is outside a projection region of the second sidewall.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: December 26, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chung-Hung Lai, Chin-Li Kao, Chih-Yi Huang, Teck-Chong Lee
  • Patent number: 11741326
    Abstract: Aspects described herein may allow for a payment card having enhanced edge patterns. The payment card may include a complex edge morphology on the physical card that may make the payment card more likely to be used by consumers and makes the payment card stand out due to the enhanced edge design. The edge of the payment card may be reeded, crenelated, or may include various shapes of various sizes on one or more of the edge walls extending around the payment card. The edge of the payment card may also include dimples, chips, and/or other complex design patterns cut into the face of the payment card close to the edge. The payment card may also include inclusions of other materials, such as metals, ceramic, and/or polymer to be added which fill or partially fill any voids produced by the edge patterns.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: August 29, 2023
    Assignee: Capital One Services, LLC
    Inventors: Timothy Dellinger, Kavya Nagarajaiah, Sahana Arya
  • Patent number: 11725986
    Abstract: A spectrometer includes a support having a bottom wall part and a side wall part arranged on one side of the bottom wall part, a light detection element supported by the support to face a surface of the bottom wall part on the one side through a spectroscopic space, a resin molded layer provided at least on the surface of the bottom wall part on the one side, and a reflecting layer provided on the resin molded layer and included in an optical function part on the bottom wall part. The resin molded layer has a first part having a shape corresponding to the optical function part and a second part which surrounds the first part and is thinner than the first part.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: August 15, 2023
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Takafumi Yokino, Anna Yoshida, Katsuhiko Kato
  • Patent number: 11708204
    Abstract: An electronic component array includes a base tape including paper and having approximately elongated and substantially planar shape, the base tape being provided with a plurality of accommodation recesses provided in a longitudinal direction of the base tape; a plurality of electronic components; and a cover tape. The electronic component array includes a first bonding portion in which openings of the respective accommodation recesses are covered by the cover tape in a state where the electronic components are included in the respective accommodation recesses, and a second bonding portion in which openings of the respective accommodation recesses are covered by the cover tape in a state where the electronic components are not included in the respective accommodation recesses. A peel strength of the second bonding portion is about 10% or more and about 70% or less of a peel strength of the first bonding portion.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: July 25, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yasuhiro Shimizu
  • Patent number: 11710986
    Abstract: A near-field communication device having one or more processors configured to control the near-field communication device, an energy supplier having an energy supply circuit and a supply antenna configured to provide energy to a second antenna circuit arranged externally to the near-field communication device, wherein the supply antenna of the energy supplier is galvanically coupled to the energy supply circuit, and a first antenna circuit having a first communication circuit and a first antenna, wherein the first communication circuit is configured for communication with a second communication circuit of the second antenna circuit by means of an inductive coupling by means of the first antenna of the first antenna circuit.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: July 25, 2023
    Assignee: Infineon Technologies AG
    Inventors: Thomas Leutgeb, Walter Kargl
  • Patent number: 11696393
    Abstract: A method for manufacturing a circuit board is disclosed. An inner wiring base board with a first opening is provided. A base board is fixed in the first opening, and a first wiring base board and a second wiring base board are pressed on opposite surfaces of the inner wiring base board. The base board is made of ceramic and has a high light reflectivity of 92% to 97%. A first conductor layer and a second conductor layer are formed on opposite surfaces of the laminated structure. The first conductor layer includes a plurality of connecting pads on the base board. A solder mask is formed on an outer side of the first conductor layer, the solder mask has a high light reflectivity of 92% to 95%, and the base board is exposed outside the solder mask.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: July 4, 2023
    Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited.
    Inventors: Jin-Cheng Wu, Mei-Hua Huang, Ning Hou, Hua-Ning Wang, Qiang Song, Rong-Chao Li
  • Patent number: 11675001
    Abstract: Embodiments of the present disclosure relate to solutions for introducing personalization data in nonvolatile memories of a plurality of integrated circuits, comprising writing in the nonvolatile memory of a given integrated circuit a static data image, corresponding to an invariant part of nonvolatile memory common to the plurality of integrated circuits, and a personalization data image representing data specific to the given integrated circuit.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: June 13, 2023
    Inventors: Marco Alfarano, Sofia Massascusa
  • Patent number: 11653463
    Abstract: A memory card is provided with various pad layouts to prevent a data signal pad from contacting a power contact in a host during insertion and removal of the memory card. The memory card can have a form factor and features that accommodate a relatively-large memory with relatively-high performance and accompanying thermal conditions. An efficient card lock mechanism is also provided.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: May 16, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Yoseph Pinto, Michael Lavrentiev
  • Patent number: 11626367
    Abstract: A semiconductor package includes a redistribution substrate including a first redistribution layer; a semiconductor chip having a connection pad connected to the first redistribution layer; a vertical connection conductor electrically connected to the connection pad by the first redistribution layer; a core member having a first through-hole accommodating the semiconductor chip and a second through-hole accommodating the vertical connection conductor; an encapsulant filling the first and second through-holes; and a redistribution member including a second redistribution layer. The vertical connection conductor and the core member include a same material. A width of a lower surface of the vertical connection conductor is wider than that of an upper surface thereof, a width of a lower end of the first through-hole is narrower than that of an upper end thereof, and a width of a lower end of the second through-hole is narrower than that of an upper end thereof.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: April 11, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Myungsam Kang, Youngchan Ko, Kyungdon Mun
  • Patent number: 11600912
    Abstract: An antenna device includes a substrate, a chip, and an antenna. The chip is disposed on the substrate, and the chip has at least two pads. The antenna is disposed on the substrate, and the chip is disposed between the substrate and the antenna. The antenna has a first bonding line segment and a second bonding line segment electrically connected to the at least two pads respectively. The first bonding line segment is located at an outermost coil of the antenna, and is disposed across a short side direction of the chip in a manner of completely covering one of the at least two pads. The second bonding line segment is located at an innermost coil of the antenna, and is disposed across the short side direction of the chip in a manner of completely covering another of the at least two pads.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: March 7, 2023
    Assignees: Au Optronics Corporation, SES RFID Solutions GmbH
    Inventors: Chung-Hung Chen, Yi-Cheng Lai, Hsiang-Chi Cheng, Shyh-Bin Kuo, Martin Jeffrey Scattergood
  • Patent number: 11559986
    Abstract: A liquid ejecting apparatus includes a drive element, and a drive circuit that outputs a drive signal that drives the drive element, wherein the drive circuit includes a modulation circuit that modulates a base drive signal to output a modulation signal, an amplifier circuit that amplifies the modulation signal to output an amplified modulation signal, a demodulation circuit that demodulates the amplified modulation signal to output the drive signal, and a substrate on which the modulation circuit, the amplifier circuit, and the demodulation circuit are provided, wherein the substrate includes a base material includes a metal and a first layer laminated on the base material, wherein the first layer includes a first propagation wire through which at least one of the amplified modulation signal and the drive signal propagates, and wherein the base material has a thickness greater than a thickness of the first layer.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: January 24, 2023
    Assignee: Seiko Epson Corporation
    Inventors: Dai Nozawa, Yoichiro Kondo
  • Patent number: 11555108
    Abstract: The disclosure provides a cross-linkable polymer composition, a core layer for an information carrying card comprising such cross-linked composition, resulting information carrying card, and methods of making the same. An information carrying card includes a body defining a first cavity and a second cavity. The first cavity has a first area and the second cavity has a second area. The first cavity is continuous with the second cavity and the second area is less than the first area. A circuit element is disposed within the first cavity.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: January 17, 2023
    Assignee: Idemia America Corp.
    Inventor: Mark A. Cox
  • Patent number: 11532425
    Abstract: Coil structures and methods of forming are provided. The coil structure includes a substrate. A plurality of coils is disposed over the substrate, each coil comprising a conductive element that forms a continuous spiral having a hexagonal shape in a plan view of the coil structure. The plurality of coils is arranged in a honeycomb pattern, and each conductive element is electrically connected to an external electrical circuit.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: December 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tzu-Sung Huang, Chen-Hua Yu, Hao-Yi Tsai, Hung-Yi Kuo, Ming Hung Tseng
  • Patent number: 11514288
    Abstract: A metal smartcard (SC) having a transponder chip module (TCM) with a module antenna (MA), and a card body (CB) comprising two discontinuous metal layers (ML), each layer having a slit (S) overlapping the module antenna, the slits being oriented differently than one another. One metal layer can be a front card body (FCB, CF1), and the other layer may be a rear card body (RCB, CF2) having a magnetic stripe (MS) and a signature panel (SP). The slits in the metal layers may have non-linear shapes.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: November 29, 2022
    Assignee: AmaTech Group Limited
    Inventors: Mustafa Lotya, David Finn, Darren Molloy
  • Patent number: 11490535
    Abstract: A robotic device having in-mold electronics is provided. According to one or more aspects, a robotic device includes an electronic computing unit for controlling the robotic device and a molded part. The molded part includes a thermoformed first film, structural layer, electronic circuit, and a functional component. The molded structural layer is arranged under the first film. The thermoformed second film arranged under the structural layer. The electronic circuit arranged over the second film and adjacent the structural layer. The electronic circuit includes a functional component communicably coupled to the electronic computing unit. The first film is arranged to cover the structural layer, the second film, and the electronic circuit to define an exposed surface of the molded part.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: November 1, 2022
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Zainab I. Ali, Alex W. Baker
  • Patent number: 11469042
    Abstract: A punching process for wireless charging coils comprises: punching a metal piece for forming a coil structure and a fixing element, the coiling structure having a plurality of coil segments, a gap being between two of the plurality of coil segments, and the fixing element connecting the coil segments for keeping the width of the gap.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: October 11, 2022
    Assignee: HOLYGO CORPORATION
    Inventor: Chien-Te Wu
  • Patent number: 11410916
    Abstract: A packaged electronic device includes a substrate having a lead. The lead includes an outward facing side surface having a first height, and an inward facing side surface having a second height that is less than the first height. An electronic device is electrically connected to the lead. A package body encapsulates the electronic device and portions of the lead. The outward facing side surface is exposed through a side surface of the package body, and the inward facing side surface is encapsulated by the package body. A conductive layer is disposed on the outward facing side surface to provide the packaged electronic device with an enhanced wettable flank. In one embodiment, the electronic device is electrically connected to a thick terminal portion having the outward facing side surface. In another embodiment, the electronic device is electrically connected to a thin terminal portion having the inward facing side surface.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: August 9, 2022
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventor: Pedro Joel Rivera-Marty
  • Patent number: 11390737
    Abstract: The disclosure provides a cross-linkable polymer composition, a core layer for an information carrying card comprising such cross-linked composition, resulting information carrying card, and methods of making the same. A crosslinkable polymer composition comprises a curable base polymer resin in a liquid or paste form, and a particulate thermoplastic filler. The base polymer resin is selected from the group consisting of urethane acrylate, silicone acrylate, epoxy acrylate, urethane, acrylate, silicone and epoxy. The particulate thermoplastic filler may be polyolefin, polyvinyl chloride (PVC), a copolymer of vinyl chloride and at least another monomer, or a polyester such as polyethylene terephthalate (PET), a compound or blend thereof.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: July 19, 2022
    Assignee: X-Card Holdings, LLC
    Inventor: Mark A. Cox
  • Patent number: 11380622
    Abstract: The disclosure provides a method to authenticate an integrated circuit (IC) structure. The method may include forming a first authentication film (AF) material within the IC structure. A composition of the first AF material is different from an adjacent material within the IC structure. The method includes converting the first AF material into a void within the IC structure. Additionally, the method includes creating an authentication map of the IC structure to include a location of the void in the IC structure for authentication of the IC structure.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: July 5, 2022
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Vibhor Jain, Sunil K. Singh, Johnatan A. Kantarovsky, Siva P. Adusumilli, Sebastian T. Ventrone, John J. Ellis-Monaghan, Yves T. Ngu
  • Patent number: 11374302
    Abstract: A wireless signal device is provided. The wireless signal device includes a device body, a fastening belt, a wireless signal module and a switch unit. The device body includes a through hole. A fixed end of the fastening belt is affixed to the device body, and a free end of the fastening belt is adapted to be inserted into the through hole. The wireless signal module is disposed in the device body. The switch unit is disposed in the device body, wherein in a signal transmission mode, the fastening belt passes through the through hole, and the switch unit is pressed by the fastening belt to activate the wireless signal module.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: June 28, 2022
    Assignee: WISTRON NEWEB CORP.
    Inventors: Ming-Chan Lee, Jun-Wei Wang, Chao-Chun Lin
  • Patent number: 11356830
    Abstract: A first object and a second object are movable in relation to one another. The first object includes a transponder using an integrated circuit having two terminals which may or may not be shorted. The presence or absence of a short circuit between the two terminals is detected. This is accomplished at least partly by the second object depending on the relative positioning of the first and second objects. The transponder transmits, to a module having a contactless reader function, positioning information corresponding to said relative positioning using a contactless communication protocol.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: June 7, 2022
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Jean-Louis Demessine
  • Patent number: 11301593
    Abstract: A PUF-film includes a flat circuit structure including a plurality of circuit elements and includes a flat electric shield. The circuit structure is evaluable with respect to a plurality of electric capacitance values being arranged between the plurality of circuit elements. The electric shield at least partially covers the circuit structure and provides for a counter reference electrode of the plurality of electric capacitance values.
    Type: Grant
    Filed: April 4, 2019
    Date of Patent: April 12, 2022
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Vincent Immler, Johannes Obermaier
  • Patent number: 11291132
    Abstract: A housing includes a base and a mark piece. The base includes a bottom wall and at least one side wall. The at least one side wall is vertically connected to the bottom wall. A height of the side wall exists between a top end of the at least one side wall and the bottom wall. The mark piece is disposed on the bottom wall and extends from the bottom wall in a direction away from the bottom wall. The mark piece has a low scale and a high scale. A distance from the low scale to the bottom wall is less than the height of the side wall. A distance from the high scale to the bottom wall is substantially the same as the height of the side wall.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: March 29, 2022
    Assignee: PEGATRON CORPORATION
    Inventors: Ju-Ting Lai, Chung-Hsien Huang, Hsing-Hao Chen
  • Patent number: 11251516
    Abstract: A semiconductor device, or semiconductor device package, that includes a substrate having an antenna structure on a surface of the substrate and a wire bond that electrically connects the antenna structure to the substrate to form an antenna or a first antenna configuration. The substrate may include a second antenna structure with the wire bond connected to the second antenna structure forming a second antenna or antenna configuration. The semiconductor device may include a radio communication device electrically connected to the substrate. The antenna or antenna configuration may be tuned to the requirements of the radio communication device. The antenna configuration may be tuned by connected to different antenna structures on the surface of the substrate. The antenna configuration may be tuned by changing a length of the wire bond, changing a diameter of the wire bond, and/or changing the material of the wire bond.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: February 15, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Shijian Luo, Owen R. Fay
  • Patent number: 11227809
    Abstract: A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: January 18, 2022
    Inventors: See Chian Lim, Teck Tiong Tan, Yung Kuan Hsiao, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao
  • Patent number: 11222861
    Abstract: The disclosure relates to a dual-interface integrated circuit (IC) card module for use in a dual-interface IC card. Embodiments disclosed include a dual-interface integrated circuit card module (150), the module comprising: a substrate (104) having first and second opposing surfaces; a contact pad (102) on the first surface of the substrate; an integrated circuit (110) on the second surface of the substrate (104), the integrated circuit (110) having electrical connections to the contact pad (102) through the substrate (104); and a pair of antenna pads (108) disposed in recesses (103) in the second surface of the substrate (104) and electrically connected to corresponding antenna connections on the integrated circuit (110).
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: January 11, 2022
    Assignee: NXP B.V.
    Inventor: Christian Zenz
  • Patent number: 11177236
    Abstract: A semiconductor device includes a circuit board including an insulating layer having opposite front and rear surfaces, an electrode pad disposed on the front surface, a housing having an installation area for the circuit board, and a bonding material embedded in a recess within either a first area located at the rear surface of the insulating layer directly below an area of the circuit board in which the electrode pad is disposed, or at a second area located within the installation area of the housing and corresponding to the first area in a plan view.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: November 16, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Tatsuya Karasawa
  • Patent number: 11139220
    Abstract: A flexible semiconductor package includes a semiconductor chip accommodated in a cavity formed in a substrate, a molding layer covering an entire upper surface of the substrate and the cavity, and a wiring portion including an insulating layer and a redistribution member provided under lower surfaces of the substrate and the semiconductor chip, wherein the molding layer includes a pre-preg in which a resin is impregnated with a glass fabric, and the molding layer and the insulating layer are attached to the semiconductor chip accommodated in the cavity by a roll-to-roll continuous process.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: October 5, 2021
    Assignee: HAESUNG DS CO., LTD.
    Inventors: Jea Won Kim, Chong Han Park, Jong Woo Park
  • Patent number: 11118908
    Abstract: A sensor for sensing a physical transmitter field dependent on a physical quantity to be measured, including: a sensor circuit for sensing the transmitter field and for outputting a sensor signal dependent on the transmitter field a circuit carrier having a first region in which at least a part of the sensor circuit is supported and a second region in which at least a first mechanical interface and a second mechanical interface for connecting the circuit carrier to a retainer are arranged, and a noise resistance element, which is arranged between the first region and the second region and which is designed to conduct structure-borne noise entering via the first mechanical interface to the second mechanical interface.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: September 14, 2021
    Assignee: CONTINENTAL TEVES AG & CO. OHG
    Inventors: Thomas Fischer, Jakob Schillinger, Dietmar Huber, Stefan G√ľnthner, Lothar Biebricher, Michael Schulmeister
  • Patent number: 11107778
    Abstract: Embodiments of an active shielding device and method for active shielding are disclosed.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: August 31, 2021
    Assignee: NXP B.V.
    Inventors: Siamak Delshadpour, Steven Daniel
  • Patent number: 11081370
    Abstract: A method of manufacturing a semiconductor package includes mounting and electrically connecting a semiconductor die to a substrate. The semiconductor die and the substrate are encapsulated to form an encapsulation. Via holes are laser-ablated through the encapsulation and conductive material is deposited within the via holes to form vias. A first buildup dielectric layer is formed on the encapsulation. Laser-ablated artifacts are laser-ablated in the first buildup layer. The laser-ablated artifacts in the first buildup layer are filled with a first metal layer to form a first electrically conductive pattern in the first build up layer. The operations of forming a buildup layer, forming laser-ablated artifacts in the buildup layer, and filling the laser-ablated artifacts with an electrically conductive material to form an electrically conductive pattern can be performed any one of a number of times to achieve the desired redistribution.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: August 3, 2021
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Ronald Patrick Huemoeller, Sukianto Rusli, David Jon Hiner
  • Patent number: 11069601
    Abstract: The present disclosure is directed to leadless semiconductor packages with improved wettable flanks that encourage the formation of solder fillets when the leadless semiconductor package is mounted to a substrate. The solder fillets are consistently formed and are easily detectable by inspection systems, such as automated optical inspection (AOI) systems.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: July 20, 2021
    Assignee: STMicroelectronics, Inc.
    Inventors: Ian Harvey Arellano, Aaron Cadag, Ela Mia Cadag
  • Patent number: 11005152
    Abstract: An RFID transponder, comprising an antenna, comprising a radiating element an IC, and a ground plane arranged under the radiating element, the ground plane being solid without openings. The radiating element comprises a near field communication section extending over the edge of the ground plane for enabling near field communication of the antenna by the ground plane from backside of the RFID transponder.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: May 11, 2021
    Assignee: Confidex OY
    Inventors: Heikki Ahokas, Miika Pylvanainen
  • Patent number: 10939562
    Abstract: A manufacturing method of a multilayer board includes: forming a metal core layer including a main body, an island portion, and four connection portions, the island portion having a substantially rectangle shape and being located in an opening formed in the main body, the opening having a substantially rectangle shape, the four connection portions connecting side surfaces of four corners of the island portion or side surfaces of vicinities of the four corners of the island portion to a side surface of the main body; forming a first insulating layer on the metal core layer and in the opening; and forming, in the first insulating layer, a hole reaching each of the four connection portions and removing at least a part of each of the four connection portions through the hole to electrically separate the main body and the island portion from each other
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: March 2, 2021
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Yuichi Sugiyama, Masashi Miyazaki, Yutaka Hata, Hiroyuki Kobayashi
  • Patent number: 10922440
    Abstract: The present invention provides various aspects for processing multiple types of substrates within cleanspace fabricators or for processing multiple or single types of substrates in multiple types of cleanspace environments. In some embodiments, a collocated composite cleanspace fabricator may be capable of processing semiconductor devices into integrated circuits and then performing assembly operations to result in product in packaged form. Customized smart devices, smart phones and touchscreen devices may be fabricated in examples of a cleanspace fabricator. In some examples, self-destruction devices may safely be installed into the assembly of the smart device in a cleanspace fabricator.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: February 16, 2021
    Inventor: Frederick A. Flitsch
  • Patent number: 10923509
    Abstract: A thin film transistor (TFT) array substrate and a display panel are provided in the present application. The TFT array substrate includes a plurality of gate signal lines, a plurality of source signal lines, a plurality of gate traces, the gate traces including a plurality of first gate traces, a plurality of second gate traces, a plurality of first gate trace holes, and a plurality of second gate trace holes; a plurality of source traces, the source traces including a plurality of first source traces, a plurality of second source traces, a plurality of first source trace holes, and a plurality of second source trace holes connecting the source signal lines and the first source traces.
    Type: Grant
    Filed: December 25, 2018
    Date of Patent: February 16, 2021
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Xiaoliang Feng
  • Patent number: 10910324
    Abstract: A semiconductor device has a configuration in which a stacked assembly and a resin case are combined. The stacked assembly includes a semiconductor element, a stacked substrate on which the semiconductor element is mounted, and a metal substrate on which the stacked substrate is mounted. In the resin case, a notch groove is provided at a corner portion for reducing a stress. At least one of a width and a length of the notch groove is 2 mm or more.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: February 2, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Tatsuhiko Asai, Katsumi Taniguchi
  • Patent number: 10908685
    Abstract: A hand-wearable device includes an elastic sheet including a first elastic layer and a second elastic layer facing each other; a sensor unit formed by printing a predetermined conductive liquid metal between the first elastic layer and the second elastic layer; a wire unit extending from the sensor unit and electrically connected to the sensor unit; an electrode substrate formed on one side of the wire unit and spaced apart from the wire unit by a predetermined distance; and a connection electrode formed by printing a predetermined conductive liquid metal between the wire unit and the electrode substrate.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: February 2, 2021
    Assignee: FEEL THE SAME, INC.
    Inventors: Joon Bum Bae, Su In Kim, Woo Keun Park, Da Hee Jeong, Jin Hyeok Oh
  • Patent number: 10879145
    Abstract: An electronic device includes electronic components, a molded resin element wherein the electronic components are embedded and secured, and a heat transfer layer; the heat transfer layer has a higher thermal conductivity than the molded resin element. The heat transfer layer is in contact with portions of the electronic components other than an electrode pad and a terminal. This prevents increases in the cost of manufacturing the electronic device and the allows the electronic device to be thinner.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: December 29, 2020
    Assignee: OMRON Corporation
    Inventor: Wakahiro Kawai
  • Patent number: 10839344
    Abstract: The invention is a system and method of managing equipment. The system incorporates a tagging device to attach identification tags to each piece of equipment. A scanning device is used to read the identification tags and relay this information to an equipment server. An input device is used to input information to the equipment server. The equipment server runs the equipment management program. The system flags a potential asset assigned to an asset creating individual. Equipment is designated an asset after use in an asset creating event.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: November 17, 2020
    Assignee: PROVA GROUP, INC.
    Inventors: Tommy Lee Davis, Jr., David Earl Doser, Jr.
  • Patent number: 10832538
    Abstract: Manufacturing a batch is provided which includes a plurality of items of an electronic device, the items including a plurality of corresponding main modules having a same functional structure substantially identical for the items. The method includes defining at least one security electric circuit, of an enclosure component for enclosing each item, adapted to protect the item from tampering, the security electric circuits having individual configurations substantially different among the items, for use in forming the security electric circuit with the corresponding configuration on each enclosure component. Additionally, the method includes determining one or more electric characteristics of each security electric circuit for use in configuring a monitoring circuit of the corresponding main module, the monitoring circuit being adapted to the corresponding security electric circuit for detecting the tampering, according to the electric characteristics of the corresponding security circuits.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: November 10, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Silvio Dragone, Christoph Hagleitner, Stefano S. Oggioni
  • Patent number: 10827632
    Abstract: A middle frame assembly may include a middle frame and a bearing plate, the middle frame may include a frame body having a first surface and a second surface opposite to the first surface, the frame body defines a first through hole penetrating the first surface and the second surface, the bearing plate may include a bearing body having a third surface and a fourth surface opposite to the third surface, and a first extending portion protruding from the third surface and configured to pass through the first through hole and fitting with the frame body, such that the bearing body may be connected to the frame body and that and that the first surface and the third surface may abut against each other.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: November 3, 2020
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD
    Inventor: Fuyong Huang
  • Patent number: 10826158
    Abstract: A wireless communication device having an integrated antenna, and methods for making and using the same are disclosed. The device generally includes (a) a substrate; (b) an integrated circuit (IC) comprising a plurality of printed and/or thin film layers and/or structures on the substrate, (c) a dielectric or insulator layer in at least one area of the substrate other than the IC; and (d) an antenna on the dielectric or insulator layer, comprising one or more metal traces. The plurality of printed and/or thin film layers and/or structures include an uppermost layer of metal. The antenna has (i) an inner terminal continuous with the uppermost layer of metal or connected to the uppermost layer of metal through one or more contacts, and (ii) an outer terminal connected to the uppermost layer of metal through one or more contacts and optionally a metal bridge or strap.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: November 3, 2020
    Assignee: Thin Film Electronics ASA
    Inventors: Somnath Mukherjee, Aditi Chandra, Mao Ito, Arvind Kamath, Scott Bruner, Sambhu Kundu, Anand Deshpande
  • Patent number: 10825755
    Abstract: A packaged electronic device includes a substrate having a lead. The lead includes an outward facing side surface having a first height, and an inward facing side surface having a second height that is less than the first height. An electronic device is electrically connected to the lead. A package body encapsulates the electronic device and portions of the lead. The outward facing side surface is exposed through a side surface of the package body, and the inward facing side surface is encapsulated by the package body. A conductive layer is disposed on the outward facing side surface to provide the packaged electronic device with an enhanced wettable flank. In one embodiment, the electronic device is electrically connected to a thick terminal portion having the outward facing side surface. In another embodiment, the electronic device is electrically connected to a thin terminal portion having the inward facing side surface.
    Type: Grant
    Filed: January 4, 2020
    Date of Patent: November 3, 2020
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventor: Pedro Joel Rivera-Marty