With Window Means Patents (Class 257/680)
  • Patent number: 11153471
    Abstract: An image sensor module includes an interposer substrate having a first surface and a second surface opposite to the first surface, the interposer substrate being light-transmissive and having a plurality of through-holes; an image sensor located to face the first surface of the interposer substrate, the image sensor having a light receiving surface on a side of the interposer substrate, a plurality of photoelectric conversion elements being located at the light receiving surface, the image sensor being connected with an external circuit via electrodes provided in the plurality of through-holes; and a lens unit located to face the second surface of the interposer substrate.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: October 19, 2021
    Assignee: DAI NIPPON PRINTING Co., Ltd.
    Inventors: Yoshiaki Tsuruoka, Masaaki Asano, Shinji Maekawa
  • Patent number: 11133344
    Abstract: An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlaying oxide on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of first image sensors and alignment marks; and a third level overlaying the second level, where the third level includes a plurality of second image sensors, where the third level is aligned to the alignment marks, where the second level is bonded to the first level, and where the bonded includes an oxide to oxide bond.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: September 28, 2021
    Assignee: MONOLITHIC 3D INC.
    Inventors: Zvi Or-Bach, Deepak C. Sekar, Brian Cronquist
  • Patent number: 11125957
    Abstract: An optical module includes an eyelet having a first surface, a second surface opposite to the first surface, and a penetration hole penetrating from the second surface to the first surface; a lead pin in the penetration hole, for transmitting electric signals; a pedestal protruding from the first surface in an extension direction of the lead pin; and a relay board on the pedestal, the relay board having a transmission line for electrically connecting an optical element and the lead pin. The lead pin is in no contact with an inner surface of the penetration hole. The lead pin has a flat surface which is at least a part of a surface bonded to the transmission line.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: September 21, 2021
    Assignee: CIG PHOTONICS JAPAN LIMITED
    Inventors: Daisuke Noguchi, Hiroshi Yamamoto
  • Patent number: 11064099
    Abstract: An imager includes: an imaging element chip; a fixing member to which the imaging element chip is adhered, and which is electrically connected to the imaging element chip; a circuit board that is fixed to the fixing member via a plurality of conductive members; and a stress relaxing member that is fixed to a second surface of the circuit board opposite to a first surface of the circuit board, the first surface being a surface of the circuit board to a side of which the fixing member is fixed, a linear expansion coefficient of the fixing member, a linear expansion coefficient of the circuit board, and a linear expansion coefficient of the stress relaxing member are as defined herein, and the stress relaxing member overlaps an entire adhesion portion between the imaging element chip and the fixing member as defined herein.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: July 13, 2021
    Assignee: FUJIFILM Corporation
    Inventors: Daisuke Kusuda, Tomoyuki Kawai
  • Patent number: 11062117
    Abstract: Provided are a fingerprint identification apparatus and an electronic device. The fingerprint identification apparatus is applicable to an electronic device having a display screen, and includes: a fingerprint sensor chip; and a substrate, where an upper surface of the substrate extends downward to form a first groove, and at least a portion of the fingerprint sensor chip is disposed in the first groove and electrically connected to the substrate. By disposing at least a portion of the fingerprint identification sensor in the first groove, not only could costs and complexity of the electronic device be reduced, but also a thickness of the fingerprint identification apparatus could be effectively reduced.
    Type: Grant
    Filed: November 23, 2019
    Date of Patent: July 13, 2021
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Kai Liu, Yiping Guo
  • Patent number: 11055457
    Abstract: Systems and methods are disclosed for pad ring generation for integrated circuits. For example, a method may include accessing a pad ring configuration data structure, wherein the pad ring configuration data structure declares rules for inputs and outputs of an integrated circuit using a scripting language; based on the pad ring configuration data structure, automatically generating an integrated circuit design data structure that encodes a physical design for the integrated circuit that includes a pad ring with bumps satisfying the rules for inputs and outputs of the integrated circuit and also includes a placeholder for additional logic circuits, wherein the placeholder includes connections to one or more input drivers of the pad ring and to one or more output drivers of the pad ring; and transmitting, storing, or displaying the integrated circuit design data structure.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: July 6, 2021
    Assignee: SiFive, Inc.
    Inventors: Han Chen, John Drummond
  • Patent number: 11043523
    Abstract: An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors and alignment marks; an overlaying oxide on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of first image sensors; and a third level overlaying the second level, where the third level includes a plurality of second image sensors, where the second level is aligned to the alignment marks, where the second level is bonded to the first level, and where the bonded includes an oxide to oxide bond.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: June 22, 2021
    Assignee: Monolithic 3D Inc.
    Inventors: Zvi Or-Bach, Deepak C. Sekar, Brian Cronquist
  • Patent number: 10997389
    Abstract: An electronic device includes a first substrate having a wiring trace, a second substrate having an external terminal, a first electronic component disposed on a first surface of the first substrate, a second electronic component electrically connected to the first electronic component and disposed on a second surface of the first substrate, a mold layer encapsulating the first electronic component, and a conductive member disposed in the mold layer. The conductive member electrically connects the first substrate to the second substrate. A step is formed at an end of the mold layer, and the conductive member is exposed at the step. A distance between the first substrate and the second substrate is smaller than a distance between the first surface of the first substrate and a surface of the first electronic component that is positioned opposite to the first substrate.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: May 4, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takashi Iwamoto, Takeshi Uchida
  • Patent number: 10978853
    Abstract: The present invention provides an optical scanning control device and a retina scanning projection device provided with a structure for suppressing heat transfer to a laser module, and a heat dissipation structure for dissipating the heat of the laser module. The optical scanning control device (10) is configured to emit, as image light, a laser light in accordance with an image signal. The optical scanning control device includes: a housing (11) made of metal; a laser module (125) configured to emit laser light, which abuts the top of the base (11a) of the housing, and is arranged on one side inside the housing; a power supply unit (16) arranged inside the housing on a side opposite that of the laser module; and an electronic circuit board (12) having heat source members (IC chips 14) configured to cause the laser module to emit image light, the electronic circuit board being arranged on a side opposite the base-side of the laser module.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: April 13, 2021
    Assignee: MITSUMI ELECTRIC CO., LTD.
    Inventor: Koichi Shimoyama
  • Patent number: 10957656
    Abstract: Disclosed herein are integrated circuit (IC) packages with an electronic component having a patterned protective material on a face, as well as related devices and methods. In some embodiments, a computing device may include: an integrated circuit (IC) package with an electronic component having a protective material on the back face of the electronic component, where the protective material is patterned to include an area on the back face of the electronic component that is not covered by the protective material; a circuit board, where the IC package is electrically coupled to the circuit board; and a heat spreader, where the heat spreader is secured to the circuit board and in thermal contact with the area on the back face of the electronic component that is not covered by the protective material.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: March 23, 2021
    Assignee: Intel Corporation
    Inventors: Kyle Yazzie, Naga Sivakumar Yagnamurthy, Pramod Malatkar, Chia-Pin Chiu, Mohit Mamodia, Mark J. Gallina, Rajesh Kumar Neerukatti, Joseph Bautista, Michael Gregory Drake
  • Patent number: 10959333
    Abstract: A semiconductor device includes a semiconductor element on an insulated circuit board, a housing having a side wall surrounding the circuit board, a lead terminal including a lead part and a terminal part extending orthogonal to the lead part, the terminal part having a base portion adjacent to the lead part and being embedded in the side wall, the remaining portion of the terminal part being exposed from the side wall and being connected to the semiconductor element via a wiring member, and a sealing resin provided in the housing. The side wall has an anchor part formed in an inner surface at a position within an area where the lead part is embedded and above the terminal part, the anchor part including concave portions that are each defined by a pair of opposed surfaces parallel to each other and orthogonal to the upper surface of the insulation plate.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: March 23, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Daisuke Inoue
  • Patent number: 10950563
    Abstract: A chip package for optical sensing includes a substrate, and a semiconductor device positioned on the substrate and coupled to the substrate through a first conducting element. Two molding processes are applied, to form a first colloid body on the substrate so as to cover the semiconductor device and, on the first colloid body, to form a second colloid body which covers an optical device. The optical device is electrically connected to the substrate through a second conducting element. The light transmittance of the second colloid body exceeds that of the first colloid body.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: March 16, 2021
    Assignee: SHUNSIN TECHNOLOGY (ZHONG SHAN) LIMITED
    Inventor: Wang-Lai Yang
  • Patent number: 10910421
    Abstract: Implementations of a molded image sensor chip scale package may include an image sensor having a first side and a second side. A first cavity wall and a second cavity wall may be coupled to the first side of the image sensor and extend therefrom. The first cavity wall and the second cavity wall may form a cavity over the image sensor. A transparent layer may be coupled to the first cavity wall and the second cavity wall. A redistribution layer (RDL) may be coupled to the second side of the image sensor. At least one interconnect may be directly coupled to the RDL. A mold material may encapsulate a portion of the RDL, a portion of the image sensor, and a side of each cavity wall, and a portion of the transparent layer.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: February 2, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Weng-Jin Wu
  • Patent number: 10892439
    Abstract: A display panel. The display panel may include a substrate having a display region and a non-display region; a cover plate; a sealant between the substrate and the cover plate; and a filler layer covered by the sealant to cause the sealant to have tight contact with the substrate and with the cover plate. The sealant may be in the non-display region for bonding the substrate and the cover plate.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: January 12, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Ning Ao, Qun Ma
  • Patent number: 10872838
    Abstract: Techniques are described to limit heat transfer from a first electronic component to a second electronic such as by having an aperture in a lid over the second electronic component to form a gap in the conductance of heat from the first electronic component to the second electronic component. A semiconductor electronic package includes a substrate, a first electronic component that is of a first type and that is mounted along a surface of the substrate, a second electronic component that is of a second type different than the first type and that is mounted along the surface of the substrate, and a metallic component that is positioned over the first electronic component and that has an aperture through which the second electronic component is exposed.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: December 22, 2020
    Assignee: Juniper Networks, Inc.
    Inventors: Alexander I. Yatskov, Gautam Ganguly
  • Patent number: 10854564
    Abstract: A semiconductor device includes a substrate includes a first layer and a second layer over the first layer, a bump disposed over the second layer, a molding disposed over the second layer and surrounding the bump, and a retainer disposed over the second layer, wherein the retainer is disposed between the molding and a periphery of the substrate. Further, a method of manufacturing a semiconductor device includes providing a substrate, disposing several bumps on the substrate, disposing a retainer on the substrate and surrounding the bumps, and disposing a molding between the bumps and the retainer.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: December 1, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tung-Liang Shao, Yu-Chia Lai, Hsien-Ming Tu, Chang-Pin Huang, Ching-Jung Yang
  • Patent number: 10836630
    Abstract: A MEMS package has a MEMS chip, and a package substrate which the MEMS chip is adhered. The MEMS chip has an element substrate which a movable element is formed. The MEMS package has a particle filter formed on the package substrate or the MEMS chip. The particle filter has a pierced-structure, which plural through holes are formed on a base surface by a regular arrangement. Further, in the particle filter, a plane-opening rate is set at least 45%, and a thickness-opening rate is set at least 50%.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: November 17, 2020
    Assignee: SAE Magnetics (H.K.) Ltd.
    Inventors: Masashi Shiraishi, Toyotaka Kobayashi, Hironobu Hayashi, Ichiro Yagi, Bing Ma
  • Patent number: 10804215
    Abstract: A semiconductor package comprising: a frame having an opening and including wiring layers and one or more layer of connection vias; a semiconductor chip disposed in the opening and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant covering the frame and the semiconductor chip and filling the opening; a connection structure disposed on the frame and the active surface of the semiconductor chip, and including one or more redistribution layers electrically connected to the connection pads and the wiring layers; one or more passive components disposed on the connection structure; a molding material covering each of the passive components; and a metal layer covering outer surfaces of each of the frame, the connection structure, and the molding material. The metal layer is connected to a ground pattern included in the wiring layers of the frame.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: October 13, 2020
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Hyun Lim, Sang Jong Lee, Chul Kyu Kim, Yoon Seok Seo
  • Patent number: 10789446
    Abstract: A device for fingerprint recognition, a manufacturing method therefor, and an electronic apparatus are provided. The method includes: forming fingerprint recognition units in multiple independent preset regions of a substrate, where the fingerprint recognition units each include a fingerprint recognition component and a light emitting component; partitioning the substrate along boundaries of the preset regions to separate the fingerprint recognition units from each other; and coupling the fingerprint recognition units after partition with corresponding control circuits, to make the fingerprint recognition component and the light emitting component of each fingerprint recognition unit be electrically connected to a corresponding control circuit coupled with the each fingerprint recognition unit. The fingerprint recognition unit and the control circuit coupled with each other serve together as the device for fingerprint recognition. The method is for manufacturing the device for fingerprint recognition.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: September 29, 2020
    Assignees: BEIJING BOE TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Ting Tian, Ming Zhai, Shuqian Dou, Xiaoliang Fu, Dayong Zhou, Zhiqiang Fan, Liguang Deng, Youcai Yang, Zhongjun Wang, Dong Zhang, Yongjie Han, Jinge Zhao, Jia Meng, Yanjun Liu, Yu Liu
  • Patent number: 10770492
    Abstract: Implementations of semiconductor packages may include: a die coupled to a glass lid; one or more inner walls having a first material coupled to the die; an outer wall having a second material coupled to the die; and a glass lid coupled to the die at the one or more inner walls and at the outer wall; wherein the outer wall may be located at the edge of the die and the glass lid and the one or more inner walls may be located within the perimeter of the outer wall at a predetermined distance from the perimeter of the outer wall; and wherein a modulus of the first material may be lower than a modulus of the second material.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: September 8, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Bingzhi Su, Derek Gochnour, Larry Kinsman
  • Patent number: 10756244
    Abstract: An LED package structure includes a ceramic substrate, a ceramic board, a light-emitting unit, a first adhesive layer, a second adhesive layer, and a cover. The ceramic board having a thru-hole is disposed on the ceramic substrate. The light-emitting unit is disposed on the ceramic substrate and is arranged in the thru-hole of the ceramic board. The first and second adhesive layers are disposed on the ceramic board, and the second adhesive layer covers the first adhesive layer. The cover is fixed on the ceramic board by the first and second adhesive layers. Thus, the shearing force of the LED package structure of the instant disclosure is increased by having the first and second adhesive layers, which are connected to each other.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: August 25, 2020
    Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATION
    Inventors: Kuo-Ming Chiu, Meng-Sung Chou, Hung-Jui Chen, Han-Hsing Peng
  • Patent number: 10749046
    Abstract: An encapsulating structure to protect an image sensor chip at all times during manufacture and use includes a printed circuit board, an image sensor chip, a protecting sheet, and a package portion. The image sensor chip is mounted on the printed circuit board and the protecting sheet is mounted on the image sensor chip. The package portion is entirely opaque and is formed on the printed circuit board, the package portion encloses side wall of the image sensor chip, the protecting sheet, and portion of surface of the protecting sheet away from the image sensor chip. A method for manufacturing same is also disclosed.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: August 18, 2020
    Assignee: TRIPLE WIN TECHNOLOGY(SHENZHEN) CO.LTD.
    Inventors: Chia-Wei Chen, Shin-Wen Chen
  • Patent number: 10727144
    Abstract: A light emitting apparatus according to an embodiment of the present technology includes a base portion, a light emitting element, and a cover portion. The base portion includes a support surface. The light emitting element is disposed on the support surface of the base portion. The cover portion includes a light transmission portion through which light emitted from the light emitting element is transmitted and a protrusion portion which is provided on at least a part of a periphery of the light transmission portion and protruded relative to the light transmission portion, the cover portion being provided on the support surface in such a manner as to cover the light emitting element.
    Type: Grant
    Filed: November 25, 2016
    Date of Patent: July 28, 2020
    Assignee: SNY CORPORATION
    Inventors: Masahiro Murayama, Yuji Furushima
  • Patent number: 10693040
    Abstract: A light emitting device includes a semiconductor layer, and a light emitting layer disposed in the semiconductor layer and having a composition ratio of Ga(1-x)InxN. x is greater than 0.14 but less than 0.16 to emit a green light from the light emitting layer, or greater than 0.22 but less than 0.26 to emit a blue light from the light emitting layer.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: June 23, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae Bae Kim, Sang Kyun Im, Hyun Kyung Kim, Young Hun Choi
  • Patent number: 10686292
    Abstract: A laser module has a base portion having a metal holding portion; a laser light source fixed to the base portion; an optical outputting portion deriving the laser light from a collimating optical system out of the base portion. The collimating optical system includes an input lens receiving the laser light from the laser light source; and an output lens receiving the laser light from the input lens and outputting the laser light to the optical outputting portion, each located in order from the laser light source. The input lens is a convex lens fixed in a first cylinder body made of metal and welded to the holding portion. The output lens is a convex lens having a focal point length longer than that of the input lens and held by the holding member glued to the base portion.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: June 16, 2020
    Assignee: STANLEY ELECTRIC CO., LTD.
    Inventors: Daisuke Nagatomo, Yoshio Okamoto, Takashi Nakai, Kenji Nagashima
  • Patent number: 10678006
    Abstract: An example method of manufacturing an optical interface. An optical socket may be provided that has an alignment feature that is to engage an optical connector, and first solder attachment pads. A printed circuit board may be provided that has an active optical device and second solder attachment pads. The optical socket may be connected to the printed circuit board by reflowing solder between the first and second solder attachment pads. The first and second solder attachment pads, the alignment feature, and the active optical device are positioned such that, while reflowing the solder, the solder automatically forces the optical socket into an aligned position.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: June 9, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Paul Kessler Rosenberg, Michael Renne Ty Tan, Kevin Leigh
  • Patent number: 10680139
    Abstract: An optical device package comprising a receptacle, an optical device received therein, and a window member disposed forward of the receptacle in a light emitting direction of the optical device. The window member is a member of synthetic quartz glass having front and back surfaces, at least one of the front and back surfaces being a rough surface.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: June 9, 2020
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Shuhei Ueda, Masaki Takeuchi, Harunobu Matsui
  • Patent number: 10660507
    Abstract: An imaging module includes an electrical cable; a solid-state imaging element having an imaging unit orthogonal to an axis direction of a tip of the electrical cable; and a flexible wiring substrate in which the solid-state imaging element and the electrical cables are electrically connected together. The flexible wiring substrate includes an element mounting portion mounting the solid-state imaging element, and two rear pieces that are bent at both end portions of the element mounting portion and extend in a direction away from the element mounting portion. An internal space of the flexible wiring substrate surrounded by the element mounting portion and the two rear pieces is filled with adhesive resin in which a glass-transition temperature is 135° C. or less.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: May 26, 2020
    Assignee: FUJIKURA LTD.
    Inventors: Takahiro Shimono, Hideo Shiratani, Kenichi Ishibashi
  • Patent number: 10643920
    Abstract: Techniques are described to limit heat transfer from a first electronic component to a second electronic such as by having an aperture in a lid over the second electronic component to form a gap in the conductance of heat from the first electronic component to the second electronic component. A semiconductor electronic package includes a substrate, a first electronic component that is of a first type and that is mounted along a surface of the substrate, a second electronic component that is of a second type different than the first type and that is mounted along the surface of the substrate, and a metallic component that is positioned over the first electronic component and that has an aperture through which the second electronic component is exposed.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: May 5, 2020
    Assignee: Juniper Networks, Inc.
    Inventors: Alexander I. Yatskov, Gautam Ganguly
  • Patent number: 10608406
    Abstract: A light emitting device includes: a base including: a main body, and a frame disposed on an upper surface of the main body; one or more laser elements disposed on the upper surface of the main body inward of the frame; a cover comprising: a support member that is fixed on an upper surface of the frame and has an opening inside the frame, and a light transmissive portion disposed so as to close the opening; and a lens body disposed above the light transmissive portion. The support member includes; a first portion fixed on the upper surface of the frame, a second portion on which the lens body is disposed, the second portion being positioned inward of and lower than the first portion, and a third portion on which the light transmissive portion is disposed, the third portion being disposed inward of and lower than the second portion.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: March 31, 2020
    Assignee: NICHIA CORPORATION
    Inventors: Takuya Hashimoto, Eiichiro Okahisa
  • Patent number: 10608125
    Abstract: Packaging techniques are described for fabricating an sensor package that include one or more sensor devices, such as optical sensors or light sources, where an active side of the sensor device is exposed. Additionally, the side of the sensor package including the sensor die is substantially flat (e.g., topology is less than about 75 ?m), the sensor package does not include wire bonding, and the package interconnect (e.g., solder bump array or other connection) is disposed on a side of the sensor package opposite the sensor die.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: March 31, 2020
    Assignee: MAXIM INTEGRATED PRODUCTS, INC.
    Inventor: Tiao Zhou
  • Patent number: 10580912
    Abstract: An arrangement including a carrier substrate, and a component situated on a cover surface of the carrier substrate in a hollow space, and electrical contacts for the component, wherein the hollow space is comprised of a plurality of spacer elements arranged on the cover surface of the carrier substrate and a cover substrate mounted on the plurality of spacer elements is provided. A semi-finished product comprising a carrier substrate made of silicon, wherein one or more recesses are formed on one side of the carrier substrate, and wherein the semi-finished product further comprises an alkaline evaporated glass applied to the side of the carrier substrate having the one or more recesses is also provided.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: March 3, 2020
    Assignee: MSG LITHOGLAS AG
    Inventors: Simon Maus, Ulli Hansen
  • Patent number: 10575374
    Abstract: An emitter for an LED-based lighting device can incorporate “flip-chip” LEDs, in which all electrical contacts are disposed on the bottom surface of the chip. The emitter base can be a multilayer high-temperature cofired ceramic (HTCC) substrate, with metal traces formed between the layers and vias through the layers to join traces in different layers, thereby providing electrical connectivity to each LED. The paths can be arranged such that current can be supplied independently to different subsets of the LEDs. The top layer of the emitter base is fabricated with exposed vias at the top surface. Metal pads are then printed onto the exposed vias on the top surface, and flip-chip LEDs are bonded to the metal pads, e.g., using solder.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: February 25, 2020
    Assignee: LedEngin, Inc.
    Inventor: Xiantao Yan
  • Patent number: 10565427
    Abstract: A fingerprint sensor package includes a substrate, a fingerprint sensor chip, and a flexible printed circuit board (FPC). The substrate includes a first portion and a second portion. A line layer is disposed on the first portion. The fingerprint sensor chip is disposed on the substrate. The fingerprint sensor chip is electrically connected to the FPC by the line layer. The package is simple, reliable, and easy for manufacturing process, reducing materials and processing costs.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: February 18, 2020
    Assignee: SHUNSIN TECHNOLOGY (ZHONG SHAN) LIMITED
    Inventor: Jun Yang
  • Patent number: 10558779
    Abstract: A method of redistribution layer routing for 2.5D integrated circuit packages is proposed, which is executed by a computer, the method comprising using the computer to perform the following: performing a MMSIM (modulus-based matrix splitting iteration method) based routing to assign pre-assignment nets to tracks such that total vertical distance from each bump pair to the assigned track is minimized; and performing a MWMCBM (minimum weighted maximum cardinality bipartite matching) based routing for bumps connected to the assigned tracks according to matching result to complete redistribution layer routing for integrated circuit packages.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: February 11, 2020
    Assignee: AnaGlobe Technology, Inc.
    Inventors: Chun-Han Chiang, Fu-Yu Chuang, Yao-Wen Chang, Chih-Che Lin, Chun-Yi Yang
  • Patent number: 10539280
    Abstract: It is an object of the present invention to provide a small and simply-structured light-source device. A light-source device according to the present invention includes a laser light source section, a stem on which the laser light source section is mounted, a cap with an opening, the cap being bonded to the stem in such a manner that the cap covers the laser light source section, a lens holder joined to an outer surface of the cap in such a manner that the lens holder extends over the opening, and a collimating lens supported by the lens holder, the collimating lens collimating a light ray emitted from the laser light source section and then passing through the opening.
    Type: Grant
    Filed: January 26, 2016
    Date of Patent: January 21, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Seiji Nakano
  • Patent number: 10535617
    Abstract: A method and circuit for implementing transient electronic circuits for security applications, and a design structure on which the subject circuit resides are provided. Silver nanowire traces are fabricated forming a protection circuit in a soluble material. A frangible material is provided separating the soluble material from a solvent layer proximately located. During a tampering event the frangible material is ruptured releasing the solvent which contacts and dissolves the soluble material and disperses the silver nanowire traces creating an electrical open in the protection circuit. The electrical open enables enhanced tampering detection.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: January 14, 2020
    Assignee: International Business Machines Corporation
    Inventors: Eric J. Campbell, Sarah Czaplewski-Campbell, Timothy Tofil, Joseph Kuczynski
  • Patent number: 10519032
    Abstract: A method embodiment includes providing a MEMS wafer. A portion of the MEMS wafer is patterned to provide a first membrane for a microphone device and a second membrane for a pressure sensor device. A carrier wafer is bonded to the MEMS wafer. The carrier wafer is etched to expose the first membrane and a first surface of the second membrane to an ambient environment. A MEMS structure is formed in the MEMS wafer. A cap wafer is bonded to a side of the MEMS wafer opposing the carrier wafer to form a first sealed cavity including the MEMS structure and a second sealed cavity including a second surface of the second membrane for the pressure sensor device. The cap wafer comprises an interconnect structure. A through-via electrically connected to the interconnect structure is formed in the cap wafer.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: December 31, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • Patent number: 10490487
    Abstract: An electronic device structure includes a leadframe with a die pad and a lead. A semiconductor die is mounted adjacent to the die pad. A clip having a clip tail section is attached to the lead. The clip further has a clip top section attached to the clip tail section, and the clip top section is attached to a die top side of the semiconductor die with a conductive material. The clip further has an opening disposed to extend through the clip top section. In one embodiment, after a reflow step the conductive material forms a conductive fillet at least partially covering sidewall surfaces of the opening, and has a height within the opening with respect to a bottom surface of the clip top section. The opening and the conductive fillet provide an improved approach to monitoring coverage of the conductive material between the clip top section and the die top side of the semiconductor die.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: November 26, 2019
    Assignee: Amkor Technology, Inc.
    Inventor: Marc Alan Mangrum
  • Patent number: 10485404
    Abstract: An image sensor module includes a circuit board, image sensor, electronic component assembly, and cable assembly. The circuit board includes a center section located between two end sections. The end sections each extend away from the center section and define an interior area there between. The image sensor is secured to an outer face of the circuit board in the center section with sensor contact fingers being connected at the circuit board outer face in one or both end sections. The electronic component arrangement is mounted on an inner face of the circuit board in the center section. A number of wires of the cable assembly extend through an end gap between the circuit board end sections and are connected to the inner face of the circuit board so as to overlap with the sensor contact fingers along a module longitudinal axis.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: November 26, 2019
    Assignee: KARL STORZ Endovision, Inc.
    Inventors: Dashiell Birnkrant, Gerard Vadenais, Jordan He, Jason Curtis
  • Patent number: 10477084
    Abstract: A manufacturing method for a camera module including a multilayer body in which an image sensor IC and a lens are arranged with an optical path provided in the multilayer body being disposed therebetween includes a first step and a second step. In the first step, the multilayer body is formed by stacking and combining flexible sheets. In the second step, a through hole is formed in flexible base material layers that constitute a portion of the multilayer body to form the optical path defined by the through hole.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: November 12, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Nobuo Ikemoto, Atsushi Kumano, Jerry Hsieh, Jun Sasaki
  • Patent number: 10468565
    Abstract: LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with planar surfaces that refract and/or reflect light within the package encapsulant. The LED package are also directed to features or arrangements that allow for improved or tailored emission characteristic for LED packages according to the present invention. Some of these features or arrangements include, but are not limited to, higher ratio of light source size to submount size, the used of particular materials (e.g. different silicones) for the LED package layers, improved arrangement of a reflective layer, improved composition and arrangement of the phosphor layer, tailoring the shape of the encapsulant, and/or improving the bonds between the layers. There are only some of the improvements disclosed herein, with some of these resulting in LED packages the emit light with a higher luminous intensity over conventional LED packages.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: November 5, 2019
    Assignee: CREE, INC.
    Inventors: Arthur Pun, Jeremy Nevins, Jesse Reiherzer, Joseph Clark
  • Patent number: 10467450
    Abstract: A fan-out sensor package includes: a core member including a wiring layer including a plurality of layers and having a through-hole; an integrated circuit (IC) for a sensor disposed in the through-hole; an encapsulant encapsulating at least portions of the core member and the IC for a sensor; and a connection member disposed on the core member and the IC for a sensor and including a plurality of circuit layers, wherein the circuit layer includes sensing patterns detecting a change in capacitance.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: November 5, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ju Ho Kim, Eun Sil Kim, Sang Kyu Lee, Jong Man Kim, Seok Hwan Kim
  • Patent number: 10461239
    Abstract: A microscale sensor structure is provided that enables backside electrical connection to flush-mounted microscale sensors without through-wafer-vias (TWVs). A flush-mounted microscale sensor can be fabricated without TWVs by providing a sensor support substrate with openings for electrical connection access to the backside of a device layer. Backside electrical connection is made to the sensing element(s) of the device layer through the openings in the support substrate. Electrical isolation of the sensing element(s) from the support substrate is accomplished through use of an insulating support substrate and/or an insulating layer between the support substrate and the device layer.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: October 29, 2019
    Assignee: INTERDISCIPLINARY CONSULTING CORP.
    Inventor: David Alan Mills
  • Patent number: 10451490
    Abstract: Provided is a sensor package that measures an internal temperature of a measurement object. A sensor package includes: a package including a bottomed tubular casing and plural leads substantially parallel to each other, each of the leads piercing the bottomed tubular casing; and a MEMS chip including at least one thermopile that measures a temperature difference in an identical direction. The MEMS chip is disposed in an inner bottom surface of the bottomed tubular casing of the package in a posture in which a measurement direction of the temperature difference measured with the thermopile is substantially orthogonal to a longitudinal direction of each lead.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: October 22, 2019
    Assignee: OMRON Corporation
    Inventors: Shinya Nakagawa, Masao Shimizu
  • Patent number: 10451863
    Abstract: Apparatuses and methods for an interposer for integration of multiple image sensors are disclosed herein. An example apparatus includes an interposer including laterally spaced first and second windows, and first and second image sensors disposed on the interposer over the first and second windows, respectively. The interposer including conductive conduits formed in or on to provide electrically conductive paths there through with the first and second image sensors coupled to the conductive conduits. The first and second image sensors laterally spaced by a gap, and an active area of the first and second image sensors to receive incident light through the respective first and second windows, where a perspective of the first image is different than a perspective of the second image sensor based at least in part on the gap.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: October 22, 2019
    Assignee: Verily Life Sciences LLC
    Inventors: Sam Kavusi, Brian M. Pepin
  • Patent number: 10424702
    Abstract: LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with curved and planar surfaces. The packages can comprise a submount with a one or a plurality of LEDs, and in those with a plurality of LEDs each of the LEDs can emit the same or different wavelengths of light than the others. A blanket conversion material layer can be included on at least some of the LEDs and the submount. The encapsulant can be on the submount, over at least some of the LEDs, with each of the planar surfaces being vertical and aligned with one of the edges of the submount. The packages can also comprise reflective layers to minimize losses due to light absorption, which in turn can increase the overall package emission efficiency.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: September 24, 2019
    Assignee: CREE, INC.
    Inventors: Jesse Reiherzer, Jeremy Nevins, Michael John Bergmann, Joseph Gates Clark
  • Patent number: 10389925
    Abstract: Provided are a camera module and a mobile terminal having the same. The camera module includes a first lens assembly, a second lens assembly disposed to be adjacent to the first lens assembly, a lens cover accommodating the first and second lens assemblies and having first and second through holes allowing light to be incident to the first and second lens assemblies, an actuator provided on one side of the first and second lens assemblies to drive the first and second lens assemblies, one image sensor disposed below the first and second lens assemblies and converting light signals incident through the first and second lens assemblies into first and second image signals, and a camera case having a through hole formed on a front side thereof and accommodating the lens cover to allow light to be incident to the first and second lens assemblies through the through hole.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: August 20, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Jongpil Kim, Byunghwa Lee
  • Patent number: 10381334
    Abstract: A semiconductor package includes a package substrate having an upper surface and a lower surface and including a plurality of substrate pads formed on the upper surface, a capacitor structure arranged on the upper surface of the package substrate and including a semiconductor substrate and at least one decoupling capacitor formed in the upper surface of the semiconductor substrate, a plurality of first semiconductor chips mounted on the package and supported by the capacitor structure, first conductive connection members electrically connecting chip pads of the first semiconductor chips to the substrate pads, and second conductive connection members electrically connecting capacitor pads of the decoupling capacitor to the substrate pad.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: August 13, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hee-Won Kang, Jong-Joo Lee
  • Patent number: 10347550
    Abstract: The present disclosure provides a semiconductor device and a method of making the same for suppressing warpages of an article due to a difference of temperature strains during the process of making the semiconductor device. The semiconductor device of the present disclosure includes a substrate having a main surface and a recess recessed therefrom; a semiconductor element disposed in the recess; a wiring portion connected to the substrate and electrically connected to the semiconductor element; and a sealing resin filled in the recess. The substrate includes an electrical insulative synthetic resin. The recess has a bottom surface and a connecting surface connected to the bottom surface and the main surface. The connecting surface includes a first inclined surface connected to the bottom surface; a second inclined surface connected to the main surface; and an intermediate surface connected to the first inclined surface and the second inclined surface.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: July 9, 2019
    Assignee: ROHM CO., LTD.
    Inventor: Isamu Nishimura