Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a package paddle; forming a lead adjacent the package paddle, the lead having a hole in a lead body top side and a lead ridge protruding from a lead non-horizontal side; mounting an integrated circuit over the package paddle; connecting an electrical connector to the lead and the integrated circuit; and forming a fill layer within the hole.

Abstract: An interconnect structure includes an insulative web having a first surface and a second surface; a logic device secured to the second surface of the insulative web; a frame panel assembly including a frame base having a first surface and a second surface, a first frame insulative layer disposed between the frame base first surface and the insulative web second surface, an aperture extending through the frame base and first frame insulative layer, wherein at least a portion of the logic device is disposed within the aperture, and a first frame connector disposed between a first electrically conductive layer located on the frame base first surface, and a second electrically conductive layer located on a surface of the first frame insulative layer; a device connector disposed between an I/O contact on a surface of the logic device and a third electrical conductor located on a surface of the insulative web; and an insulative layer connector that is disposed between the third electrical conductor located on a sur

Abstract: An LED package is provided. The LED package includes a carrier, an LED chip, a conductive structure, a first encapsulant, a lens and a heat sink. The carrier is cup shaped and comprises a bottom portion and a lateral wall. The LED chip is received in the carrier and disposed on the bottom portion. The conductive structure is electrically connected to the LED chip. The first encapsulant is received in the carrier and fixing the carrier and the conductive structure. The lens is corresponding to the LED chip. The carrier is embedded in the heat sink, and heat generated by the LED chip is transmitted to the heat sink via the bottom portion and the lateral wall of the carrier.

Abstract: An environment-resistant module which provides both thermal and vibration isolation for a packaged micromachined or MEMS device is disclosed. A microplatform and a support structure for the microplatform provide the thermal and vibration isolation. The package is both hermetic and vacuum compatible and provides vertical feedthroughs for signal transfer. A micromachined or MEMS device transfer method is also disclosed that can handle a wide variety of individual micromachined or MEMS dies or wafers, in either a hybrid or integrated fashion. The module simultaneously provides both thermal and vibration isolation for the MEMS device using the microplatform and the support structure which may be fabricated from a thin glass wafer that is patterned to create crab-leg shaped suspension tethers or beams.

Abstract: A integrated camera module (10, 10a) for capturing video images in very small digital cameras, cell phones, personal digital assistants, and the like. A lens assembly (24, 24a) is rigidly affixed in relation to a sensor array area (14) of a camera chip (12) by a molding (26). The molding (26) is formed on the camera chip (12), and optionally on a printed circuit board (16, 16a) on which the camera chip (12) is mounted. The lens assembly (24, 24a) is held in place in a recess (29) of the molding (26) by an adhesive (28). The molding (26) is formed such that a precise gap (30) exists between the lens assembly (24) and a sensor array area (14) of the camera chip (12).

Abstract: A board-level package includes a printed circuit board, a semiconductor die package mounted on the printed circuit board, a tuned mass structure, and a support structure mounted to the printed circuit board and supporting the tuned mass structure.

Abstract: Exemplary semiconductor device packaging structure and packaging method are provided. The packaging method uses an adhesive layer to bond multiple wafer pieces onto a first surface of a carrier substrate, each adjacent two of the wafer pieces having a gap formed therebetween for exposing a part of the adhesive layer. A packaging layer is filled in each of the gaps. At least one through silicon via is formed each of the wafer pieces to expose a bonding pad formed on an active surface of the wafer pieces. Redistribution circuit layers are formed on back surfaces of the respective wafer pieces and filled into the through silicon vias for electrical connection with the bonding pads. A sawing process is performed to saw starting from each of the packaging layers to a second surface of the carrier substrate, and thereby multiple semiconductor device packaging structures are obtained.

Abstract: A sealed body in which sealing is uniformly performed is provided. A light-emitting module in which sealing is uniformly performed is provided. A method of manufacturing the sealed body in which sealing is uniformly performed is provided. The sealed body comprises a first substrate alternately provided with a high-reflectivity region with respect to the energy ray and a low-reflectivity region with respect to the energy ray so as to overlap with a sealant surrounding a sealed object, and a second substrate capable of transmitting the energy ray. The sealed object is sealed between the first substrate and the second substrate by heating the sealant with irradiation with the energy ray through the second substrate.

Abstract: An electro-optic apparatus has an electro-optic panel, driver semiconductor chips bonded onto the terminal portion of the electro-optic panel, and two protection films either or both of which are transparent, wherein the electro-optic panel is sealed by being sandwiched between the two protection films, and one protection film that covers the terminal portion has openings for exposing the driver semiconductor chips.

Abstract: A method for producing an optoelectronic device includes providing a carrier, applying at least one first metal layer on the carrier, providing at least one optical component, applying at least one second metal layer on the at least one optical component, and mechanically connecting the carrier to the at least one optical component by the at least one first and the at least one second metal layer, wherein the connecting includes friction welding or is friction welding.

Abstract: A light emitting device includes a resin molded body having a circular or an oval recessed section at the center suppresses generation of cracks. The device is provided with a light emitting element, a first resin molded body having a plurality of outer surfaces, and a recessed section at the center. First and second leads are electrically connected to the light emitting element, and a second resin molded body is applied in the recessed section. The light emitting element is placed on the first lead, and the surface of the second resin molded resin forms a light emitting surface. A gate notch is formed on an extended line of a normal line on one point on a circular cross-section of the recessed section in the normal line direction.

Abstract: A carrier for holding a plurality of chip packages and a carrier assembly are provided, wherein the chip package has a central area without solder balls and a peripheral area with solder balls formed thereon. The carrier includes a tray component and a plurality of supports disposed on the tray component, wherein each support holds the central area of a respective chip package. The carrier assembly is formed by stacking a plurality of the carriers through a plurality of peripheral projections disposed at a periphery of each tray component, wherein each peripheral projection has a pin formed thereon and a hole formed thereunder.

Abstract: A light emitting device package is provided. The light emitting device package comprises a package body comprising a first cavity, and a second cavity connected to the first cavity; a first lead electrode, at least a portion of which is disposed within the second cavity; a second lead electrode, at least a portion of which is disposed within the first cavity; a light emitting device disposed within the second cavity; a first wire disposed within the second cavity, the first wire electrically connecting the light emitting device to the first lead electrode; and a second wire electrically connecting the light emitting device to the second lead electrode.

Abstract: An unattached, contained semiconductor device includes a semiconductor die, for example a MEMS pressure sensor die. The semiconductor die is unattached from the interior cavity of a surrounding containment body in that the semiconductor die is free of adherence to the containment body to mitigate packaging stress and strain between the containment body and the semiconductor die.

Abstract: Packaging assemblies for optically interactive devices and methods of forming the packaging assemblies in an efficient manner that eliminates or reduces the occurrence of process contaminants. In a first embodiment, a transparent cover is attached to a wafer of semiconductor material containing a plurality of optically interactive devices. The wafer is singulated, and the optically interactive devices are mounted on an interposer and electrically connected with wire bonds. In a second embodiment, the optically interactive devices are electrically connected to the interposer with back side conductive elements. In a third embodiment, the optically interactive devices are mounted to the interposer prior to attaching a transparent cover. A layer of encapsulant material is formed over the interposer, and the interposer and encapsulant material are cut to provide individual packaging assemblies. In a fourth embodiment, the optically interactive devices are mounted in a preformed leadless chip carrier.

Abstract: A semiconductor component includes a semiconductor element that has a plurality of signals, a wiring board that is disposed below the semiconductor element and that draws the plurality of signals of the semiconductor element, a heat conduction member that dissipates heat generated by the semiconductor element, a joining member that is disposed between the semiconductor element and the heat conduction member and that joins the heat conduction member to the semiconductor element, a support member formed with an opening so as to surround the semiconductor element that supports the heat conduction member, a first adhesive member that is disposed between the support member and the wiring board to bond the support member with the wiring board and a second adhesive member that is disposed between the support member and the heat conduction member to bond the support member with the heat conduction member.

Abstract: An image pickup device is disclosed that has little deformation caused by thermal expansion of a transparent resin for sealing an image pickup element. The image pickup device includes an image pickup element having a light receiving surface, a micro-lens for condensing incident light to the image pickup element, a first transparent plate disposed on the light receiving surface of the image pickup element with the micro-lens in between, a transparent resin that seals the image pickup element and the first transparent plate, and a second transparent plate disposed on the transparent resin to face the first transparent plate.

Abstract: An electronic device, including a substrate, a functional structure constituting a functional element formed on the substrate, and a cover structure forming a cavity portion in which the functional structure is disposed, is disclosed. In the electronic device, the cover structure includes a laminated structure of an interlayer insulating film and a wiring layer, the laminated structure being formed on the substrate in such a way that it surrounds the cavity portion, and the cover structure has an upside cover portion covering the cavity portion from above, the upside cover portion being formed with part of the wiring layer that is disposed above the functional structure.

Abstract: A semiconductor memory device includes: a wiring board including an element mounting portion and connection pads; a first element group including a plurality of semiconductor elements each having electrode pads arranged along one of outer sides of the semiconductor element, the plurality of semiconductor elements being layered stepwise on the element mounting portion of the wiring board in a way that pad arrangement sides of the semiconductor elements face in the same direction, and that the electrode pads are exposed; a second element group including a plurality of semiconductor elements each having electrode pads arranged along one of outer sides of the semiconductor element, the plurality of semiconductor elements being layered stepwise on the first element group in a way that pad arrangement sides of the semiconductor elements face in the same direction as that of the first element group, and that the electrode pads are exposed, the second element group being disposed to be offset from the first element g

Abstract: An electronic apparatus includes an electronic component electrically connected to a substrate positioned beneath the electronic component. A member includes a plurality of decoupling capacitors having different voltages, and the decoupling capacitors are electrically connected to the electronic component. A plurality of voltage planes in the member are electrically connected to the decoupling capacitors. The decoupling capacitors, via the voltage planes in the member, provide different voltages to the voltage planes and thus the electronic component.

Abstract: A light emitting device package is provided. The light emitting device package comprises a package body comprising a first cavity, and a second cavity connected to the first cavity; a first lead electrode, at least a portion of which is disposed within the second cavity; a second lead electrode, at least a portion of which is disposed within the first cavity; a light emitting device disposed within the second cavity; a first wire disposed within the second cavity, the first wire electrically connecting the light emitting device to the first lead electrode; and a second wire electrically connecting the light emitting device to the second lead electrode.

Abstract: An IC includes a substrate having a semiconductor top surface, a plurality of metal interconnect levels having inter-level dielectric (ILD) layers therebetween on the top surface, and a bottom surface. A plurality of through substrate vias (TSVs) extend from a TSV terminating metal interconnect level downward to the bottom surface. The plurality of TSVs include an electrically conductive filler material surrounded by a dielectric liner that define a projected volume. The projected volume includes a projected area over the electrically conductive filler material and a projected height extending upwards from the TSV terminating metal interconnect level to a metal interconnect level above, and a projected sidewall surface along sidewalls of the projected volume. A crack suppression structure (CSS) protects TSVs and includes a lateral CSS portion that is positioned lateral to the projected volume and encloses at least 80% of the projected sidewall surface.

Abstract: A method of manufacturing a semiconductor package involves providing a substrate having a window. The substrate may include a leadframe having half-etched leads. First and second semiconductor devices are mounted to a top surface of the substrate on either side of the window using an adhesive. A third semiconductor device is mounted to the first and second semiconductor devices using an adhesive. The third semiconductor device is disposed over the window of the substrate. A wirebond or other electrical interconnect is formed between the third semiconductor device and a contact pad formed over a bottom surface of the substrate opposite the top surface of the substrate. The wirebond or other electrical interconnect passes through the window of the substrate. An encapsulant is deposited over the first, second, and third semiconductor devices.

Abstract: A multi-wavelength semiconductor laser device includes a block having a rectangular groove with a bottom face and two side faces extending in a predetermined direction; and laser diodes with different light emission wavelengths mounted on the bottom face and the side faces of the groove in the block so that their laser beams are emitted in the predetermined direction.

Abstract: A package enclosing at least one microelectronic element (60) such as a sensor die and having electrically conductive connection pads (31) for electric connection of the package to another device is manufactured by providing a sacrificial carrier; applying an electrically conductive pattern (30) to one side of the carrier; bending the carrier in order to create a shape of the carrier in which the carrier has an elevated portion and recessed portions; forming a body member (45) on the carrier at the side where the electrically conductive pattern (30) is present; removing the sacrificial carrier; and placing a microelectronic element (60) in a recess (47) which has been created in the body member (45) at the position where the elevated portion of the carrier has been, and connecting the microelectronic element (60) to the electrically conductive pattern (30). Furthermore, a hole (41) is arranged in the package for providing access to a sensitive surface of the microelectronic element (60).

Abstract: A first multilayer wiring structure has a first surface and a second surface positioned on an opposite side to the first surface, a first wiring pattern formed on the second surface side and a housing portion penetrating through the first multilayer wiring structure from the first surface to the second surface. An electronic component has an electrode pad. The electronic component is accommodated in the housing portion in a state that an electrode pad formation surface at the side where the electrode pad is formed is positioned on the second surface side of the first multilayer wiring structure. A second multilayer wiring structure has an insulating layer and a second wiring pattern which are stacked on the second surface of the first multilayer wiring structure and the electrode pad formation surface of the electronic component. The second wiring pattern is electrically connected to the first wiring pattern and the electrode pad.

Abstract: An imaging apparatus includes an observation optical system, a solid state imaging element photoelectrically converting an image from the observation optical system, a flexible board electrically connected to the solid state imaging element, a plurality of electronic components and a plurality of signal cables electrically connected to the flexible board, and a first resin sealing the electronic components and a second resin sealing a connection part of the signal cables. A thixotropic ratio of the first resin is set to be lower than a thixotropic ratio of the second resin. Accordingly, apparatus and an endoscope, which can be made compact, and have high physical and electrical reliability without increasing a size of the imaging apparatus, are provided.

Abstract: An optoelectronic (OE) package or system and method for fabrication is disclosed which includes a silicon layer with wiring. The silicon layer has an optical via for allowing light to pass therethrough. An optical coupling layer is bonded to the silicon layer, and the optical coupling layer includes a plurality of microlenses for focusing and or collimating the light through the optical via. A plurality of OE elements are coupled to the silicon layer and electrically communicating with the wiring. At least one of the OE elements positioned in optical alignment with the optical via for receiving the light. A carrier is interposed between electrical interconnect elements. The carrier is positioned between the wiring of the silicon layer and a circuit board and the carrier is electrically connecting first interconnect elements connected to the wiring of the silicon layer and second interconnect elements connected to the circuit board.

Abstract: A method for producing a capping wafer for a sensor having at least one cap includes: production of a contacting via extending through the wafer, and, temporally subsequent thereto, filling of the contacting via with an electrically conductive material.

Abstract: A method for forming wavelength-conversion LED encapsulant structure includes forming an LED encapsulant structure body, forming a layer of a wavelength-conversion material on a first surface, disposing the first surface to cause the wavelength-conversion material to be in contact with a surface region of the LED encapsulant structure body, applying a pressure between the first surface and the surface region of the LED encapsulant structure body, and causing at least a portion of the wavelength-conversion material to be at least partially embedded in the surface region of the LED encapsulant structure body.

Abstract: A semiconductor device has a semiconductor die attached to a second side of a heat spreader plate. The second side of the heat spreader plate is attached to a first side of a substrate with thermal balls. The substrate includes a window within which the semiconductor die is arranged and there is a gap between an edge of the die and an edge of the window. The die is electrically connected to a second side of the substrate such as with wires. The die, electrical connections to the substrate, and thermal balls are then encapsulated with a mold compound. Connection bumps may be attached to the second side of the substrate for device I/Os. Heat generated by the die during operation dissipates along the thermal path from the backside of the semiconductor die through the heat spreader plate.

Abstract: A semiconductor device is described advantageously making use of the interposer principle. The semiconductor device comprises at least one semiconductor die, a window substrate being an inorganic substrate comprising at least one window-shaped cavity for mounting the at least one semiconductor die, the window substrate having interconnect structures. Furthermore, the at least one semiconductor die is positioned inside the at least one cavity and is connected to the interconnect structures, providing connections to another level of assembly or packaging of the semiconductor device. The invention also relates to a method of manufacturing such a semiconductor device.

Abstract: A semiconductor device with a sheet-like insulating substrate (101) integral with two or more patterned layers of conductive lines and vias, a chip attached to an assembly site, and contact pads (103) in pad locations has an encapsulated region on the top surface of the substrate, extending to the edge of the substrate, enclosing the chip, and having contact apertures (703) at the pad locations for external communication with the pad metal surfaces. The apertures may have not-smooth sidewall surfaces and may be filled with solder material (704) to contact the pads. Metal-filled surface grooves (710) in the encapsulated region, with smooth groove bottom and sidewalls, are selected to serve as customized routing interconnections, or redistribution lines, between selected apertures and thus to facilitate the coupling with another semiconductor device to form a package-on-package assembly.

Abstract: A packaging device of an image sensor includes a supporting seat and the image sensor. The supporting seat is a hollow frame having a predetermined thickness, a first surface, a second surface, and an inner edge receding from the second surface toward the first surface to form a recessed step. Plural contacts in the recessed step and in the outer periphery of the supporting seat are electrically connected by plural electrical connection structures. The image sensor has an active surface set on the recessed step by a flip-chip packaging technique. The image sensor also has plural conductive ends electrically connected to the contacts in the recessed step. An insulating material covers an inactive surface of the image sensor and fills the gap between the recessed step of the supporting seat and the image sensor to provide dust-proofness, shock resistance, and prevention against static electricity and leakage of light.

Abstract: A wiring substrate for a semiconductor chip includes a substrate, first and second wiring layers and a plurality of first and second bonding pads. The substrate has a first surface and a second surface opposite to the first surface, a window extending from the first surface to the second surface to expose chip pads of a semiconductor chip adherable to the first surface. The first and second wiring layers of a multi-layered structure are sequentially formed on the second surface of the substrate with at least one insulation layer interposed between the first and second wiring layers. A plurality of the first and second bonding pads are respectively connected to the first and second wiring layers, the first and second bonding pads having a concavo-convex arrangement on the second surface of the substrate along a side of the window.

Abstract: A package body (1) with an upper side (2), with an underside (22), opposite from the upper side (2), and with a side surface, which connects the upper side (2) and the underside (22) and is provided as a mounting surface (19), the package body (1) having a plurality of layers (8) which contain a ceramic material, and a main direction of extent of the layers (23, 24, 25) extending transversely in relation to the mounting surface (19). Furthermore, a method for producing a package body (1) is provided.

Abstract: A system for hermetically sealing devices includes a substrate, which includes a plurality of individual chips. Each of the chips includes a plurality of devices and each of the chips are arranged in a spatial manner as a first array. The system also includes a transparent member of a predetermined thickness, which includes a plurality of recessed regions arranged in a spatial manner as a second array and each of the recessed regions are bordered by a standoff region. The substrate and the transparent member are aligned in a manner to couple each of the plurality of recessed regions to a respective one of said plurality of chips. Each of the chips within one of the respective recessed regions is hermetically sealed by contacting the standoff region of the transparent member to the plurality of first street regions and second street regions using at least a bonding process to isolate each of the chips within one of the recessed regions.

Abstract: Several embodiments of microelectronic packages with enhanced heat dissipation and associated methods of manufacturing are disclosed herein. In one embodiment, a microelectronic package includes a semiconductor die having a first side and a second side opposite the first side and a lead frame proximate the semiconductor die. The lead frame has a lead finger electrically coupled to the first side of the semiconductor die. The microelectronic package also includes an encapsulant at least partially encapsulating the semiconductor die and the lead frame. The encapsulant does not cover at least a portion of the second side of the semiconductor die.

Abstract: A camera module package is disclosed. The camera module package is capable of preventing defects caused by foreign bodies and enhancing product reliability by reducing the time consumed in a packaging process for manufacturing a camera module, and of reducing the size of a package and manufacturing costs by excluding the use of gold wires.

Abstract: Submounts for mounting optical devices which have an excellent heat radiating property and can be formed in a wafer state in batch are provided. A metallized electrode including optical device mounting parts and wiring parts is formed on a surface of a first substrate containing an insulating material as a main component, a through hole is formed in a glass substrate serving as a second substrate, the optical device mounting parts of the first substrate are aligned to be located inside the through hole of the second substrate, and the first substrate and the second substrate are joined together by use of a method such as anodic bonding.

Abstract: An optical module. The optical module includes an opto-chip. The opto-chip includes an integrated circuit with optical windows and a plurality of optoelectronic devices positioned in alignment with the optical windows. The plurality of optoelectronic devices are flip chip attached to the integrated circuit.

Abstract: A sensor package, and in one embodiment a sensor package for surface mount applications, that comprises a leadframe with an upper and lower surface for receiving a device thereon. Embodiments of the sensor package comprise a first device secured to the upper surface, and a second device secured to the lower surface so as to place connective pads from each of the first device and the second device proximate to one side of the leadframe. The sensor package further comprises a lead that is positioned in the sensor package in a manner that prevents electrical connection with circuitry that is external of the housing. The lead has an end proximate the side of the lead frame where the connective pads are positioned on the upper and lower surfaces. The end configured to receive connections, e.g., wirebonds, from the connective pads in a manner connecting the first device and the second device independent of any external connections of the sensor package.

Abstract: An electronic part (100) that shields parts on a substrate (101) includes a plurality of chip parts (102) each having on a respective end portion a ground terminal (103A) and an electrode terminal (103B) that supplies a voltage source, and located at regular intervals on the substrate with the respective ground terminals aligned, the ground terminal and the electrode terminal being electrically connected to a ground terminal land (107A) and an electrode terminal land (107B) of the substrate respectively; and a shielding case (104) that shields the plurality of chip parts and includes an opening (105) through which a resin is to be provided for securing strength of the respective electrical connection points of the ground terminal land and the electrode terminal land of the substrate with the ground terminal and the electrode terminal of the chip parts; the opening being formed such that an edge (106) of the opening becomes parallel to the ground terminal of the respective chip parts, and such that upon being

Abstract: LED phosphor deposition for use with LEDs. In an aspect, a method is provided for forming an encapsulation. The method includes determining a geometric shape for the encapsulation, selecting a dam material, applying the dam material to a substrate to form a boundary defining a region having the geometric shape, and filling the region with encapsulation material to form the encapsulation. In another aspect, an LED apparatus is provided that includes at least one LED chip and an encapsulation disposed on the at least one LED chip. The encapsulation is formed by determining a geometric shape for the encapsulation, selecting a dam material, applying the dam material to a substrate to form a boundary defining a region having the geometric shape, and filling the region with encapsulation material to form the encapsulation.

Abstract: A module substrate has an interconnection electrode that is exposed at a side end face thereof. A semiconductor component including an IC chip is mounted on the module substrate. A molded part comprising a resin is formed so as to cover at least a part of the semiconductor component. A coating with higher heat conductivity than the molded part is formed on the surface of the molded part by applying a paste made of material with higher heat conductivity than the molded part. This improves heat dissipation. The coating can be formed such that it extends to the surface of the main substrate on which the module substrate with the semiconductor component is mounted and comes into contact with the interconnection electrode on the surface of the main substrate. This further improves heat dissipation.

Abstract: A contact detector having power switches for disconnecting power to portions of the contact sensor when an over current is detected is disclosed. The power switches thus protect the contact sensor from over-current as the result of latch-up or other current-generating conditions. These current-generating conditions are often the result of ESD events on a surface of the contact detector. A contact detector comprises an exposed surface for detecting the presence of an object, an insulating surface, and a protection element disposed under the insulating surface for controlling power to the contact detector. The protection element is configured to disconnect power to the contact detector when a current to the contact detector is detected above a threshold. Preferably, the contact detector is a finger swipe sensor, but it can be a finger placement sensor or any other type of device that functions on contact with a finger or other patterned object.

Abstract: A method of manufacturing a semiconductor wafer bonding product according to the present invention includes: a step of preparing a spacer formation film including a support base having a sheet-like shape and a spacer formation layer provided on the support base and having photosensitivity; a step of attaching the spacer formation layer to a semiconductor wafer having one surface from a side of the one surface; a step of forming a spacer by subjecting the spacer formation layer to exposure and development to be patterned and removing the support base; and a step of bonding a transparent substrate to a region of the spacer where the removed support base was provided so that transparent substrate is included within the region. This makes it possible to manufacture a semiconductor wafer bonding product in which the semiconductor wafer and the transparent substrate are bonded together through the spacer uniformly and reliably.

Abstract: A method for manufacture of a nanophotonic device can include the step of operatively coupling a planar light source and a photodetector with an optical waveguide. The planar light source, photodetector and optical waveguide can then be monolithically integrated in direct contact with a sapphire substrate, along with an electronic component that is also in direct contact with the sapphire substrate.

Abstract: An electronic device includes: a substrate having first and second surfaces, wherein the first surface is opposite to the second surface; a first electronic element mounted on the first surface of the substrate; a second electronic element mounted on the second surface of the substrate; and a resin mold sealing the first electronic element and the first surface of the substrate. The resin mold further seals the second electronic element on the second surface of the substrate. The second surface of the substrate has a portion, which is exposed from the resin mold. The second electronic element is not disposed on the portion of the second surface.

Abstract: One embodiment provides a semiconductor wafer structure including a semiconductor wafer and a spacer layer. The semiconductor wafer includes active areas. The spacer layer is configured to provide spacing between the semiconductor dice in a stacked die package and the spacer layer is disposed on one side of the semiconductor wafer.