Isolation Of Cooling Means (e.g., Heat Sink) By An Electrically Insulating Element (e.g., Spacer) Patents (Class 257/717)
-
Patent number: 7256492Abstract: A heat sink that absorbs heat generated from at least one semiconductor device and dissipates the heat absorbed includes: a first surface adapted to match and contact at least one semiconductor device; a second surface having a fin structure adapted to dissipate heat from the heat sink into the air, the second surface arranged opposite to the first surface; combining portions having combining apertures each adapted to receive a predetermined combining element to affix the at least one semiconductor device to the heat sink, the combining apertures being arranged through the first surface and the second surface; and a protrusion arranged at a location of the first surface matching a point on an upper portion of the at least one semiconductor device; wherein the protrusion stops the at least one semiconductor device from rotating upon the at least one semiconductor device being affixed to the first surface of the heat sink by the combining element.Type: GrantFiled: August 16, 2006Date of Patent: August 14, 2007Assignee: Samsung SDI Co., Ltd.Inventor: Dong-An Kim
-
Patent number: 7245022Abstract: Under the present invention, a semiconductor chip is electrically connected to a substrate (e.g., organic, ceramic, etc.) by an interposer structure. The interposer structure comprises an elastomeric, compliant material that includes metallurgic through connections having a predetermined shape. In a typical embodiment, the metallurgical through connections electrically connect an under bump metallization of the semiconductor chip to a top surface metallization of the substrate. By utilizing the interposer structure in accordance with the present invention, the problems associated with previous semiconductor module designs are alleviated.Type: GrantFiled: November 25, 2003Date of Patent: July 17, 2007Assignee: International Business Machines CorporationInventors: Mukta G. Farooq, John U. Knickerbocker, Frank L. Pompeo, Subhash L. Shinde
-
Patent number: 7236367Abstract: The invention relates to a power electronics component that comprises a planar ceramics substrate (2) on whose one face condutor tracks (6), applied in thick-film technique, are disposed for electrically connecting electrical power components (7) of a circuit that are also disposed on the ceramics substrate (2). The ceramics substrate (2), with its other face, is brazed onto a metal a metal support element (1) that serves as a heat spreader. The support element (1) is linked with a thermoconducting housing part housing that accommodates the support element (1) in a thermoconductive manner. On the face of the support element (1) facing away from the ceramics substrate (2), approximately opposite the ceramics substrate (2), a second ceramics substrate (4) is brazed onto the ceramics substrate (2) that carries the circuit and has approximately the same dimensions.Type: GrantFiled: August 29, 2002Date of Patent: June 26, 2007Assignee: Siemens AktiengesellschaftInventors: Olaf Lucke, Bernd Thyzel
-
Patent number: 7235880Abstract: A package for integrated circuits is described. The package has a package substrate with a land side and an opposite die side, a first set of low level signal connectors on the die side to connect to an IC to be carried by the package, and a second set of low level signal connectors on the die side to connect to external components. The package may have power connectors on the land side or a power supply attached to the land side. A heat spreader or cooler may be attached to the die side.Type: GrantFiled: September 1, 2004Date of Patent: June 26, 2007Assignee: Intel CorporationInventor: Victor Prokofiev
-
Patent number: 7235876Abstract: A semiconductor device includes: first and second metallic plates, each of which includes a heat radiation surface and an inner surface; a semiconductor element between the metallic plates; a block between the second metallic plate and the semiconductor element; a solder member between the second metallic plate and the block; and a resin mold. The heat radiation surface is exposed from the resin mold. The second metallic plate includes a groove for preventing the solder member from expanding outside of the block. The groove is disposed on the inner surface and disposed on an outer periphery of the block. The second metallic plate further includes an inner surface member on an inner surface of the groove. The inner surface member has a solder wettability, which is larger than a solder wettability of the block.Type: GrantFiled: September 7, 2006Date of Patent: June 26, 2007Assignee: Denso CorporationInventors: Tomomi Okumura, Yoshitsugu Sakamoto, Naohiko Hirano, Kuniaki Mamitsu
-
Patent number: 7221570Abstract: An electronic assembly comprises a support board, an integrated circuit chip interconnected and coupled to the support board, and a thermal-gap-filler pad placed over the integrated circuit chip and in contact with an external device to dissipate heat generated by the integrated circuit chip. The electronic assembly further comprises a standoff structure disposed adjacent the thermal-gap-filler pad and coupled to the support board, the standoff structure configured to prevent excessive force from being applied onto the thermal-gap-filler.Type: GrantFiled: November 8, 2005Date of Patent: May 22, 2007Assignee: Apple, Inc.Inventor: John Mathew Depew
-
Patent number: 7211891Abstract: There is provided a small-size electronic heat pump device which is low in power consumption and which secures a vacuum gap without use of an additional circuit. The electronic heat pump device includes an emitter 1 and a collector 2. An electrically and thermally insulative spacer section 5 for keeping a space, i.e. vacuum gap G between an emitter electrode 11 and a collector electrode 21 constant is integrally formed in a semiconductor substrate 20 of the collector 2, which makes it possible to maintain the vacuum gap to be a specified space while a back flow of heat is prevented in a simple structure with a reduced number of component parts.Type: GrantFiled: November 26, 2004Date of Patent: May 1, 2007Assignee: Sharp Kabushiki KaishaInventors: Kenji Shimogishi, Yoshihiko Matsuo, Yoichi Tsuda
-
Patent number: 7211890Abstract: An embodiment of the present invention is a technique to provide heat extraction for semiconductor devices. At least a thermoelectric film is fabricated onto a bare wafer. The backside of the bare wafer is bonded to an active wafer having at least a device. The bonded bare and active wafers are annealed.Type: GrantFiled: September 30, 2003Date of Patent: May 1, 2007Assignee: Intel CorporationInventors: Shriram Ramanathan, Gregory M. Chrysler, David Chau, Ryan Lei
-
Patent number: 7205654Abstract: Programmed material consolidation processes for fabricating heat sinks include the selective consolidation of previously unconsolidated material. The heat dissipation element of the heat sink that has been fabricated by such processes can have non-linear or convoluted passageways therethrough to enhance air flow. An optical recognition system may be used in conjunction with programmed material consolidation processes to ensure that a heat sink is fabricated or positioned on the appropriate location of an electronic component, such as a semiconductor device.Type: GrantFiled: February 7, 2005Date of Patent: April 17, 2007Assignee: Micron Technology, Inc.Inventors: Vernon M. Williams, Bret K. Street
-
Patent number: 7202559Abstract: Electrically, mechanically, and thermally enhanced ball grid array (BGA) packages are described. An IC die is mounted in a centrally located cavity of a substantially planar first surface of a stiffener. The first surface of a substrate is attached to a substantially planar second surface of the stiffener. The second surface of the stiffener is opposed to the first surface of the stiffener. A centrally located protruding portion on the second surface of the stiffener is opposed to the centrally located cavity. The protruding portion extends through an opening in the substrate. A wire bond is coupled from a bond pad of the IC die to a contact pad on the first surface of the substrate through a through-pattern in the stiffener. The through-pattern in the stiffener is one of an opening through the stiffener, a recessed portion in an edge of the stiffener, a notch in an edge of the recessed portion, and a notch in an edge of the opening.Type: GrantFiled: January 13, 2005Date of Patent: April 10, 2007Assignee: Broadcom CorporationInventors: Sam Ziqun Zhao, Rezaur Rahman Khan
-
Patent number: 7200006Abstract: A thin metallic sheet having an array of alternating domes, directed away from opposite sides of the sheet, to bridge a gap between a top surface of a processor package and a bottom surface of a heat sink. The sheet is positioned between the processor package and heat sink before securing the heat sink to the processor package. By pressing the processor package and heat sink together, the tops of the domes flatten out to maximize surface contact between a first side of the sheet and the top of the processor package, and between a second side of the sheet and the top of the heat sink.Type: GrantFiled: June 3, 2004Date of Patent: April 3, 2007Assignee: International Business Machines CorporationInventors: Timothy Samuel Farrow, Albert Vincent Makley
-
Patent number: 7196426Abstract: A multilayered substrate for a semiconductor device, which has a multilayered substrate body formed of a plurality sets of a conductor layer and an insulation layer, and having a face for mounting a semiconductor element thereon and another face for external connection terminals, the face for mounting a semiconductor device being provided with pads through which the substrate is connected to a semiconductor element to be mounted thereon, and the face for external connection terminals being provided with pads through which the substrate is connected to an external electrical circuit, wherein a reinforcing sheet is respectively joined to the face for mounting a semiconductor element thereon and the face for external connection terminals of the multilayered substrate body.Type: GrantFiled: November 24, 2004Date of Patent: March 27, 2007Assignee: Shinko Electric Industries Co., Ltd.Inventors: Jyunichi Nakamura, Tadashi Kodaira, Shunichiro Matsumoto, Hironari Aratani, Takanori Tabuchi, Takeshi Chino
-
Patent number: 7193316Abstract: According to some embodiments, a microchannel is provided to transport a coolant. The microchannel may be proximate to an integrated circuit to transfer heat from the integrated circuit to the coolant. Moreover, a movable portion may be provided to adjust a volume of a space associated with the microchannel (e.g., when the coolant freezes).Type: GrantFiled: December 16, 2004Date of Patent: March 20, 2007Assignee: Intel CorporationInventors: Rajiv K. Mongia, Himanshu Pokharna, Eric DiStefano
-
Patent number: 7193328Abstract: Provided is a semiconductor device which prevents displacement of a semiconductor element and a wiring pattern of a wiring substrate so as to ensure the connection of the semiconductor element and the wiring pattern. The semiconductor device of the present invention includes a semiconductor element and a wiring substrate which is provided with a film substrate and a wiring pattern which is formed on the film substrate, the semiconductor element is connected to the wiring pattern, and the semiconductor element and the wiring substrate are sealed with a resin. A metallic film, made of material having a smaller coefficient of linear thermal expansion than the film substrate, is formed in a region where the wiring pattern is not formed on at least one surface of the film substrate.Type: GrantFiled: June 11, 2002Date of Patent: March 20, 2007Assignee: Sharp Kabushiki KaishaInventors: Takehiro Suzuki, Kenji Toyosawa
-
Patent number: 7183642Abstract: Removing heat generated by an operating IC chip from both the chip and the electronics package containing the chip is essential for proper system operation and to increase the life of the electronics package. Using an air permeable lid with the electronic package increases the heat transfer away from the IC chip and electronics package, thereby cooling the chip and the package.Type: GrantFiled: September 11, 2002Date of Patent: February 27, 2007Assignee: International Business Machines CorporationInventors: Anandaroop Bhattacharya, Varaprasad V. Calmidi, Sanjeev B. Sathe
-
Patent number: 7166912Abstract: An isolated thermal interface is presented. The inventive interface includes a flexible graphite sheet having two major surfaces, at least one of the major surfaces coated with a protective coating sufficient to inhibit flaking of the particles of graphite.Type: GrantFiled: April 5, 2001Date of Patent: January 23, 2007Assignee: Advanced Energy Technology Inc.Inventors: Jing-Wen Tzeng, Daniel Witold Krassowski
-
Patent number: 7166914Abstract: A packaged semiconductor chip including the chip, and a package element such as a heat sink is made by connecting flexible leads between contacts on the chip and terminals on a dielectric element such as a sheet or plate and moving the sheet or plate away from the chip, and injecting a liquid material to form a compliant layer filling the space between the package element and the dielectric element, and surrounding the leads. The dielectric element and package element extend outwardly beyond the edges of the chip, and physically protect the chip. The assembly may be handled and mounted by conventional surface mounting techniques. The assembly may include additional circuit elements such as capacitors used in conjunction with the chip.Type: GrantFiled: June 25, 2004Date of Patent: January 23, 2007Assignee: Tessera, Inc.Inventors: Thomas H. DiStefano, John W. Smith, Tony Faraci
-
Patent number: 7151671Abstract: A power supply comprising switching elements (20), wherein the power supply is provided with first heat sinks (30) having electrical conductivity to which the switching elements are fitted and a second heat sink (40) mounted with the first heat sinks which are electrically insulated, and first heat sink is used as one terminal for the switching elements, and the first heat sinks each having a projection, to be in contact with outside terminals (81), (82).Type: GrantFiled: November 28, 2002Date of Patent: December 19, 2006Assignee: Tokyo R & D Co., Ltd.Inventor: Jun Hyodo
-
Patent number: 7145225Abstract: An interposer includes a substrate, first and second sets of contact pads carried by the substrate, and receptacles formed in a surface of the substrate and exposing contact pads of the second set. The interposer may also include conductive traces carried by the substrate to electrically connect corresponding contact pads of the first and second sets. The receptacles are configured to at least partially receive conductive structures, such as solder balls, that are secured to the contact pads of the second set. Thus, the interposer is useful in providing semiconductor device assemblies and packages of reduced height or profile. Such assemblies and packages are also described, as are multi-chip modules including such assemblies or packages. In addition, methods for designing and fabricating the interposer are disclosed, as are methods for forming assemblies, packages, and multi-chip modules that include the interposer.Type: GrantFiled: May 17, 2002Date of Patent: December 5, 2006Assignee: Micron Technology, Inc.Inventor: Teck Kheng Lee
-
Patent number: 7142426Abstract: A heat dissipating device includes a heat sink forming a pressing portion thereon and a clip. The heat sink includes a hollow dissipating member and a column-shaped core, and the clip includes an integrally formed body defining a round hole therein. The pressing portion extends beyond the clip and presses the body of the clip on the heat sink. The method for manufacturing the heat dissipating device as above-mentioned includes the following steps: providing a heat sink with a collar formed thereon; providing a clip on the heat sink with the collar extending beyond the clip; having the collar deformed under pressure to form a pressing portion pressing the clip on the heat sink.Type: GrantFiled: December 17, 2004Date of Patent: November 28, 2006Assignees: Fu Zhun Precision Industry (Shen Zhen) Co., Ltd., Foxconn Technology Co., Ltd.Inventors: Gen-Cai Wang, Di-Qiong Zhao, Yi-Chyng Fang
-
Patent number: 7135644Abstract: A permeable conductive shield providing protection from electromagnetic interference and electrostatic discharge has a laminated structure suitable for application to the foil side or the component side of a circuit board. The laminated structure includes an array of foam spacers arranged with spaces between them, a layer of foam attached to the top of the spacers, a first insulating sheet on the layer of foam spacers; a conductive sheet on the first insulating sheet, and a second insulating sheet on the conductive sheet. Each of the layers has a multiplicity of through holes aligned with corresponding through holes in the other layers and with the spaces between the foam spacers so as to allow airflow through the structure. The layers are bonded together with intervening adhesive layers. A pressure-sensitive adhesive is applied to the bottom of the spacers for attaching the permeable conductive shield to the circuit board.Type: GrantFiled: February 1, 2006Date of Patent: November 14, 2006Assignee: International Business Machines CorporationInventors: Don Alan Gilliland, Ross T. Fredericksen
-
Patent number: 7133286Abstract: A method and apparatus is disclosed for liquid cooling an electronic device without wetting underside hardware of the electronic device and a substrate to which it is attached. In an exemplary embodiment, an electronic module substrate assembly includes a substrate, an electronic device electrically connected to the substrate, and an elastomer barrier. The barrier includes a cutout configured to sealably affix to chip edges defining the electronic device. The cutout provides fluid communication to a back surface of the electronic device exposed through the cutout while the barrier seals the substrate from such fluid communication.Type: GrantFiled: May 10, 2004Date of Patent: November 7, 2006Assignee: International Business Machines CorporationInventors: Roger R. Schmidt, Prabjit Singh
-
Patent number: 7132746Abstract: A process and electronic assembly for conducting heat from a semiconductor circuit device mounted to a substrate. The substrate is supported by a housing member equipped with a heat-conductive member. A surface of the device opposite the substrate is bonded to the heat-conductive member with a solder joint formed of indium and optionally one or more alloying constituents that increase the melting temperature of the solder joint above that of indium. The housing member, substrate, and device are assembled so that an indium-containing solder material is present between the heat-conductive member and the surface of the device opposite the substrate. The solder material is then reflowed to form the solder joint. The alloying constituent(s) are preferably introduced into the solder joint during reflow.Type: GrantFiled: August 18, 2003Date of Patent: November 7, 2006Assignee: Delphi Technologies, Inc.Inventors: Scott D. Brandenburg, Bruce A. Myers
-
Patent number: 7129640Abstract: An integrated circuit (IC) device for driving a light emitting device, such as a laser diode, includes a heat-absorbing structure fabricated on a substrate over an electrical component, such as an output transistor, to reduce the heat transfer between the electrical component and the light emitting device. The heat-absorbing structure is designed to absorb some of the heat generated by the electrical component so that less heat from the electrical component is transferred to the light emitting device, which reduces the operating temperature of the light emitting device. A method of fabricating the IC device includes forming the electrical component on the substrate and forming the heat-absorbing structure on the substrate over the electrical component. The heat-absorbing structure may be configured to substantially encase the electrical component.Type: GrantFiled: June 3, 2003Date of Patent: October 31, 2006Assignee: Avago Technologies Fiber IP (Singapore) Pte. Ltd.Inventor: Graham McRae Flower
-
Patent number: 7115988Abstract: The present invention provides a heat spreader with a bypass capacitor to provide substantially instant power and/or to control simultaneous switching noise (SSN). The present invention also provides a semiconductor device package incorporating this heat spreader. In addition, fabrication methods for such heat spreaders and packages are provided. Generally, the heat spreaders and packages of the present invention include an embedded bypass capacitor that can provide decoupling capacitance in order to deliver near instant power to the die and/or minimize SSN. In a preferred embodiment, the embedded bypass capacitor is connected to terminals integrated with the heat spreader (e.g., lid; stiffener) and/or to a package plane (e.g., power plane or ground plane) in the package substrate for connection via the flip chip package's power delivery system to a power source and/or component.Type: GrantFiled: January 21, 2004Date of Patent: October 3, 2006Assignee: Altera CorporationInventor: Vincent Hool
-
Patent number: 7112883Abstract: A semiconductor device is provided, the semiconductor device including a semiconductor chip having a first metal heat-conductive medium in the inside thereof, a substrate having a second metal heat-conductive medium thermally connected to the first metal heat-conductive medium, and a temperature control device of which at least a part is disposed on the substrate, thermally connected to the second metal heat-conductive medium, and configured to control the temperature within the semiconductor chip.Type: GrantFiled: January 5, 2005Date of Patent: September 26, 2006Assignee: Kabushiki Kaisha ToshibaInventor: Masahiko Hasunuma
-
Patent number: 7105858Abstract: An LED display assembly, comprising a grid of electrical conductors; light emitting diodes in association with the grid and in electrical communication with the conductors that provide power for LED operation, the grid operable to receive heat from the diodes during diode operation, and the array configured for passing coolant fluid for transfer of heat to the fluid. LED packages adjustable relative to a mounting grid, are also provided.Type: GrantFiled: July 23, 2003Date of Patent: September 12, 2006Assignee: OnScreen TechnologiesInventor: John M. Popovich
-
Patent number: 7106766Abstract: In a conventional optical device which mounts a semiconductor light emitting element, the processing is difficult and a manufacturing process cost is expensive because of the necessity of forming via holes in a substrate. An optical device comprises a laser diode which needs heat radiation, a glass substrate which is integrally molded into a mold glass for arranging the laser diode, a metallic heat sink arranged at an edge of the glass substrate for radiating heat generated from the laser diode, wherein an active layer proximity surface of the laser diode is arranged to oppose the heat sink, both of them are connected with a conductive paste through a lateral groove formed in the glass substrate.Type: GrantFiled: March 27, 2003Date of Patent: September 12, 2006Inventors: Kaoru Ishida, Tsuguhiro Korenaga
-
Patent number: 7102226Abstract: A device and method for designing and manufacturing an integrated heat spreader so that the integrated heat spreader will have a flat surface on which to mount a heat sink after being assembled into a package and exposed to the heat of a die. This device and method for designing and manufacturing an integrated heat spreader would generate a heat spreader that would be built compensate for deformations resulting from (1) physical manipulation during assembly (2) thermal gradients during operation and (3) differing rates of expansion and contraction of the package materials coupled with multiple package assembly steps at elevated temperatures so that one surface of the integrated heat spreader would have a flat shape.Type: GrantFiled: February 1, 2005Date of Patent: September 5, 2006Assignee: Intel CorporationInventors: Thomas J. Fitzgerald, Carl L. Deppisch, Fay Hua
-
Patent number: 7091603Abstract: In a semiconductor device having semiconductor chips, a lower heat sink which is joined on the principal rear surface side of the semiconductor chips and an upper heat sink which is joined on the principal front surface side of the semiconductor chips, wherein substantially the whole device is encapsulated with a molded resin, the thick-walled portion of a resin lying around a mounted portion is provided with holes which are resin-flow hindering portions for hindering the flow of the resin during the molding thereof, whereby air bubbles are prevented from appearing in the resin within the mounted portion.Type: GrantFiled: December 16, 2004Date of Patent: August 15, 2006Assignee: Denso CorporationInventors: Kuniaki Mamitsu, Yoshimi Nakase
-
Patent number: 7091604Abstract: A three-dimensional integrated circuit that provides reduced interconnect signal delay over known 2-dimensional systems. The three-dimensional integrated circuit also allows improved circuit cooling. The three-dimensional integrated circuit includes two or more electrically connected integrated circuits, separated by a cooling channel.Type: GrantFiled: June 4, 2004Date of Patent: August 15, 2006Assignee: Cabot Microelectronics CorporationInventors: Ian W. Wylie, Heinz H. Busta, David J. Schroeder, J. Scott Steckenrider, Yuchun Wang
-
Patent number: 7075180Abstract: In some embodiments, a method includes providing an integrated circuit (IC) die in a package. The IC die may have a metal layer on a back surface of the IC die. The method may also include applying a bias signal to the IC die via the metal layer.Type: GrantFiled: December 29, 2003Date of Patent: July 11, 2006Assignee: Intel CorporationInventors: Siva G. Narendra, James W. Tschanz, Victor Zia, Badarinath Kommandur, Vivek K. De
-
Patent number: 7067908Abstract: A semiconductor package having improved adhesiveness between the chip paddle and the package body and having improved ground-bonding of the chip paddle. A plurality of through-holes are formed in the chip paddle for increasing the bonding strength of encapsulation material in the package body. A plurality of tabs are formed in the chip paddle may also be used alone or in conjunction with the through-holes to further increase the bonding strength of the encapsulation material in the package body. The tabs provide additional area for the bonding site to ground wires from the semiconductor chip by increasing the length of the chip paddle.Type: GrantFiled: June 15, 2004Date of Patent: June 27, 2006Assignee: Amkor Technology, Inc.Inventor: Sung Sik Jang
-
Patent number: 7064428Abstract: A wafer-level package structure, applicable to a flip-chip arrangement on a carrier, which comprises a plurality of contact points, is described. This wafer-level package structure is mainly formed with a chip and a conductive layer. The conductive layer is arranged on the bonding pads of the chip as contact points. The conductive layer can further be arranged at a region outside the bonding pads on the chip as a heat sink to enhance the heat dissipation ability of the package.Type: GrantFiled: December 19, 2002Date of Patent: June 20, 2006Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
-
Patent number: 7061079Abstract: The present invention provides a chip package structure and the manufacturing method thereof, which affords higher heat dissipation efficiency and is suitable to fabricate the stack type package structure with a higher integration. The chip package structure comprises a carrier, at least a chip, a heat sink and a mold compound. The chip is disposed on the carrier, while the bonding pads of the chip are electrically connected to the leads of the carrier. The heat sink is disposed over the chip and includes at least a body and a plurality of connecting portions. The connecting portions are disposed around a periphery of the body and are electrically connected to the leads. By using a specially designed heat sink, the chip package structure can afford better heat dissipation and be suitable to form stack type package structures.Type: GrantFiled: November 17, 2004Date of Patent: June 13, 2006Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Gwo-Liang Weng, Shih-Chang Lee, Cheng-Yin Lee
-
Patent number: 7061103Abstract: A chip package structure is disclosed. The chip package structure essentially comprises a carrier, one or more chips, a heat sink and an encapsulating material layer. At least one of the chips is flip-chip bonded and electrically connected to the carrier or another chip. There is a flip-chip bonding gap between the chip and the carrier or other chips. A heat sink is positioned on the uppermost chip. The encapsulating material layer fills the flip-chip bonding gap as well as a gap between the uppermost chip and the heat sink. A part of the surface of the heat sink away from the upper-most chip is exposed. Furthermore, the encapsulating material layer is formed in a simultaneous molding process. For example, the chip is separated from the heat sink by a distance between 0.03˜0.2 mm, and the encapsulating material has a thermal conductivity greater than 1.2 W/m.K.Type: GrantFiled: January 5, 2004Date of Patent: June 13, 2006Assignees: Industrial Technology Research Institute, Matsushita Electric Works, Ltd.Inventors: Kai-Chi Chen, Shu-Chen Huang, Hsun-Tien Li, Tzong-Ming Lee, Taro Fukui, Tomoaki Nemoto
-
Patent number: 7061022Abstract: Disclosed are a semiconductor device and method of manufacturing the same comprising a substrate, a mesa region adjacent to the substrate, an electroplated metal layer, for reducing the thermal resistance of the device, surrounding the mesa region, an insulator layer separating a side portion of the mesa region from the electroplated metal layer, a heat sink, a bonding layer adjacent to the heat sink, and a second metal layer in between the substrate and the heat sink, wherein the substrate is adjacent to the bonding layer, and wherein the electroplated metal layer dimensioned and configured to have a thickness of at least half a thickness of the mesa region; and to laterally spread heat away from the mesa region. The mesa region comprises a first cladding layer adjacent to the substrate, an active region adjacent the first cladding layer, and a second cladding layer adjacent to the active region.Type: GrantFiled: August 24, 2004Date of Patent: June 13, 2006Assignee: United States of America as Represented by the Secretary of the ArmyInventors: John T. Pham, John D. Bruno, Richard L. Tober
-
Patent number: 7056566Abstract: A thermal interface for facilitating heat transfer from an electronic component to a heat sink. According to a preferred embodiment, the thermal interface comprises a first planar substrate that defines a first continuous peripheral edge, at least a portion of which extends beyond the interface mating surface between the electronic component and heat sink. Formed upon opposed sides of the substrate are layers of thermally conductive compositions, which preferably comprise certain novel graphitic allotrope compounds. The thermal interface further includes an adhesive deposited upon such portion of the peripheral edge extending beyond the mating surface between the electronic component and heat sink such that the thermal interface may be adhesively secured into position without forming an additional layer at the mating juncture between the electronic component and the heat sink.Type: GrantFiled: August 19, 2003Date of Patent: June 6, 2006Assignee: Henkel CorporationInventors: Raymond G. Freuler, Gary E. Flynn
-
Patent number: 7052937Abstract: Thermal cooling structures of diamond or diamond-like materials are provided for conducting heat away from semiconductor devices. A first silicon-on-insulator embodiment comprises a plurality of thermal paths, formed after shallow trench and device fabrication steps are completed, which extend through the buried oxide and provide heat dissipation through to the underlying bulk silicon substrate. The thermal conduction path material is preferably diamond which has high thermal conductivity with low electrical conductivity. A second diamond trench cooling structure, formed after device fabrication has been completed, comprises diamond shallow trenches disposed between the devices and extending through the buried oxide layer. An alternative diamond thermal cooling structure includes a diamond insulation layer deposited over the semiconductor devices in either an SOI or bulk silicon structure.Type: GrantFiled: May 5, 2003Date of Patent: May 30, 2006Assignee: International Business Machines CorporationInventors: Lawrence A. Clevenger, Louis L. Hsu, Li-Kong Wang, Tsorng-Dih Yuan
-
Patent number: 7049696Abstract: A connection structure including an IC chip, a substrate disposed with a conductive layer, and a heat-radiating mechanism that is mounted on the substrate, disposed between the IC chip and the substrate, and dissipates heat of the IC chip, wherein terminals of the IC chip are electrically connected to the conductive layer via the heat-radiating mechanism.Type: GrantFiled: August 1, 2003Date of Patent: May 23, 2006Assignee: Fuji Photo Film Co., Ltd.Inventor: Naoki Kubo
-
Patent number: 7049695Abstract: A structure and method are provided for dissipating heat from a semiconductor device chip. A first layer of a dielectric material (e.g. polyimide) is formed on a front side of a heat spreader (typically Si). A plurality of openings are formed through this first layer; the openings are filled with metal (typically Cu), thereby forming metal studs extending through the first layer. A second layer of metal is formed on the backside of the device chip. The first layer and the second layer are then bonded in a bonding process, thereby forming a bonding layer where the metal studs contact the second layer. The bonding layer thus provides a thermal conducting path from the chip to the heat spreader.Type: GrantFiled: January 14, 2005Date of Patent: May 23, 2006Assignee: International Business Machines CorporationInventor: H. Bernhard Pogge
-
Patent number: 7045890Abstract: A heat spreader and stiffener device has a stiffener portion extending towards a center of the heat spreader and stiffener device and mountable to a die-side surface of a substrate.Type: GrantFiled: September 28, 2001Date of Patent: May 16, 2006Assignee: Intel CorporationInventors: Hong Xie, Kristopher Frutschy, Koushik Banerjee, Ajit Sathe
-
Patent number: 7046155Abstract: A fault detection system detecting malfunctions or deteriorations, which may result in an inverter fault, is provided. The system has a temperature sensor installed on a semiconductor module to monitor a temperature rise rate. It is judged that an abnormal condition has occurred if the thermal resistance is increased by the deterioration of a soldering layer of the semiconductor module or by drive circuit malfunctions and, as a result, the relation between an operation mode and the temperature rise rate falls outside a predetermined range.Type: GrantFiled: June 1, 2004Date of Patent: May 16, 2006Assignee: Hitachi, Ltd.Inventors: Yutaka Sato, Masahiro Nagasu, Katsumi Ishikawa, Ryuichi Saito, Satoru Inarida
-
Patent number: 7042081Abstract: A semiconductor device includes a semiconductor constructing body which has a semiconductor substrate, a plurality of external connection electrodes formed on the semiconductor substrate, and heat dissipation columnar electrodes. Upper interconnections are mounted on one side of the semiconductor constructing body and connected to the external connection electrodes of the semiconductor constructing body. A heat dissipation layer is mounted on one side of the semiconductor constructing body and made of the same material as that of the upper interconnections.Type: GrantFiled: September 13, 2004Date of Patent: May 9, 2006Assignee: Casio Computer Co., Ltd.Inventors: Shinji Wakisaka, Hiroyasu Jobetto
-
Patent number: 7030484Abstract: A “lidless” integrated circuit package includes a support member that is arranged to support at least part of a load placed on the integrated circuit package. The support member has or is connected to a flexible support device that is in supportive contact with the load and that is designed to flex dependent on a position of the support member. The flexible support device substantially ensures that a plane of the surface of the flexible support device and a plane of a surface of a semiconductor die of the integrated circuit package are co-planar, thereby leading to a desirable load distribution within the integrated circuit package.Type: GrantFiled: April 14, 2004Date of Patent: April 18, 2006Assignee: Sun Microsystems, Inc.Inventors: Wen-Chun Zheng, Henry Jung
-
Patent number: 7031162Abstract: Disclosed is a cooling structure which has individual spreaders or caps mounted on the chips. The thickness of the high power spreader or cap exceeds the thickness of the lower power spreaders to ensure that the high power spreader achieves the highest plane and mates to a heat sink with the smallest interface gap. The variable and higher gaps between the lower power spreaders and the heat sink base are accommodated by compressible thermal pad or grease materials.Type: GrantFiled: September 26, 2003Date of Patent: April 18, 2006Assignee: International Business Machines CorporationInventors: Amilcar R. Arvelo, Kamal Kumar Sikka, Hilton T. Toy
-
Patent number: 7030485Abstract: A method and device for thermal conduction is provided. A thermal interface device and method of formation is described that includes advantages such as improved interfacial strength, and improved interfacial contact. Embodiments of thermal conduction structures are shown that provide composite thermal conduction and circulated liquid cooling. Embodiments are further shown that require simple, low numbers of manufacturing steps and reduced thermal interface thickness.Type: GrantFiled: June 26, 2003Date of Patent: April 18, 2006Assignee: Intel CorporationInventors: Sabina J. Houle, James Christopher Matayabas, Jr.
-
Patent number: 7026719Abstract: A semiconductor package with a heat spreader is described, including a first chip, a second chip, a heat spreader and a substrate. The first chip has an active surface over which the second chip is attached. The heat spreader is attached over the first chip. The first chip is bonded onto the substrate.Type: GrantFiled: September 12, 2003Date of Patent: April 11, 2006Assignee: Advanced Semiconductor Engineering, Inc.Inventor: Sung-Fei Wang
-
Patent number: 7022553Abstract: An improved integrated circuit package for providing built-in heating or cooling to a semiconductor chip is provided. The improved integrated circuit package provides increased operational bandwidth between different circuit devices, e.g. logic and memory chips. The improved integrated circuit package does not require changes in current CMOS processing techniques. The structure includes the use of a silicon interposer. The silicon interposer can consist of recycled rejected wafers from the front-end semiconductor processing. Micro-machined vias are formed through the silicon interposer. The micro-machined vias include electrical contacts which couple various integrated circuit devices located on the opposing surfaces of the silicon interposer. The packaging includes a Peltier element.Type: GrantFiled: June 26, 2003Date of Patent: April 4, 2006Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes, Eugene H. Cloud
-
Patent number: 7019395Abstract: A semiconductor module includes a fixed type and transformable type coolers and a flat semiconductor package sandwiched between the coolers. A relative positional relationship of the semiconductor package is fixed with the fixed type cooler, but variable with the transformable type cooler. The transformable type cooler includes a transformable member of a metal thin plate covering a coolant chamber. The semiconductor module includes a sandwiching mechanism causing the fixed type cooler to be pressed toward the transformable type cooler. Fastening adjustment screws of the sandwiching mechanism causes a pressing frame to approach a cooler body of the transformable type cooler. Therefore, the semiconductor package is pressed via the fixed type cooler while the transformable member is slightly transformed. This enhances a degree of contact between the semiconductor package and transformable member via an insulating member.Type: GrantFiled: March 18, 2004Date of Patent: March 28, 2006Assignee: Denso CorporationInventors: Naohiko Hirano, Takanori Teshima