Abstract: In an IGBT module which contains an IGBT device and a diode device connected to each other and accommodated in a case and which radiates heat generated in operation through a radiation board, an object is to reduce the area of the module in the lateral direction to achieve size reduction. The collector electrode surface of an IGBT device is provided on a radiation board, and an element connecting conductor is bonded with conductive resin on the emitter electrode surface. The anode electrode surface of a diode device is bonded on it with the conductive resin. The IGBT device and the diode device are thus stacked and connected in the vertical direction.

Abstract: The invention provides a memory system that allows connection of a memory controller to each of plural memory modules in an equal distance. The memory system includes a memory controller, three memory modules, a single socket which the three memory modules can be inserted into and pulled out from, and a mother board on which the memory controller and the socket are mounted, etc. And, the memory controller and each of the memory modules are connected in an equal distance through the socket pins of the socket that are branched from bus wirings on the mother board. The socket is furnished with three sets of the plural socket pins in a radial form, in correspondence with each of the memory modules. The socket has two types of structures: one has three module-board contacts for one board-bus connection, and the other has one module-board contact for one board-bus connection.

Abstract: An object of the present invention is to provide a technique for forming an ohmic connection between a semiconductor and a metal efficiently in a short period of time. The present invention provides a method of forming at least one electrode on a surface of a semiconductor, wherein a metal or alloy for the electrode is rubbed against a predetermined region of the semiconductor surface so as to be adhered by frictional force and frictional heat to the predetermined region of the semiconductor as an electrode and part of the adhered metal or a metal of the alloy is diffused into an inside of the semiconductor by the frictional heat thereby to be formed into an ohmic electrode substantially simultaneously when the metal or alloy is adhered by the frictional force and frictional heat to the predetermined region of the semiconductor.

Abstract: An electronic component includes an electronic element and a substrate to which the electronic element is mounted, the electronic element and the substrate being electrically or mechanically connected to each other by at least three bumps. Both the value obtained by dividing the total bonding-area of the bumps bonded to the electronic element by the mass of the electronic element and the value obtained by dividing the total bonding-area of the bumps bonded to the substrate by the mass of the electronic element are at least about 8.8 mm2/g.

Abstract: A fused silica substrate is processed to a thickness that allows it to be easily flexed. An opening is etched in the substrate. A die having a patterned topside is processed to the thickness of the substrate by lapping the die. The thinned die is positioned within the opening of the substrate. Non-conducting glass is then spun on top and backside surfaces of the die/substrate combination and is allowed to flow between the surfaces of the die and substrate. Conductive traces are constructed to provide electrical connection from the embedded die to the periphery of the enclosure for external electrical interconnect. The flexural properties of the thin fused silica (or equivalent) permit the enclosure to be arched and inserted into a printed circuit board without solder.

Abstract: There is provided a high performance onboard semiconductor device with low manufacturing costs and low repair costs. The onboard semiconductor device includes a power chip substrate on which a power chip is mounted, a control substrate provided with an electrical part in relation to the power chip, and an outer enclosing case in which the power chip substrate and the control substrate are contained, and is characterized in that the control substrate and the outer enclosing case are removably fixed to each other.

Abstract: A composite lid for a semiconductor package, in which the lid includes at least two materials. The first material is disposed over and attached to the back surface of the die with a low-modulus thermal gel and the second material is disposed towards the perimeter of the lid. The second material has a modulus of elasticity greater than the modulus of elasticity of the first material, and preferably, at least twice that of the first material.

Abstract: A method of forming a metal interconnect in an integrated circuit. A copper layer is formed over dielectric structures on the integrated circuit, where the dielectric structures have an upper level. The copper layer is planarized to be no higher than the upper level of the dielectric structures, without reducing the upper level of the dielectric structures. An electrically conductive capping layer is formed over all of the copper layer, without the capping layer forming over any of the dielectric structures.

Abstract: A microstructure relay is provided, having a body that includes upper and lower portions. The lower portion is formed from a substrate, and the upper portion is formed on the substrate to avoid bonding of the lower portion to the upper portion. A support member is fixed to the body at a first end of the support member to form a cantilever, wherein an upper surface of the support member and a lower surface of the upper portion of the body form a cavity. A first contact region is located on the upper surface at a second end of the support member. The first contact region comprises a first contact, wherein pivoting the support member toward the lower surface causes the first contact to be electrically coupled to a counter contact.

Abstract: A surface mount-type microelectronic component assembly which does not physically attach the microelectronic component to its carrier substrate. Electrical contact is achieved between the microelectronic component and the carrier with solder balls attached to either the microelectronic component or the carrier substrate. A force is exerted on the assembly to achieve sufficient electrical contact between the microelectronic component and the carrier substrate.

Abstract: A wiring terminal is formed on a wiring substrate, and an electrode is formed on a semiconductor device. The width of the wiring terminal is smaller than the width of the electrode. When the semiconductor device is mounted on the wiring substrate, the wiring terminal becomes embedded in the electrode due to applied pressure.

Abstract: An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.

Abstract: A connect and disconnect assembly for connecting and disconnecting a laser diode having leads to a printed circuit board (PCB). The assembly includes a heatsink having a base plate portion and fins extending from and integral with the base plate portion. The heatsink further includes spacer sleeves extending from a side of the base plate portion opposing the fins. The heatsink connects to the printed circuit board by providing mount screws through the heatsink and spacer sleeves which are received in mount holes formed in the PCB. The laser diode connects to the base plate portion of the heatsink. Laser support blocks connect with the heatsink and support opposing sides of the laser diode. Each laser support block is provided with a dielectric gasket. When the heatsink is mounted onto the PCB, the laser diode leads are forced against corresponding pads provided on the PCB for electrically connecting the laser diode to the PCB.

Abstract: Bump areas for signals are spread on upper and lower positions with respect to Vdd and Vss lines in an I/O buffer. Thus, the direction of routing the lines from bumps for signals to the I/O buffers is spread in two directions. A greater number of I/O buffers can be accommodated without increasing the size of a semiconductor integrated circuit.

Abstract: A method of curing adhesives of a die attach material to reduce the formation of voids at the resulting bondline, defined by the interface between the adhesive and the surface of a die being attached. The method includes applying a relatively high pressure, in addition to a relatively high temperature, to cure the adhesive material.

Abstract: A sealing material in a plate form is placed on a frame wherein a recess is provided. A semiconductor chip and the frame are overlapped via the sealing material in a plate form within a thermostatic chamber of which the temperature is higher than the temperature at the time of the sealing of the semiconductor chip and the frame in a resin. After that, the semiconductor chip and the frame, which overlap each other, are taken out of the thermostatic chamber so as to be cooled down in the atmosphere. After that, they are sealed in a molding resin. The semiconductor chip is secured to the frame due to the differential pressure (negative pressure) between the pressure within the airtight space and atmospheric pressure. Thereby, a resin mold semiconductor device is gained wherein a semiconductor chip is secured to a frame without using a die bonding material.

Abstract: A spring element used in a temporary package for testing semiconductors is provided. The spring element is compressed so as to press the semiconductor, either in the form of a bare semiconductor die or as part of a package, against an interconnect structure. The spring element is configured so that it provides sufficient pressure to keep the contacts on the semiconductor in electrical contact with the interconnect structure. Material is added and/or removed from the spring element so that it has the desired modulus of elasticity. The shape of the spring element may also be varied to change the modulus of elasticity, the spring constant, and the force transfer capabilities of the spring element. The spring element also includes conductive material to increase the thermal and electrical conductivity of the spring element.

Abstract: In accordance with a press contact type semiconductor device, a metallic body having macroscopic vacancies inside is arranged between a main electrode of the semiconductor device and a main electrode plate, or between an intermediate electrode plate arranged on a respective main plane of the semiconductor element and a main electrode plate.

Abstract: An integrated circuit and manufacturing method therefor is provided having a semiconductor substrate with a semiconductor device. A device dielectric layer formed on the semiconductor substrate. A channel dielectric layer on the device dielectric layer has an opening formed therein. A barrier layer lines the channel opening. A conductor core fills the opening over the barrier layer. An interconnect cap is disposed over the conductor core and seed layer and is capped with a capping layer. The interconnect cap is preferably of an indium oxide compound.

Abstract: A semiconductor integrated circuit device has a semiconductor chip, interposer, and substrate. The semiconductor chip has a plurality of first pads arranged at first pitches on a surface. The interposer has a first surface and a second surface. On the first surface, a plurality of second pads are arranged at the first pitches. On said second surface, a plurality of third pads arranged at second pitches which are larger than the first pitches. The second pads and the first pads are connected to each other by joining the first surface of the interposer to the surface of the semiconductor chip so as to face each other. The substrate has a plurality of fourth pads arranged at the second pitches on a surface. The fourth pads and the third pads are connected to each other by joining the surface of the substrate to the second surface of the interposer so as to face each other.

Abstract: A chip carrier, a semiconductor package and a fabricating method thereof are proposed, in which on one side of the chip carrier finally removed from an engaged surface of a mold in a de-molding process there is formed at least one grounding means corresponding in position to an eject pin of the mold, so as to allow a gear amount of electrical static generated on a surface of the semiconductor package during molding and de-molding to be discharged to the outside, instead of being retained on a semiconductor chip, conductive elements and conductive traces of the semiconductor package. This therefore can prevent electrical leakage and damage to the semiconductor chip from occurrence, and improve the quality and production efficiency for the semiconductor package.

Abstract: The object of the invention is to provide such a highly reliable semiconductor device as no defect such as the breakage of a tungsten conductor occurs. This object is achieved by the following means, i.e., a molybdenum film, a tungsten film and another molybdenum film are deposited in this order on an interlayer dielectric film formed on a silicon substrate.

Abstract: A slotted file is created by connecting two side walls and a back wall. The side walls have etched grooves facing directly across from each other. The platelet has flanges that fit into the grooves. In one embodiment, a completed cube is formed when the platelets fill the slotted file.

Abstract: An electronic component assembly is disclosed. The electronic component assembly may comprise a printed circuit board, a frame secured to the printed circuit board and one or more electronic components mounted in the frame and arranged in electrical contact with conductive traces of the printed circuit board, wherein no solder is used to connect the electronic components to the printed circuit board. A method for assembling the electronic component assembly is also disclosed.

Abstract: The invention relates to a method for fabricating a microcontact spring on a substrate (1) with at least one contact pad (2) and a first insulator layer (13) with a window above the contact pad (2).

Abstract: A plurality of wiring layers are laminated on an LSI chip. Each wiring layer includes an electrode to which is applied a mechanical pressure, a first insulating film formed in a region where it is necessary to have a high mechanical strength and having the electrode formed therein, a second insulating film formed in the same layer as the layer of the first insulating film and formed in a region where a mechanical strength higher than that of the first insulating layer is not required, and a wiring layer formed on the surface of the second insulating film.

Abstract: Disclosed herein is a semiconductor device, which comprises a semiconductor chip including, over one main surface thereof, first wirings, protective films formed so as to cover other portions excluding parts of the first wirings, flexible layers respectively formed on the protective films so as to exclude the parts of the first wirings, and second wirings having first portions respectively electrically connected to the parts of the first wirings, and second portions respectively drawn onto the flexible layers; a wiring board having third wirings over one main surface thereof; and an adhesive comprising a large number of conductive particles contained in an insulative resin, and wherein the semiconductor chip is bonded to the wiring board with the adhesive interposed therebetween in a state in which the one main surface thereof is face to face with the one main surface of the wiring board, and the second portions of the second wirings are respectively electrically connected to the third wirings with some of th

Abstract: A contact clip for the aluminum contact of a semiconductor device has a central nickel-iron body, preferably Nilo alloy 42, which is coated on top and bottom by a soft, but high conductivity metal such as gold, silver or copper. The nickel-iron body has a thickness of about 15 mils, and is about the thickness of the silicon die. The conductive layers have a thickness of about 5% to 20% of that of the nickel-iron core.

Abstract: A spherical semiconductor device includes a spherical semiconductor element having one or more electrodes on its surface. Spherical conductive bumps are formed at the positions of the electrodes. The electrodes are so arranged as to contact a common plane. Spherical bumps constituting a group to be connected to the outside protrude above the spherical semiconductor element such that a predetermined gap is formed between a plane or a spherical surface capable of contacting the spherical bumps and the surface of the spherical semiconductor element. The spherical semiconductor device is connected to various circuit boards or another semiconductor device through the spherical bumps. This affords easy and accurate electrical connections to the outside.

Abstract: A semiconductor device comprising a wiring substrate which has a laminated glass fabric body made by laminating a plurality of glass fabrics and impregnating with resin. A resin layer is provided on at least one of surfaces of the laminated glass fabric body. A plurality of pad electrodes are formed on the resin layer. The resin layer has a thickness from 1.5 to 2.5 times the depth of unevenness of the surface of the laminated glass fabric body on which the resin layer exists. A semiconductor pellet is disposed on the wiring substrate and has a plurality of projected electrodes. The projected electrodes are electrically coupled to the pad electrodes by pressing the projected electrodes to the pad electrodes while heating the wiring substrate and/or the semiconductor pellet. Tip portions of the projected electrodes together with the pad electrodes plunge into the resin layer.

Abstract: The method of manufacturing a semiconductor device of the present invention comprises a step of forming a titanium layer (2) on silicon-containing layers (a gate electrode (14) and an impurity layer (18)) which are formed on a silicon substrate (1); a step of forming a protective layer (3) having compression stress on the silicon substrate (1), on the titanium layer (2); and a step of forming a titanium silicide layer by reacting silicon in the silicon containing layer and titanium in the titanium layer (2) by thermal processing. The compression stress of the protective layer is preferably in the range from 1×109 Dyne/cm2 to 2×1010 Dyne/cm2. The protective layer (3) is preferably made from at least one metal selected from the group consisting of tungsten, cobalt, tantalum, and molybdenum. According to the present invention, a fine interconnecting effect is suppressed by avoiding the effect of a stress which obstructs a phase transition in the titanium silicide layer.

Abstract: A package for connecting an integrated circuit to a printed circuit board. The package includes an interconnect having a deflectable cantilever and a solder bump. When the integrated circuit is affixed to the interconnect, the solder bump deflects the cantilever. When the solder bump is heated such that the solder reflows, the cantilever springs toward its non-deflected position and is at least partially absorbed by the reflowing solder.

Abstract: In accordance with a press contact type semiconductor device, a metallic body having macroscopic vacancies inside is arranged between a main electrode of the semiconductor device and a main electrode plate, or between an intermediate electrode plate arranged on a respective main plane of the semiconductor element and a main electrode plate.

Abstract: In a flat-type semiconductor stack formed by alternately stacking flat-type semiconductor devices (1) and heat-radiating elements (2), a projecting pin (7) is provided on a contact surface of at least one flat-type semiconductor device (1) while a positioning recess (8a) and a guide groove (8) are formed in a contact surface of at least one heat-radiating element (2), the guide groove (8) extending directly from the positioning recess (8a) to a side surface of the heat-radiating element (2). The flat-type semiconductor device (1) is aligned with the heat-radiating element (2) by fitting the pin (7) in the guide groove (8) and sliding the pin (7) along the guide groove (8) until the pin (7) stops to slide at the positioning recess (8a).

Abstract: A stacked semiconductor device includes a plurality of stacked wiring substrates each having connection electrodes and wires connected to the connection electrodes and each mounted with a semiconductor device, a plurality of conductive via boards each interposed between adjacent two wiring substrates and having an opening for enclosing the semiconductor device, an uppermost wiring substrate formed on the top of the stacked wiring substrates and having wires connected to the connection electrodes, and a lowermost wiring substrate formed under the stacked wiring substrates and having wires connected to the connection electrodes, wherein heat radiation/shield conductive layers are formed on the uppermost and lowermost wiring substrates.

Abstract: An apparatus and method for improving the underfill filling of a semiconductor chip element 100 which is ultrasonically bonded to and mounted on a circuit board. A semiconductor chip element 100 includes a silicon chip 101 and a group of stud bumps 117 formed on a bottom surface 101a of the chip 101. Signal stud bumps 113 are made of gold while power stud bumps 114, ground stud bumps 115 and dummy stud bumps 116 are all made of a gold-palladium alloy, which are harder than the signal stud bumps 113 and thus do not deform easily during ultrasonic treatment. Therefore, in a state in which the semiconductor chip element 100 is mounted, a gap of approximately 30 &mgr;m is maintained between the bottom surface 101a of the chip 100 and a top surface of the circuit board 120 on which the semiconductor chip element 100 is mounted.

Abstract: There is provided an electronic device comprising at least one electronic part and a substrate on which said electronic part is mounted, said electronic part and said substrate being bonded by a joint comprising a phase of Al particles and another phase of a Al—Mg—Ge—Zn alloy, said Al particles being connected to each other by said Al—Mg—Ge—Zn alloy phase.

Abstract: A compression bonded type semiconductor device including a semiconductor substrate having a gate electrode and a cathode electrode formed on a first surface and an anode electrode formed on a second surface opposite to the first surface, an external cathode electrode disposed so as to be compression bondable to the cathode electrode, and an external anode electrode disposed so as to be compression bondable the anode electrode. Also included is an insulating cylinder containing the semiconductor substrate, an external gate terminal having an outer peripheral portion protruding to an outside of the insulating cylinder and having a protrusion at an inner peripheral portion configured to about said gate electrode, and an elastic body configured to press the protrusion of the external gate terminal to the gate electrode.

Abstract: A semiconductor device, comprising an electrode on a base surface, a bump formed on the electrode, a pad, and a means of connection. The means of connection comprises a plurality of conductive particles, conducting the bump and the pad with conductive particles bonded between. The base surface is further formed with a barrier rib that separates the conductive particles.

Abstract: A semiconductor device includes a semiconductor element on which a plurality of bumps are formed and a substrate having a first surface on which a plurality of protruding electrodes are protrudingly formed in correspondence to an arrangement of the bumps, and a second surface on which balls serving as mounting terminals are formed. The semiconductor element is bonded in a face-down manner to the substrate with the protruding electrodes being embedded into the bumps. Alloy layers having materials identical to those of the bumps and the protruding electrodes are formed on interfaces of the bumps and the protruding electrodes.

Abstract: A high-power semiconductor module (10) has a number of flat semiconductor chips (14) which rest with their lower face flat on a base plate (11), establishing first electrical contacts, and have a cover plate (13), which is arranged parallel to the base plate (11), applied to their upper face with pressure, establishing second electrical contacts.

Abstract: An architecture and method of fabrication for an integrated circuit 200 having a bond pad 208; at least one portion of said integrated circuit disposed under said contact pad and electrically connected to said pad through a via 205; a combination of a bondable metal layer 207, a stress-absorbing metal layer 203, and a mechanically strengthened, electrically insulating layer 204; and said combination of layers separating said contact pad and said portion of said integrated circuit, and having sufficient thickness to protect said circuit from bonding impact.

Abstract: A microelectronic package comprising a microelectronic element, resilient element including one or more intermediary layers capable of being wetted and assembled with the microelectronic element, and an adhesive is provided. The adhesive contacts at least one of the one or more intermediary layers and the microelectronic element. A resilient element is also provided.

Abstract: A test method for a semiconductor device in which a bonding pad thereof comprises a first interconnect layer and a second interconnect layer, the bonding pad comprising: a plurality of connection parts, provided within a plurality of slit-shaped trenches formed in an interlayer insulation film, respectively, and connecting the first interconnect layer and the second interconnect layer, the connection parts being disposed in one direction with a prescribed spacing, wherein the method comprising; contacting a test probe for testing the semiconductor device with the bonding pads so as to be in a direction parallel to a longitudinal direction of the connection part.

Abstract: A groove (3) having a V-shaped section is provided on a bonding surface (1a) of an IC chip (1) being as a first small part, while an elongate projection (4) having a V-shaped section to engage with the groove (3) of the first IC chip (1) is provided on a corresponding portion of a bonding surface (2a) of an IC chip (2) being as a second small part (2). Then, the IC chips (1, 2) are bonded together by the action of a holding force resulting from fitting the elongate protection (4) of the second IC chip to the groove (3) of the first IC chip (1), together with a bonding force produced between the bonding surfaces by interatomic force and metallic bond.

Abstract: A power semiconductor module in which at least one semiconductor chip with which contact is made by pressure is electrically connected via a contact element to a main connection. The contact element has two planar contact surfaces, between which a spring element is located. Irrespective of the individual position and height of a chip, the respective spring element ensures a standard contact force. Overloading of the semiconductor chips when the module is being clamped in is prevented by ceramic supporting elements.

Abstract: A simplified process for flip-chip attachment of a chip to a substrate is provided by pre-coating the chip with an encapsulant underfill material having separate discrete solder columns therein to eliminate the conventional capillary flow underfill process. There is also provided a flip-chip configuration having a flexible tape lamination for underfill encapsulation. With this configuration, the complaint solder/flexible encapsulant understructure absorbs the strain caused by the difference in the thermal coefficients of expansion between the chip and the substrate and provides enhanced ruggedness.

Abstract: The contact arrangement is a connector block for detachably fastening an electrical component, particularly an integrated circuit having a plurality of terminal contacts disposed in a ball grid array (BGA), in a column grid array (CGA), in a land grid array (LGA) or of the flip-chip type to a printed circuit board. In a support part, a number of contact pins are disposed in a grid in bores. The contact pins project from the bore on the side facing the printed circuit board and are surface-mounted together with contact areas of the printed circuit board. A free end region of each bore is intended for guiding the substantially dome-shaped terminal contacts. Between the end of a contact pin and a terminal contact there is a space bridged for establishing an electrical connection with a contact element, for example an axially compressible coil spring. By means of several holding-down elements disposed peripherally to the integrated circuit, the integrated circuit is pressed down upon the support part.

Abstract: A semiconductor module includes a MOSFET chip and a package for accommodating the MOSFET chip. The drain area of the MOSFET chip is connected to a base substrate. A source and a gate electrode are arranged on the top of the package, and also a drain electrode to be connected to the base substrate is arranged. On a printed-circuit board, to which a protection circuit is implemented, holes corresponding to the drain electrode, the source electrode, and the gate electrode are formed. The protection circuit is attached to the semiconductor module while the electrodes penetrate into the respective holes.

Abstract: An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.