Light Coupled Transistor Structure Patents (Class 257/83)
  • Patent number: 8791359
    Abstract: Novel structures of photovoltaic cells (also called as solar cells) are provided. The cells are based on nanoparticles or nanometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators, and may be metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications such as in space, commercial, residential and industrial applications.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: July 29, 2014
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut Kumar Dutta
  • Patent number: 8772770
    Abstract: An oxide semiconductor material having p-type conductivity and a semiconductor device using the oxide semiconductor material are provided. The oxide semiconductor material having p-type conductivity can be provided using a molybdenum oxide material containing molybdenum oxide (MoOy (2<y<3)) having an intermediate composition between molybdenum dioxide and molybdenum trioxide. For example, a semiconductor device is formed using a molybdenum oxide material containing molybdenum trioxide (MoO3) as its main component and MoOy (2<y<3) at 4% or more.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: July 8, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshinobu Asami, Riho Kataishi, Erumu Kikuchi
  • Patent number: 8766285
    Abstract: A display includes: a light-emitting element formed by laminating a first electrode layer, an organic layer including a light-emitting layer and a second electrode layer in order on a base; and an auxiliary wiring layer being arranged so as to surround the organic layer and being electrically connected to the second electrode layer, in which the auxiliary wiring layer includes a two-layer configuration including a first conductive layer and a second conductive layer, the first conductive layer has lower contact resistance to the second electrode layer than that of the second conductive layer, the two-layer configuration in the auxiliary wiring layer is formed so that an end surface of the second conductive layer is recessed inward from an end surface of the first conductive layer, thereby a part of a top surface of the first conductive layer is in contact with the second electrode layer.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: July 1, 2014
    Assignee: Sony Corporation
    Inventor: Hiroshi Sagawa
  • Patent number: 8759844
    Abstract: Semiconductor layers on active areas for transistors in a memory cell region (region A) and a peripheral circuit region (region B) are simultaneously epitaxially grown in the same thickness in which the adjacent semiconductor layers in region A do not come into contact with each other. Only semiconductor layer (10) in region B is also grown from the surface of a substrate which is exposed when only the surface of STI (2) in region B is drawn back, so that a facet (F) of the semiconductor layer 10 is formed outside the active area, followed by ion-implantation to form a high density diffusion layer (11) in region B. Accordingly, short circuit between semiconductor layers on source/drain electrodes of transistors in region A is prevented, and uniformity of the junction depth of the layer (11) of the source/drain electrodes including an ESD region in a transistor of region B is obtained, thereby restricting the short channel effect.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: June 24, 2014
    Inventor: Shinya Iwasa
  • Patent number: 8754414
    Abstract: An OLED device includes an active layer on a substrate; a first insulating layer covering the active layer, and including a first opening and a first insulation island in the first opening, separated from an inner surface of the first opening; a gate electrode on the first insulating layer including gate bottom and top electrodes; a pixel electrode on the first insulation island on the same layer as the gate bottom electrode; source and drain electrodes insulated from the gate electrode and electrically connected to the active layer; a second insulating layer between the gate and the source and drain electrodes, and including a second opening exposing the pixel electrode; a light-reflecting portion in the openings, and surrounding the pixel electrode; an intermediate layer on the pixel electrode and including an organic emissive layer; and an opposite electrode facing the pixel electrode with the intermediate layer interposed between them.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: June 17, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sang-Ho Moon, Joon-Hoo Choi, Chun-Gi You, Kyu-Sik Cho, Jong-Hyun Park
  • Patent number: 8735884
    Abstract: An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.
    Type: Grant
    Filed: October 1, 2012
    Date of Patent: May 27, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichiro Sakata, Toshinari Sasaki, Miyuki Hosoba
  • Patent number: 8729572
    Abstract: A light emitting diode package includes an electrically insulated base, first and second electrodes, an LED chip, a voltage stabilizing module, and an encapsulative layer. The base has a first surface and an opposite second surface. The first and second electrodes are formed on the first surface of the base. The LED chip is electrically connected to the first and second electrodes. The voltage stabilizing module is formed on the first surface of the base, positioned between and electrically connected to the first and second electrodes. The voltage stabilizing module connects to the LED chip in reverse parallel and has a polarity arranged opposite to that of the LED chip. The voltage stabilizing module has an annular shape and encircles the first electrode. The encapsulative layer is formed on the base and covers the LED chip.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: May 20, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Hou-Te Lin, Chao-Hsiung Chang
  • Patent number: 8729540
    Abstract: The present invention relates to a field effect electroluminescent ambipolar organic transistor in which there are two couples of control electrodes, a layer of ambipolar organic semiconductor in direct contact with the source and the drain electrode and two separate dielectric layers, and wherein said dielectric layers are each arranged between the ambipolar organic semiconductor layer and a couple of control electrodes.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: May 20, 2014
    Assignee: E.T.C. S.R.L.
    Inventors: Michele Muccini, Raffaella Capelli, Stefano Toffanin
  • Patent number: 8723336
    Abstract: According to an embodiment, a semiconductor light emitting device includes a light emitting body including a semiconductor light emitting layer, a support substrate supporting the light emitting body, and a bonding layer provided between the light emitting body and the support substrate, the bonding layer bonding the light emitting body and the support substrate together. The device also includes a first barrier metal layer provided between the light emitting body and the bonding layer, and an electrode provided between the light emitting body and the first barrier metal layer. The first barrier layer includes a first layer made of nickel and a second layer made of a metal having a smaller linear expansion coefficient than nickel, and the first layer and the second layer are alternately disposed in a multiple-layer structure. The electrode is electrically connected to the light emitting body.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: May 13, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yasuharu Sugawara
  • Patent number: 8723174
    Abstract: A TFT 17 provided on a substrate 3 is provided. The TFT 17 includes a gate electrode 31, a gate insulating film 32, a semiconductor 33, a source electrode 34, a drain electrode 35, and a protection film 36. The semiconductor 33 includes a metal oxide semiconductor. The semiconductor 33 has a source portion 33a which is in contact with the source electrode 34, a drain portion 33b which is in contact with the drain electrode 35, and a channel portion 33c which is exposed through the source electrode 34 and the drain electrode 35. A conductive layer 37 having a relatively small electrical resistance is formed in each of the source portion 33a and the drain portion 33b. The conductive layer 37 is removed from the channel portion 33c.
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: May 13, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Makoto Nakazawa
  • Patent number: 8716933
    Abstract: A light-emitting device having the quality of an image high in homogeneity is provided. A printed wiring board (second substrate) (107) is provided facing a substrate (first substrate) (101) that has a luminous element (102) formed thereon. A PWB side wiring (second group of wirings) (110) on the printed wiring board (107) is electrically connected to element side wirings (first group of wirings) (103, 104) by anisotropic conductive films (105a, 105b). At this point, because a low resistant copper foil is used to form the PWB side wiring (110), a voltage-drop of the element side wirings (103, 104) and a delay of a signal can be reduced. Accordingly, the homogeneity of the quality of an image is improved, and the operating speed of a driver circuit portion is enhanced.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: May 6, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takeshi Fukunaga
  • Patent number: 8710499
    Abstract: It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: April 29, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toshinari Sasaki, Junichiro Sakata, Masashi Tsubuku
  • Patent number: 8704243
    Abstract: Disclosed is a light emission element including, on a substrate having an insulative surface, a first electrode connected with a thin film transistor and an insulator covering the end of the first electrode, a layer containing, an organic compound in contact with the first electrode, a second electrode in contact with the layer containing the organic compound. The first electrode has an inclined surface and the inclined surface reflects emitted light from the layer containing the organic compound. Further, a light absorbing multi-layered film absorbing external light is disposed on the portion of the first electrode covered with the insulator. The light absorbing multi-layered film comprising at least has a three-layered structure comprising a light transmitting film, a film partially absorbing light and a light transmitting film.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: April 22, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takeshi Noda
  • Patent number: 8698137
    Abstract: A protection circuit for efficiently reducing the influence of ESD and a semiconductor device in which the influence of ESD is efficiently reduced are provided. The protection circuit includes at least two protection diodes. Each protection diode is a transistor including two gates facing each other with a semiconductor layer in which a channel is formed sandwiched between the gates. A fixed potential is applied to one of the gates of the transistor.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: April 15, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 8685809
    Abstract: Self-assembled polymer technology is used to form at least one ordered nanosized pattern within material that is present in a conductive contact region of a semiconductor structure. The material having the ordered, nanosized pattern is a conductive material of an interconnect structure or semiconductor source and drain diffusion regions of a field effect transistor. The presence of the ordered, nanosized pattern material within the contact region increases the overall area (i.e., interface area) for subsequent contact formation which, in turn, reduces the contact resistance of the structure. The reduction in contact resistance in turn improves the flow of current through the structure. In addition to the above, the inventive methods and structures do not affect the junction capacitance of the structure since the junction area remains unchanged.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: April 1, 2014
    Assignee: International Business Machines Corporation
    Inventors: Bruce B. Doris, Carl J. Radens, Anthony K. Stamper, Jay W. Strane
  • Patent number: 8680586
    Abstract: A semiconductor light emitting device including: a substrate made of GaAs; and a semiconductor layer formed on the substrate, in which part of the substrate on a side opposite to the semiconductor layer is removed by etching so that the semiconductor light emitting device has a thickness of not more than 60 ?m.
    Type: Grant
    Filed: January 4, 2008
    Date of Patent: March 25, 2014
    Assignee: ROHM Co., Ltd.
    Inventors: Tadahiro Hosomi, Kentaro Mineshita
  • Patent number: 8669567
    Abstract: A light-emitting device is disclosed. More particularly, the light-emitting device comprises a first substrate; a light-emitting element over the first substrate; a second substrate over the light-emitting element, wherein the second substrate contains a concave portion; a sealant between the first substrate and the second substrate; and a material having a water absorbing property is formed in the concave portion, wherein the material having the water absorbing property is provided so as not to overlap the light-emitting element, and so as to be spaced from the sealant.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: March 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiro Kawakami, Kaoru Tsuchiya, Takeshi Nishi, Yoshiharu Hirakata, Keiko Kida, Ayumi Sato, Shunpei Yamazaki
  • Patent number: 8664660
    Abstract: A p channel IFT of a driving circuit has a single drain structure and its n channel TFT, a GOLD structure or an LDD structure. A pixel TFT has the LDD structure. A pixel electrode disposed in a pixel portion is connected to the pixel TFT through a hole bored in at least a protective insulation film formed of an inorganic insulating material and formed above a gate electrode of the pixel TFT, and in an interlayer insulating film disposed on the insulation film in close contact therewith. These process steps use 6 to 8 photo-masks.
    Type: Grant
    Filed: July 23, 2012
    Date of Patent: March 4, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Jun Koyama
  • Patent number: 8659021
    Abstract: An organic light-emitting display device is manufactured via a simple process and has an improved aperture ratio. The organic light-emitting display device comprising: a substrate; an auxiliary electrode formed on the substrate; a thin film transistor (TFT) formed on the auxiliary electrode, the TFT comprising an active layer, a gate electrode, a source electrode and a drain electrode; an organic electroluminescent (EL) device electrically connected to the TFT and formed by sequentially stacking a pixel electrode formed on the same layer by using the same material as portions of the source and drain electrodes, an intermediate layer comprising an organic light emission layer (EML), and an opposite electrode disposed to face the pixel electrode; and a contact electrode formed on the same layer by a predetermined distance by using the same material as the source and drain electrodes, and electrically connecting the auxiliary electrode and the opposite electrode.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: February 25, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chun-Gi You, Joon-Hoo Choi
  • Patent number: 8638830
    Abstract: A semiconductor light emitting device, including: a heterojunction bipolar light-emitting transistor having a base region between emitter and collector regions; emitter, base, and collector electrodes for coupling electrical signals with the emitter, base, and collector regions, respectively; and a quantum size region in the base region; the base region including a first base sub-region on the emitter side of the quantum size region, and a second base sub-region on the collector side of the quantum size region; and the first and second base sub-regions having asymmetrical band structures.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: January 28, 2014
    Assignees: Quantum Electro Opto Systems Sdn. Bhd., The Board of Trustees of The University of Illinois
    Inventors: Nick Holonyak, Jr., Milton Feng, Gabriel Walter
  • Patent number: 8637855
    Abstract: An organic light emitting device having a light emitting unit that includes an anode layer, a second wire, an insulating layer, first and second organic light emitting layers and a cathode layer is provided. The anode layer includes first and second sub-electrodes and a first wire connecting the first and second sub-electrodes that are arranged in a first direction. The second wire is disposed between the first and second sub-electrodes. The insulating layer is disposed on the first and second sub-electrodes and the second wire, and has a plurality of openings to expose the first sub-electrode, the second sub-electrode and the second wire. The first and second organic light emitting layers are disposed in two openings. The cathode layer is disposed on the first and second organic light emitting layers, and the cathode layer fills another opening to electrically connect to the second wire through the another opening.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: January 28, 2014
    Assignee: Au Optronics Corporation
    Inventors: Chen-Chi Lin, Ting-Kuo Chang, Chieh-Wei Chen
  • Patent number: 8629463
    Abstract: An organic light-emitting display device, formed to be transparent, includes a substrate; a plurality of thin film transistors disposed on the substrate; a passivation layer covering the plurality of thin film transistors; a plurality of pixel electrodes disposed on the passivation layer and connected electrically to the plurality of thin film transistors, and overlapping and covering the plurality of thin film transistors; a first conductive unit disposed on the passivation layer to be disconnected electrically from the pixel electrodes; a pixel defining layer formed on the passivation layer to cover edges of the pixel electrodes; an opposite electrode facing the plurality of pixel electrodes, and covering at least part of the first conductive unit; an organic layer, including an emission layer, disposed between the pixel electrodes and the opposite electrode; and a second conductive unit connected electrically to a portion of the opposite electrode and the first conductive unit.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: January 14, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Jin-Koo Chung
  • Patent number: 8629439
    Abstract: A light emitting device having a high definition, a high aperture ratio and a high reliability is provided. The present invention realizes a high definition and a high aperture ratio for a flat panel display of full colors using luminescent colors of red, green and blue without being dependent upon the film formation method and deposition precision of an organic compound layer by forming the laminated sections 21, 22 by means of intentionally and partially overlapping different organic compound layers of adjacent light emitting elements. Moreover, the protective film 32a containing hydrogen is formed and the drawback in the organic compound layer is terminated with hydrogen, thereby realizing the enhancement of the brightness and the reliability.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: January 14, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masaaki Hiroki, Masakazu Murakami, Hideaki Kuwabara
  • Patent number: 8624107
    Abstract: Novel structures of photovoltaic cells (also known as solar cells) are provided. The Cells are based on the nanometer-scaled wire, tubes, and/or rods, which are made of the electronics materials covering semiconductors, insulator or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells can have also high radiation tolerant capability. These cells will have enormous applications such as in space, in commercial, residential and industrial applications.
    Type: Grant
    Filed: September 30, 2012
    Date of Patent: January 7, 2014
    Assignee: Banpil Photonics, Inc.
    Inventors: Nobuhiko P. Kobayashi, Achyut K. Dutta
  • Patent number: 8624108
    Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The cells are based on nanometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications in space, commercial, residential, and industrial applications.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: January 7, 2014
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut K. Dutta
  • Patent number: 8624249
    Abstract: An organic light emitting display device includes a substrate, a thin film transistor formed on the substrate and including an active layer, a gate electrode including a gate lower electrode and a gate upper electrode, a source electrode, and a drain electrode, an organic light emitting device electrically connected to the thin film transistor, wherein a pixel electrode formed of the same material as at least a part of the gate electrode in the same layer, an intermediate layer including a light emitting layer, and an opposed electrode arranged to face the pixel electrode are sequentially deposited.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: January 7, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: June-Woo Lee, Chun-Gi You, Joon-Hoo Choi
  • Patent number: 8598589
    Abstract: An array substrate is disclosed. In one embodiment, the substrate includes 1) a transistor area in which a transistor is formed, 2) a capacitor area in which a capacitor is formed, wherein the capacitor is electrically connected to the transistor and 3) a light transmittance area adjacent to at least one of the transistor area and the capacitor area. The substrate further includes 1) a first insulating layer formed in at least one of the transistor area and the capacitor area, wherein the first insulating layer is not formed in the light transmittance area and 2) a second insulating layer having i) a first portion arranged to substantially overlap with the first insulating layer in the at least one area, and ii) a second portion formed in the light transmittance area.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: December 3, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Han-Na Ma, Jin-Suk Park
  • Patent number: 8598572
    Abstract: Provided are an electronic device including a bank structure and a method of manufacturing the same. The method of manufacturing the electronic device requires a fewer number of processes and comprises a direct patterning of insulating layers, such as fluorinated organic polymer layers, is possible using cost-efficient techniques such as inkjet printing.
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: December 3, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Arthur Mathea, Joerg Fischer, Marcus Schaedig
  • Patent number: 8592821
    Abstract: It is an object of the present invention to provide an organic transistor having a low drive voltage. It is also another object of the present invention to provide an organic transistor, in which light emission can be obtained, which can be manufactured simply and easily. According to an organic light-emitting transistor, a composite layer containing an organic compound having a hole-transporting property and a metal oxide is used as part of the electrode that injects holes among source and drain electrodes, and a composite layer containing an organic compound having an electron-transporting property and an alkaline metal or an alkaline earth metal is used as part of the electrode that injects electrons, where either composite layer has a structure of being in contact with an organic semiconductor layer.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: November 26, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinobu Furukawa, Ryota Imahayashi
  • Patent number: 8592815
    Abstract: There is provided a light emitting display apparatus including at least a light emitting element and a thin film transistor (TFT) for driving the light emitting element, characterized in that a mechanism is provided in which a semiconductor constituting the TFT is irradiated with at least a part of light whose wavelength is longer than a predetermined wavelength among the light emitted by the light emitting element.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: November 26, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoshinori Tateishi, Masato Ofuji, Hideya Kumomi, Ryo Hayashi
  • Patent number: 8575633
    Abstract: A light emitting diode is disclosed that includes an active region and a plurality of exterior surfaces. A light enhancement feature is present on at least portions of one of the exterior surfaces of the diode, with the light enhancement feature being selected from the group consisting of shaping and texturing. A light enhancement feature is present on at least portions of each of the other exterior surfaces of the diode, with these light enhancement features being selected from the group consisting of shaping, texturing, and reflectors.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: November 5, 2013
    Assignee: Cree, Inc.
    Inventors: Matthew Donofrio, Hua-Shuang Kong, David Slater, Jr., John Edmond
  • Patent number: 8569117
    Abstract: An integrated trench-MOS-controlled-thyristor plus trench gated diode combination, in which the trenches are preferably formed at the same time. A backside polarity reversal process permits a backside p+ region in the thyristor areas, and only a backside n+ region in the diode areas (for an n-type device). This is particularly advantageous in motor control circuits and the like, where the antiparallel diode permits the thyristor to be dropped into existing power MOSFET circuit designs. In power conversion circuits, the antiparallel diode can conveniently serve as a freewheeling diode.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: October 29, 2013
    Assignee: Pakal Technologies LLC
    Inventors: Hidenori Akiyama, Richard A. Blanchard, Woytek Tworzydlo
  • Patent number: 8552447
    Abstract: A semiconductor light-emitting element includes a semiconductor laminated structure including a light-emitting layer sandwiched between first and second conductivity type layers for extracting an emitted light from the light-emitting layer on a side of the second conductivity type layer, a transparent electrode in ohmic contact with the second conductivity type layer, an insulation layer formed on the transparent electrode, an upper electrode for wire bonding formed on the insulation layer, a lower electrode that penetrates the insulation layer, is in ohmic contact with the transparent electrode and the electrode for wire bonding, and has an area smaller than that of the upper electrode in top view, and a reflective portion for reflecting at least a portion of light transmitted through a region of the transparent electrode not in contact with the lower electrode.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: October 8, 2013
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Kosuke Yahata, Takashi Mizobuchi, Takahiro Mori, Masashi Deguchi, Shingo Totani
  • Patent number: 8535963
    Abstract: A method for manufacturing an electronic device comprises a step for forming a coating film (100) on a surface of a conductor portion-containing body (500), a step for forming a photosensitive film (110) on the conductor (500) on which the coating film (100) has been formed, a step for exposing the photosensitive film (110) to a pattern corresponding to a patterned recessed or protruded portion, a step for developing the exposed photosensitive film (110), and a step for baking the developed photosensitive film (110). With this method, an excessive removal of a metal film can be prevented or suppressed.
    Type: Grant
    Filed: March 12, 2012
    Date of Patent: September 17, 2013
    Assignee: TPO Hong Kong Holding Limited
    Inventor: Naoki Sumi
  • Patent number: 8530898
    Abstract: A display device which uses a TFT having a gate electrode film thereof arranged on a light source side can also suppress the increase of parasitic capacitance while suppressing the generation of a light leakage current. On at least one end of the TFT, between a high concentration region which constitutes a source region or a drain region and a channel region, a first low concentration region which is arranged on a high concentration region side and exhibits low impurity concentration and a second low concentration region which exhibits impurity concentration even lower than the impurity concentration of the first low concentration region are provided in this order.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: September 10, 2013
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Takeshi Noda, Takuo Kaitoh
  • Patent number: 8530906
    Abstract: A light emitting device comprising a first common electrode (11; 21), a structured conducting layer (12; 22), forming a set of electrode pads (14; 24a, 24b) electrically isolated from each other, a dielectric layer (13; 23), interposed between the first common electrode layer (11; 21) and the structured conducting layer (12; 22), a second common electrode (15; 30), and a plurality of light emitting elements (16; 20a, 20b), each light emitting element being electrically connected between one of the electrode pads (14; 24a, 24b) and the second common electrode (15; 30), so as to be connected in series with a capacitor (18; 31) comprising one of the electrode pads (14; 24a, 24b), the dielectric layer (13; 23), and the first common electrode (11; 21). When an alternating voltage is applied between the first and second common electrodes, the light emitting elements will be powered through a capacitive coupling, also providing current limitation.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: September 10, 2013
    Assignee: Koninklijke Philips N.V.
    Inventors: Tim Dekker, Adrianus Sempel, Theodorus Johannes Petrus Van Den Biggelaar
  • Patent number: 8525163
    Abstract: An organic EL device 1, for example, excellent in productivity and performance with reduced influence of a voltage drop can be provided at low fabrication cost. The organic EL device 1 includes band-shaped organic EL strips 3 arranged at spacings on a first substrate 2. Each of the organic EL strips 3 includes a second substrate 31, a negative electrode 32b, a positive electrode 32a, and an organic layer 33. The pair of the electrodes 32a and 32b and the organic layer 33 are stacked on the second substrate 2 with the organic layer 33 sandwiched between the electrodes 32a and 32b. The first substrate 2 includes a connection terminal electrode 5 and an auxiliary terminal electrode 6. For example, negative electrode 32b is electrically connected to the connection terminal electrode 5, and the positive electrode 32a is electrically connected to the auxiliary terminal electrode 6.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: September 3, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yoshimasa Fujita
  • Patent number: 8502233
    Abstract: It is an object of the present invention to provide a semiconductor device, in particular, a light emitting element which can be easily manufactured with a wet method. One feature of the invention is a light emitting device including a transistor and a light emitting element. In the light emitting element, an organic layer, a light emitting layer, and a second electrode are sequentially formed over a first electrode, and the transistor is electrically connected to the light emitting element through a wiring. Here, the wiring contains aluminum, carbon, and titanium. The organic layer is formed by a wet method. The first electrode which is in contact with the organic layer is formed from indium tin oxide containing titanium oxide.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto
  • Patent number: 8497512
    Abstract: To prevent a point defect and a line defect in forming a light-emitting device, thereby improving the yield. A light-emitting element and a driver circuit of the light-emitting element, which are provided over different substrates, are electrically connected. That is, a light-emitting element and a driver circuit of the light-emitting element are formed over different substrates first, and then electrically connected. By providing a light-emitting element and a driver circuit of the light-emitting element over different substrates, the step of forming the light-emitting element and the step of forming the driver circuit of the light-emitting element can be performed separately. Therefore, degrees of freedom of each step can be increased, and the process can be flexibly changed. Further, steps (irregularities) on the surface for forming the light-emitting element can be reduced than in the conventional technique.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: July 30, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Osamu Nakamura, Miyuki Higuchi, Yasuko Watanabe, Yasuyuki Arai
  • Patent number: 8492784
    Abstract: A semiconductor device includes: a semiconductor chip including a nitride semiconductor layered structure including a carrier transit layer and a carrier supply layer; a first resin layer on the semiconductor chip, the first resin layer including a coupling agent; a second resin layer on the first resin layer, the second resin layer including a surfactant; and a sealing resin layer to seal the semiconductor chip with the first resin layer and the second resin layer.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: July 23, 2013
    Assignee: Fujitsu Limited
    Inventors: Keishiro Okamoto, Tadahiro Imada, Nobuhiro Imaizumi, Keiji Watanabe
  • Patent number: 8482001
    Abstract: An object of the present invention is to provide a semiconductor device having a novel structure in which in a data storing time, stored data can be stored even when power is not supplied, and there is no limitation on the number of writing. A semiconductor device includes a first transistor including a first source electrode and a first drain electrode; a first channel formation region for which an oxide semiconductor material is used and to which the first source electrode and the first drain electrode are electrically connected; a first gate insulating layer over the first channel formation region; and a first gate electrode over the first gate insulating layer. One of the first source electrode and the first drain electrode of the first transistor and one electrode of a capacitor are electrically connected to each other.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: July 9, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato
  • Patent number: 8482013
    Abstract: A light having a plurality of LEDs and a switching substrate is disclosed. The switching substrate is coupled to LEDs and includes a plurality of switches that provide a plurality of configurations for the LEDs. Each configuration is characterized by a two-dimensional array of LEDs having a minimum bias potential and a maximum bias potential, the LED array generating light when a bias potential is provided between the power terminals that is greater than the minimum bias potential, at least two configurations being operable to provide light at bias potential within this range. The switching substrate is sub-dividable into a plurality of identical multi-LED light sources by dividing the switching substrate along predetermined lines. The array of LEDs can be organized as a nested array of LEDs. The switches can be implemented as passive switches that are set by removing portions of conductors or bridging gaps in conductors.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: July 9, 2013
    Assignee: Bridgelux, Inc.
    Inventors: Yan Chai, Calvin B. Ward
  • Patent number: 8471254
    Abstract: A laminate structure and method of manufacture, such as a processed silicon wafer with an overlying layer or cover, includes a first layer or substrate which has a generally-planar region and a peripheral contoured region with falloff from a planar region of the first layer, and a second layer which overlies the first layer and is spaced from the planar region of the first layer a uniform distance by a plurality of uniform spacers, and peripheral spacers located in the peripheral contoured region which extend from the first layer to the second layer to maintain the second layer in the same plane as it extends over the falloff of the peripheral contoured region of the first layer to increase the useable area of the laminate structure. Spherical, deformable and fixed dimension spacers are used.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: June 25, 2013
    Assignee: Hana Microdisplay Technologies, Inc.
    Inventor: Dean Eshleman
  • Patent number: 8461605
    Abstract: The invention provides a light emitting device which uses a color conversion layer, with high light emission efficiency and a low driving voltage. The light emitting device includes a light emitting element having a pair of electrodes and a layer containing an organic compound sandwiched between the pair of electrodes, and a color conversion layer which absorbs light emitted from the light emitting element and emits light with a longer wavelength than a wavelength of the absorbed light. A portion of the layer containing an organic compound includes a buffer layer containing a composite material including an organic compound having a hole transporting property and a metal compound. The thickness of the buffer layer is determined so that the light emission efficiency becomes high.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: June 11, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tomoe Matsubara
  • Patent number: 8455886
    Abstract: A light emitting device is constituted by flip-chip mounting a GaN-based LED chip. The GaN-based LED chip includes a light-transmissive substrate and a GaN-based semiconductor layer formed on the light-transmissive substrate, wherein the GaN-based semiconductor layer has a laminate structure containing an n-type layer, a light emitting layer and a p-type layer in this order from the light-transmissive substrate side, wherein a positive electrode is formed on the p-type layer, the electrode containing a light-transmissive electrode of an oxide semiconductor and a positive contact electrode electrically connected to the light-transmissive electrode, and the area of the positive contact electrode is half or less of the area of the upper surface of the p-type layer.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: June 4, 2013
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Takahide Joichi, Hiroaki Okagawa, Shin Hiraoka, Toshihiko Shima, Hirokazu Taniguchi
  • Patent number: 8450741
    Abstract: In the case where a material containing an alkaline-earth metal in a cathode, is used, there is a fear of the diffusion of an impurity ion (such as alkaline-earth metal ion) from the EL element to the TFT being generated and causing the variation of characteristics of the TFT. Therefore, as the insulating film provided between TFT and EL element, a film containing a material for not only blocking the diffusion of an impurity ion such as an alkaline-earth metal ion but also aggressively absorbing an impurity ion such as an alkaline-earth metal ion is used.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: May 28, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Murakami, Mitsuhiro Ichijo, Taketomi Asami
  • Patent number: 8426226
    Abstract: A method for fabricating an integrated AC LED module comprises steps: forming a junction layer on a substrate, and defining a first growth area and a second growth area on the junction layer; respectively growing a Schottky diode and a LED on the first growth area and the second growth area; forming a passivation layer and a metallic layer on the Schottky diode, the LED and the substrate. Thereby, the Schottky diode is electrically connected with the LED via the metallic layer. Thus is promoted the reliability of electric connection of diodes, reduced the layout area of the module, and decreased the fabrication cost.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: April 23, 2013
    Assignee: National Central University
    Inventors: Jen-Inn Chyi, Geng-Yen Lee, Wei-Sheng Lin
  • Patent number: 8426874
    Abstract: A main object of the present invention is to provide a static induction light emitting transistor having an organic EL element structure and a vertical FET structure which is possible to avoid a problem of the shielding of light and a problem of shielding of electric field by a gate electrode. The above object is achieved by providing a light emitting transistor 11 of a vertical FET structure comprising: on a substrate 12; a source electrode 13; a hole transporting layer 14 in which a slit-shaped gate electrode 15 is embedded; an equipotential layer 16; light emitting layer 17; and a transparent or semitransparent drain electrode 18, provided in this order. In this light emitting transistor, the drain electrode 18 provided on the opposite side of the gate electrode 15, viewing from the light emitting layer 17, is transparent or semitransparent. Therefore, light generated in the light emitting layer 17 can be taken out from the drain electrode side.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: April 23, 2013
    Assignees: Dai Nippon Printing Co., Ltd.
    Inventors: Junji Kido, Daigo Aoki
  • Patent number: 8410523
    Abstract: Exemplary embodiments provide high-quality layered semiconductor devices and methods for their fabrication. The high-quality layered semiconductor device can be formed in planar with low defect densities and with strain relieved through a plurality of arrays of misfit dislocations formed at the interface of highly lattice-mismatched layers of the device. The high-quality layered semiconductor device can be formed using various materials systems and can be incorporated into various opto-electronic and electronic devices. In an exemplary embodiment, an emitter device can include monolithic quantum well (QW) lasers directly disposed on a SOI or silicon substrate for waveguide coupled integration. In another exemplary embodiment, a superlattice (SL) photodetector and its focal plane array can include a III-Sb active region formed over a large GaAs substrate using SLS technologies.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: April 2, 2013
    Inventors: Diana L. Huffaker, Larry R. Dawson, Ganesh Balakrishnan
  • Patent number: 8410493
    Abstract: A semiconductor device sends and receives electrical signals. The semiconductor device includes a first substrate provided with a first circuit region containing a first circuit; a multi-level interconnect structure provided on the first substrate; a first inductor provided in the multi-level interconnect structure so as to include the first circuit region; and a second inductor provided in the multi-level interconnect structure so as to include the first circuit region, wherein one of the first inductor and the second inductor is connected to the first circuit and the other of the first inductor and the second inductor is connected to a second circuit.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: April 2, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Yasutaka Nakashiba