Light Coupled Transistor Structure Patents (Class 257/83)
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Patent number: 7335911Abstract: By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer.Type: GrantFiled: May 18, 2004Date of Patent: February 26, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hideomi Suzawa, Koji Ono, Yasuyuki Arai
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Patent number: 7335914Abstract: Each pixel of a display includes a first thin film transistor whose source is connected to a first power supply terminal, a second thin film transistor which is different in conduction type from the first thin film transistor and whose source and drain are connected to the drain of the first thin film transistor and the first power supply terminal, respectively, an output control switch, and a display element connected in series with the output control switch between a second power supply terminal and the drain of the first thin film transistor.Type: GrantFiled: December 21, 2005Date of Patent: February 26, 2008Assignee: Toshiba Matsushita Display Technology Co., Ltd.Inventor: Makoto Shibusawa
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Patent number: 7335919Abstract: Provided is an active matrix organic electroluminescent (EL) display device including an organic thin film transistor (TFT), preferably n-type, having a higher aperture ratio and easily realized in an array structure. The display device includes a facing electrode; an intermediate layer including at least a light emitting layer on the facing electrode; a pixel electrode formed on the intermediate layer; a first electrode located on the pixel electrode and insulated from the pixel electrode; a second electrode located on the pixel electrode and coupled with the pixel electrode; an n-type organic semiconductor layer contacting the first electrode and the second electrode; and a first gate electrode located on the n-type organic semiconductor layer and insulated from the first electrode, the second electrode, and the n-type organic semiconductor layer.Type: GrantFiled: June 22, 2005Date of Patent: February 26, 2008Assignee: Samsung SDI Co., Ltd.Inventors: Jae-Bon Koo, Min-Chul Suh
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Patent number: 7332745Abstract: A flat panel display device is disclosed that may include a light-emitting layer portion including a first electrode, a second electrode, and an organic light-emitting layer between the first and second electrodes; at least two thin film transistors for controlling the light-emitting layer portion; a scanning signal line for supplying a scanning signal to the thin film transistor; a data signal line for supplying a data signal to the thin film transistor; a light emitting region having a common power supply line for supplying current to the light-emitting layer portion; and a peripheral common power supply line having at least one curved portion and connected to the common power supply line on a panel of a non-light emitting region except the light emitting region, wherein the common power supply line has a reduced wiring width while maintaining a constant wiring resistance to thereby reduce the total size of the display panel.Type: GrantFiled: October 25, 2004Date of Patent: February 19, 2008Assignee: Samsung SDI Co., Ltd.Inventors: Tae-Wook Kang, Choong-Youl Im
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Patent number: 7332742Abstract: The invention provides a display device in which occurrence of a display defect called a ghost is prevented, and a driving method thereof, and a television set. According to the invention, a gate control signal (GWE) which has been one signal is divided into a first gate control signal (GWE1) and a second gate control signal (GWE2), or a pulse-width control signal (PWC) is used in addition to one gate control signal (GWE) which has been used, thereby preventing a period for outputting a video signal to a pixel by a source driver and a period for selecting a gate line by an erasing gate driver from overlapping each other. Then, video signal writing to a pixel where an erasing operation is performed is prevented, so that occurrence of the display defect called a ghost is prevented.Type: GrantFiled: June 28, 2005Date of Patent: February 19, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiroyuki Miyake, Ryota Fukumoto
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Patent number: 7329942Abstract: An array-type modularized light-emitting diode structure and a method for packaging the structure. The array-type modularized light-emitting diode structure includes a lower substrate and an upper substrate fixed on the lower substrate. A material with high heat conductivity is selected as the material of the upper substrate. The upper substrate is formed with multiple arrayed dents and through holes on the bottom of each dent. A material with high heat conductivity is selected as the material of the lower substrate. The surface of the lower substrate is formed with a predetermined circuit layout card. The bottom face of the upper substrate is placed on the upper face of the lower substrate with the through holes of the dents respectively corresponding to the contact electrodes of the circuit layout card of the lower substrate. Multiple light-emitting diode crystallites are respectively fixed on the bottoms of the dents.Type: GrantFiled: May 18, 2005Date of Patent: February 12, 2008Inventors: Ching-Fu Tsou, I-Ju Chen, Yeh-Chin Chao
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Patent number: 7323720Abstract: A light-emitting device includes a substrate having a plurality of light-emitting elements and a light emission region arranged on one surface thereof, light being emitted from one surface of the light emission region; and an integrated circuit chip that generates signals for controlling the plurality of light-emitting elements. The integrated circuit chip is connected to the substrate so as to overlap a portion of or the entire light emission region, as viewed from the other surface of the substrate.Type: GrantFiled: February 6, 2006Date of Patent: January 29, 2008Assignee: Seiko Epson CorporationInventors: Takehiko Kubota, Shinsuke Fujikawa
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Publication number: 20080006834Abstract: A panel substrate includes a first mother substrate having a plurality of array substrates and a second mother substrate having a plurality of opposing substrates opposing to the array substrates. The panel substrate has a seal material for bonding the array substrates and the opposing substrates and a display material provided in a display material filled area. The first mother substrate has a line provided to the first mother substrate and an input terminal formed outside a display material filled area. The hydrophobic film is formed over the second mother substrate and placed in an opposing area having the input terminal facing the opposing substrate.Type: ApplicationFiled: June 20, 2007Publication date: January 10, 2008Applicant: MITSUBISHI ELECTRIC CORPORATIONInventor: Yasuo Fujita
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Patent number: 7315047Abstract: A light-emitting device is disclosed capable of reducing the variation of an emission spectrum depending on an angle of viewing a light extraction surface. More particularly, a light-emitting device is disclosed capable of preventing impurities from dispersing from a light-emitting element into a thin film transistor as well as reducing the variation of an emission spectrum depending on an angle of viewing a light extraction surface. The disclosed light-emitting device comprises a substrate; a first insulating layer provided over the substrate; a transistor provided over the first insulating layer; and a second insulating layer having a first opening portion so that the transistor is covered and the substrate is exposed; wherein a light-emitting element is provided inside the first opening portion.Type: GrantFiled: January 25, 2005Date of Patent: January 1, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takahiro Kawakami, Kaoru Tsuchiya, Takeshi Nishi, Yoshiharu Hirakata, Keiko Kida, Ayumi Sato, Shunpei Yamazaki
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Patent number: 7309878Abstract: Dense, massively parallel signal processing electronics are co-packaged behind associated sensor pixels. Microchips containing a linear or bilinear arrangement of photo-sensors, together with associated complex electronics, are integrated into a simple 3-D structure (a “mirror cube”). An array of photo-sensitive cells are disposed on a stacked CMOS chip's surface at a 45° angle from light reflecting mirror surfaces formed on a neighboring CMOS chip surface. Image processing electronics are held within the stacked CMOS chip layers. Electrical connections couple each of said stacked CMOS chip layers and a distribution grid, the connections for distributing power and signals to components associated with each stacked CSMO chip layer.Type: GrantFiled: July 26, 2004Date of Patent: December 18, 2007Assignee: U.S. Department of EnergyInventors: Kris Kwiatkowski, James Lyke
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Patent number: 7307285Abstract: An optical semiconductor device includes a first set of lead frames having a first set of element mounting beds, a second set of lead frames having a second set of element mounting beds, which are arranged substantially on a same plane as the first set of element mounting beds. A light-emitting element is mounted on one of the first set of element mounting beds and having a pair of electrodes connected to the first set of lead frames respectively. A light-receiving element is arranged at a position facing to the light-emitting element and having a pair of electrodes connected to the second set of lead frames respectively. A supporting means is mounted on the second set of element mounting beds for supporting the light-receiving element at the position facing to the light-emitting element and for receiving a light emitted from the light-emitting element.Type: GrantFiled: December 22, 2006Date of Patent: December 11, 2007Assignee: Kabushiki Kaisha ToshibaInventor: Yoshio Noguchi
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Publication number: 20070278493Abstract: An object is to provide a light-emitting element having high light extraction efficiency. Further, an object is to provide a light-emitting element and a display device having high luminance and low power consumption. A light-emitting element of the present invention includes a light-emitting layer interposed between a first and second electrodes. The light-emitting element further includes at least a dielectric layer which is interposed between the first and light-emitting layer, and light-scattering fine particles are dispersed in the dielectric layer. Light emitted from the light-emitting layer is extracted to the outside through the first electrode.Type: ApplicationFiled: May 17, 2007Publication date: December 6, 2007Inventor: Yosuke Sato
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Patent number: 7301170Abstract: The present invention provides a TFT array panel and a manufacturing method of the same, which has signal lines including a lower layer of an Al containing metal and an upper layer of a molybdenum alloy (Mo-alloy) comprising molybdenum (Mo) and at least one of niobium (Nb), vanadium (V), and titanium (Ti). Accordingly, undercut, overhang, and mouse bites which may arise in an etching process, are prevented, and TFT array panels that have signal lines having low resistivity and good contact characteristics are provided.Type: GrantFiled: July 12, 2005Date of Patent: November 27, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Beom-Seok Cho, Yang-Ho Bae, Je-Hun Lee, Chang-Oh Jeong
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Patent number: 7301171Abstract: The invention provides a display device and an electronic device, each of which has one of a structure in which a substrate provided with a light emitting element which performs bottom light emission and a substrate provided with a light emitting element which performs top light emission are attached, and a structure in which two substrates, each of which is provided with a light emitting element which performs bottom light emission are attached. By attaching two substrates, each of which is provided with a light emitting element, displays are provided on the front and back of the display device, thus a high added value can be realized. One of the two substrates, each of which is provided with a light emitting element also functions as a sealing substrate for another substrate, thus a compact, thin, and lightweight display device can be obtained.Type: GrantFiled: November 17, 2005Date of Patent: November 27, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Mitsuaki Osame, Aya Anzai, Jun Koyama, Yasuko Watanabe, Shunpei Yamazaki
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Patent number: 7288788Abstract: A novel Active Pixel Sensor (APS) cell structure and method of manufacture. Particularly, an image sensor APS cell having a predoped transfer gate is formed that avoids the variations of Vt as a result of subsequent manufacturing steps. According to the preferred embodiment of the invention, the image sensor APS cell structure includes a doped p-type pinning layer and an n-type doped gate. There is additionally provided a method of forming the image sensor APS cell having a predoped transfer gate and a doped pinning layer. The predoped transfer gate prevents part of the gate from becoming p-type doped.Type: GrantFiled: December 3, 2004Date of Patent: October 30, 2007Assignee: International Business Machines CorporationInventors: John Ellis-Monaghan, Jeffrey B. Johnson, Alain Loiseau
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Patent number: 7288794Abstract: An improved integrated optical device (5a-5g) is disclosed containing first and second devices (10a-10g; 15a, 15e), optically coupled to each other and formed in first and second different material systems. One of the first or second devices (10a-10g, 15a, 15e) has a Quantum Well Intermixed (QWI) region (20a, 20g) at or adjacent a coupling region between the first and second devices (10a-10g; 15a, 15e). The first material system may be a III-V semiconductor based on Gallium Arsenide (GaAs) or Indium Phosphide (InP), while the second material may be Silica (SiO2), Silicon (Si), Lithium Niobate (LiNbO3), a polymer, or glass.Type: GrantFiled: January 31, 2001Date of Patent: October 30, 2007Assignee: The University Court of the University of GlasgowInventors: John Haig Marsh, Simon Eric Hicks, James Stewart Aitchison, Stewart Duncan McDougall, Bo Cang Qiu
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Patent number: 7274039Abstract: A method of fabricating a substrate for an organic electroluminescent display device includes forming a first electrode on a substrate in a pixel region and a non-pixel region, the first electrode including a first conductive material, forming an auxiliary electrode on the first electrode in the non-pixel region, the auxiliary electrode including a second conductive material and contacting the first electrode, the first and second conductive materials being different from one another, forming a bank corresponding to the auxiliary electrode, the bank surrounding the pixel region, forming an organic electroluminescent layer on the first electrode, the organic electroluminescent layer in the pixel region surrounded by the bank, and forming a second electrode on the organic electroluminescent layer, the second electrode corresponding to the organic electroluminescent layer.Type: GrantFiled: December 28, 2004Date of Patent: September 25, 2007Assignee: LG.Philips LCD Co., Ltd.Inventor: Jae-Yong Park
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Patent number: 7271099Abstract: A method of forming a conductive pattern on a substrate. The method comprising providing a substrate carrying a conductive layer; forming a first portion of the conductive pattern by exposing the conductive layer to a laser and controlling the laser to remove conductive material around the edge(s) of desired conductive region(s) of the first portion; and laying down an etch resistant material on the conductive layer, the etch resistant material defining a second portion of the conductive pattern, removing conductive material from those areas of the second portion not covered by the etch resistant material, and then removing the etch resistant material.Type: GrantFiled: June 6, 2005Date of Patent: September 18, 2007Assignee: FFEI LimitedInventors: Nigel Ingram Bromley, Martin Philip Gouch, Christoph Bittner
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Patent number: 7268369Abstract: A functional device including on a substrate a first electrode layer, a second electrode layer opposed to the first electrode layer, a functional layer disposed between the first electrode layer and the second electrode layer and a wiring for applying a potential to the first electrode layer or the second electrode layer, wherein there are provided a first insulating layer formed on the second electrode layer in such an arrangement that the side wall of the functional layer is covered and a contact hole formed in the first insulating layer extending to the second electrode layer in which the wiring for connecting the second electrode layer is provided.Type: GrantFiled: July 6, 2005Date of Patent: September 11, 2007Assignee: Fujifilm CorporationInventor: Yasushi Araki
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Patent number: 7265391Abstract: To provide a light emitting device high in reliability with a pixel portion having high definition with a large screen. According to a light emitting device of the present invention, on an insulator (24) provided between pixel electrodes, an auxiliary electrode (21) made of a metal film is formed, whereby a conductive layer (20) made of a transparent conductive film in contact with the auxiliary electrode can be made low in resistance and thin. Also, the auxiliary electrode (21) is used to achieve connection with an electrode on a lower layer, whereby the electrode can be led out with the transparent conductive film formed on an EL layer. Further, a protective film (32) made of a film containing hydrogen and a silicon nitride film which are laminated is formed, whereby high reliability can be achieved.Type: GrantFiled: August 16, 2004Date of Patent: September 4, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masaaki Hiroki, Masakazu Murakami, Hideaki Kuwabara
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Patent number: 7262445Abstract: In a charge transfer device which has many two-layered transfer electrodes, 8L disposed along a charge transfer direction X above a transfer channel is driven with two-phase driving pulses supplied to the transfer electrodes of the second layer, the transfer channel below the last-stage transfer electrode disposed at the last stage of the charge transfer direction X is constructed to have three-step potential, and the potential is set to be stepwise deeper from the upstream side to the downstream side in the charge transfer direction X.Type: GrantFiled: October 27, 2004Date of Patent: August 28, 2007Assignee: Sony CorporationInventor: Naoki Nishi
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Patent number: 7250634Abstract: Light-emitting devices capable of preventing separation or alteration of a first electrode to obtain high performance, methods of manufacturing the light-emitting device, and display units are provided. A first electrode as an anode, an insulating film, an organic layer including a light-emitting layer, and a second electrode as a cathode are laminated in this order on a substrate with a planarizing layer as a base layer in between. The first electrode has a structure in which an adhesive layer, a reflective layer and a barrier layer is laminated in this order from the substrate. Alteration of the reflective layer can be prevented by the barrier layer, and the reflective layer can be prevented from being separated from the planarizing layer by the adhesive layer. The first electrode is formed through forming the adhesive layer, the reflective layer and the barrier layer on the planarizing layer, and then patterning them in order from the barrier layer.Type: GrantFiled: March 19, 2004Date of Patent: July 31, 2007Assignee: Sony CorporationInventors: Seiichi Yokoyama, Koji Hanawa, Takanori Shibasaki, Takashi Hirano
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Patent number: 7244962Abstract: Subjected to obtain a crystalline TFT which simultaneously prevents increase of OFF current and deterioration of ON current. A gate electrode of a crystalline TFT is comprised of a first gate electrode and a second gate electrode formed in contact with the first gate electrode and a gate insulating film. LDD region is formed by using the first gate electrode as a mask, and a source region and a drain region are formed by using the second gate electrode as a mask. By removing a portion of the second gate electrode, a structure in which a region where LDD region and the second gate electrode overlap with a gate insulating film interposed therebetween, and a region where LDD region and the second gate electrode do not overlap, is obtained.Type: GrantFiled: October 26, 2004Date of Patent: July 17, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Setsuo Nakajima, Hisashi Ohtani, Shunpei Yamazaki
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Patent number: 7230324Abstract: As external connection terminals for an emitter electrode (12) of an IGBT chip, a first emitter terminal (151) for electrically connecting a light emitter in a strobe light control circuit to the emitter electrode (12) and a second emitter terminal (152) for connecting a drive circuit for driving an IGBT device to the emitter electrode (12) are provided. The first emitter terminal (151) and the second emitter terminal (152) are individually connected to the emitter terminal (12) by wire bonding.Type: GrantFiled: March 3, 2005Date of Patent: June 12, 2007Assignee: Renesas Technology Corp.Inventor: Makoto Kawano
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Patent number: 7230271Abstract: A light emitting element having an organic compound, which can be extended its longevity is provided. According to the present invention, there is provided a constitution in which, in order to protect a light emitting element from moisture, an inorganic insulating film 312a, a stress relaxation layer 312b having transparency and a hygroscopic property, and an inorganic insulating film 312c are repeatedly laminated over a cathode. The stress relaxation layer 312b having transparency and the hygroscopic property uses at least one film selected from the group consisting of a film comprising a same material as that of a layer 310, containing an organic compound, sandwiched between a cathode and an anode, a layer capable of being formed by vapor deposition, and a layer capable of being formed by coating.Type: GrantFiled: August 8, 2003Date of Patent: June 12, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama
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Patent number: 7227185Abstract: A thin film transistor (TFT) liquid crystal display (LCD) panel, its array substrate, and its manufacturing method. Color filters are integrated on the TFT array, and color filter stacks are formed on the thin film transistors to replace a black matrix, thereby reducing manufacturing time and costs. The color filter stacks can be placed at the border of the display area of the panel to reduce light leakage. The border of the display area has a liquid crystal injection hole. To allow the size of the liquid crystal injection hole to be increased, and to reduce the light leakage at the hole, color filter blocks and overlapping metal layers can be used at the border of the display area. The color filter stacks and other dielectric layers need to be away from the welding points of repair structures to prevent dielectric layer bursts during a repair process. Storage capacitors can use the feature described above so that the color filters are positioned away from the overlapping portions.Type: GrantFiled: July 21, 2004Date of Patent: June 5, 2007Assignee: Chi Mei Optoelectronics CorporationInventor: Lih-Nian Lin
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Patent number: 7217955Abstract: A semiconductor laser device includes a one-body submount composed of a predetermined material such as SiC or AlN and placed on a mounting surface. A laser diode is placed on a front portion of an upper surface of the submount. A monitoring photodiode composed of crystalline silicon is stacked on a portion of the upper surface of the submount backward from the laser diode.Type: GrantFiled: October 20, 2004Date of Patent: May 15, 2007Assignee: Sharp Kabushiki KaishaInventors: Osamu Hamaoka, Hiroshi Nakatsu, Hideki Ichikawa
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Patent number: 7218826Abstract: A standard CMOS process is used to fabricate optical, optoelectronic and electronic devices at the same time on a monolithic integrated circuit. FIG. 12 shows an active waveguide formed by a standard CMOS process on a five layer substrate. The waveguide is a silicon strip loaded waveguide with a three layer core made of a silicon strip on a silicon slab with a silicon dioxide layer between the strip and slab. The active waveguide has two doped regions in the silicon slab adjacent to and on either side of the waveguide. FIG. 12A is a table summarizing the elements of the waveguide of FIG. 12 and the CMOS transistors of FIGS. 1 and 2, which are formed from the same materials at the same time on the same silicon substrate. In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors.Type: GrantFiled: August 29, 2005Date of Patent: May 15, 2007Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier, Bing Li
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Patent number: 7214971Abstract: A semiconductor light-receiving device has a substrate including upper, middle and lower regions in its front side. A p-type layer on the lower region has a top surface including a portion on a level with the middle region. An electrode covers at least part of the boundary between the portion of the p-type layer and the middle region. An n-type layer on the p-type layer has a top surface including a portion on a level with the upper region. Another electrode covers at least part of the boundary between the portion of the n-type layer and the upper region.Type: GrantFiled: June 10, 2004Date of Patent: May 8, 2007Assignee: Hamamatsu Photonics K.K.Inventors: Minoru Niigaki, Kazutoshi Nakajima
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Patent number: 7211830Abstract: This disclosure concerns systems and devices configured to implement impedance matching schemes in a high speed data transmission environment. In one example, an optoelectronic assembly is provided that includes a TO package having a base through which one or more leads pass. The leads are electrically coupled to an optoelectronic device in the TO package, and are electrically isolated from the base. Some or all of the leads include a ground ring that is electrically isolated from the lead and electrically coupled with the base. A circuit interconnect is also included that is electrically coupled to the optoelectronic device and the TO package. The circuit interconnect includes a dielectric substrate having signal traces that are electrically coupled to the signal leads. A ground signal conductor disposed on the dielectric substrate is electrically coupled with the ground rings.Type: GrantFiled: January 6, 2005Date of Patent: May 1, 2007Assignee: Finisar CorporationInventors: Paul K. Rosenberg, Daniel K. Case, Jan Lipson, Rudolf J. Hofmeister, The′ Linh Nguyen
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Patent number: 7202498Abstract: A thin film transistor array panel is provided, which includes: a gate line formed on an insulating substrate; a gate insulating layer on the gate line; a semiconductor layer on the gate insulating layer; a data line formed on the gate insulating layer; a drain electrode formed at least in part on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode; a color filter formed on the data line and the drain electrode; a second passivation layer formed on the color filter; and a pixel electrode formed on the color filter, connected to the drain electrode, overlapping the second passivation layer, and enclosed by the second passivation layer.Type: GrantFiled: April 2, 2004Date of Patent: April 10, 2007Assignee: Samsung Electronics Co., Ltd.Inventor: Dong-Gyu Kim
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Patent number: 7187020Abstract: A solid-state imaging device of a three-transistor pixel configuration having no selection transistor has a problem of a non-selection hot carrier white point, which is specific to this apparatus. A bias current during a non-reading period of pixels is made to flow to a pixel associated with an immediately previous selection pixel, for example, the immediately previous selection pixel itself. As a result, dark current only for one line occurs in each pixel, and the dark current for one line itself can be reduced markedly. Consequently, defective pixels due to non-selection hot carrier white points can be virtually eliminated.Type: GrantFiled: May 13, 2004Date of Patent: March 6, 2007Assignee: Sony CorporationInventor: Keiji Mabuchi
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Patent number: 7187813Abstract: An optical transistor is disclosed. An apparatus according to aspects of the present invention includes optical waveguide disposed in semiconductor material. A diode structure is disposed in the optical waveguide. The diode structure includes P and N regions. An electrical switch coupled to the P region and the N region of the diode structure. The electrical switch is coupled to switchably short circuit the P and N regions of the diode structure together.Type: GrantFiled: January 20, 2005Date of Patent: March 6, 2007Assignee: Intel CorporationInventor: Richard Jones
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Patent number: 7173281Abstract: There is provided a high quality liquid crystal panel having a thickness with high accuracy, which is designed, without using a particulate spacer, within a free range in accordance with characteristics of a used liquid crystal and a driving method, and is also provided a method of fabricating the same. The shape of a spacer for keeping a substrate interval constant is made such that it is a columnar shape, a radius R of curvature is 2 ?m or less, a height H is 0.5 ?m to 10 ?m, a diameter is 20 ?m or less, and an angle ? is 65° to 115°. By doing so, it is possible to prevent the lowering of an opening rate and the lowering of light leakage due to orientation disturbance.Type: GrantFiled: October 27, 2003Date of Patent: February 6, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshiharu Hirakata, Yuugo Goto, Yuko Kobayashi, Shunpei Yamazaki
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Patent number: 7170099Abstract: An optical semiconductor device includes a first set of lead frames having a first set of element mounting beds, a second set of lead frames having a second set of element mounting beds, which are arranged substantially on a same plane as the first set of element mounting beds. A light-emitting element is mounted on one of the first set of element mounting beds and having a pair of electrodes connected to the first set of lead frames respectively. A light-receiving element is arranged at a position facing to the light-emitting element and having a pair of electrodes connected to the second set of lead frames respectively. A supporting means is mounted on the second set of element mounting beds for supporting the light-receiving element at the position facing to the light-emitting element and for receiving a light emitted from the light-emitting element.Type: GrantFiled: March 31, 2005Date of Patent: January 30, 2007Assignee: Kabushiki Kaisha ToshibaInventor: Yoshio Noguchi
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Patent number: 7167498Abstract: A semiconductor electrooptic monolithic component comprising successively a first section capable of emitting light at a first wavelength and including a first active layer, a second section capable of absorbing light at the said first wavelength and including a second active layer, and a third section capable of detecting light at a second wavelength and including a third active layer. The component is characterized in that the second active layer is designed to ensure in the said second section an absorption higher than that which would be allowed by an active layer identical to the said first layer.Type: GrantFiled: May 14, 2004Date of Patent: January 23, 2007Assignee: Avanex CorporationInventors: Franck Mallecot, Christine Chaumont, Joël Jacquet, Arnaud Leroy, Antonina Plais, Joe Harari, Didier Decoster
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Patent number: 7164155Abstract: A light emitting device having a plastic substrate is capable of preventing the substrate from deterioration with the transmission of oxygen or moisture content can be obtained. The light emitting device has light emitting elements formed between a lamination layer and an inorganic compound layer that transmits visual light, where the lamination layer is constructed of one unit or two or more units, and each unit is a laminated structure of a metal layer and an organic compound layer. Alternatively, the light emitting device has light emitting elements formed between a lamination layer and an inorganic compound layer that transmits visual light, where the lamination layer is constructed of one unit or two or more units, and each unit is a laminated structure of a metal layer and an organic compound layer, wherein the inorganic compound layer is formed so as to cover the end face of the lamination layer.Type: GrantFiled: May 1, 2003Date of Patent: January 16, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai
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Patent number: 7157741Abstract: A silicon optoelectronic device and an optical transceiver, wherein the silicon optoelectronic device includes an n- or p-type silicon-based substrate and a doped region formed in a first surface of the substrate and doped to an opposite type from that of the substrate. The doped region provides photoelectrical conversion. The silicon optoelectronic device includes a light-emitting device section and a light-receiving device section. These sections use the doped region in common and are formed in the first surface of the substrate. The silicon optoelectronic device has an internal amplifying circuit, can selectively perform emission and detection of light, and can control the duration of emission and detection of light.Type: GrantFiled: February 25, 2004Date of Patent: January 2, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Jun-young Kim, Byoung-lyong Choi, Eun-kyung Lee
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Patent number: 7154136Abstract: Regions of an integrated circuit are isolated by a structure that includes at least one isolating trench on the periphery of an active area. The trench is deep, extending at least about 0.5 ?m into the substrate. The isolating structure prevents photons and electrons originating in peripheral circuitry from reaching the active area. Where the substrate has a heavily-doped lower layer and an upper layer on it, the trench can extend through the upper layer to the lower layer. A thermal oxide can be grown on the trench walls. A liner can also be deposited on the sidewalls of each trench. A fill material having a high-extinction coefficient is then deposited over the liner. The liner can also be light absorbent so that both the liner and fill material block photons.Type: GrantFiled: February 20, 2004Date of Patent: December 26, 2006Assignee: Micron Technology, Inc.Inventors: Bryan G. Cole, Troy Sorensen
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Patent number: 7148515Abstract: A LED-based light emitting device having integrated rectifier circuit driven directly by an AC voltage and a related fabrication method is provided herein. The light emitting mainly contains a lower substrate and an upper substrate. The lower substrate has a built-in rectifier circuit and appropriate electrical contacts of the rectifier circuit are exposed on the top surface of the lower substrate. The upper substrate contains multiple LEDs arranged in an N×M array and the LEDs are all electrically insulated from each other. Metallic plating techniques are applied to establish electrical connection between these LEDs so that they jointly form a circuit matching the rectifier circuit on the lower substrate. The two substrates are faced towards each other and metallic bumps are applied to connect the LED circuit on the upper substrate to the rectifier circuit on the lower substrate, completing a fully function light emitting device.Type: GrantFiled: January 7, 2006Date of Patent: December 12, 2006Assignee: Tyntek Corp.Inventors: Kuo-Jui Huang, Wen-Long Chou, Chia-Pin Sung
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Patent number: 7132693Abstract: Failure light emission of an EL element due to failure film formation of an organic EL material in an electrode hole 46 is improved. By forming the organic EL material after embedding an insulator in an electrode hole 46 on a pixel electrode and forming a protective portion 41b, failure film formation in the electrode hole 46 can be prevented. This can prevent concentration of electric current due to a short circuit between a cathode and an anode of the EL element, and can prevent failure light emission of an EL layer.Type: GrantFiled: August 30, 2004Date of Patent: November 7, 2006Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshimitsu Konuma, Junya Maruyama
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Patent number: 7132694Abstract: An electro-optical device includes a pair of substrates including a first substrate and a second substrate, an electro-optical material sandwiched between the pair of substrates, a shading film having a predetermined pattern which is at least partially embedded in the first substrate at the surface facing the electro-optical material, display electrodes which are placed on the second substrate at the surface facing the electro-optical material, and lines connected to the display electrodes directly or through switching elements. In accordance with the electro-optical device having such a shading film, it is possible to reduce or prevent coating defects in an alignment layer, nonuniform rubbing treatment to the alignment layer, and cracking of a counter electrode due to the steps in the upper layers resulting from the formation of the shading film.Type: GrantFiled: August 27, 2004Date of Patent: November 7, 2006Assignee: Seiko Epson CorporationInventor: Hiroaki Mochizuki
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Patent number: 7112462Abstract: The present invention relates to a semiconductor device formed in a self-light-emitting apparatus having a substrate and a plurality of self-light-emitting elements formed on the substrate, the semiconductor device being used to drive one of the self-light-emitting elements. The semiconductor device includes an active layer of semiconductor material, in which a source region and a drain region are formed, a source electrode having a multi-layered structure including an upper side layer of titanium nitride and a lower side layer of a high melting point metal having low resistance, the source electrode electrically being coupled to the source region, a drain electrode having a multi-layered structure including an upper side layer of titan nitride and a lower side layer of a high melting point metal having low resistance, the source electrode electrically being coupled to said drain region, an insulation layer formed on the active layer, and a gate electrode formed on the insulation layer.Type: GrantFiled: August 7, 2002Date of Patent: September 26, 2006Assignees: TDK Corporation, Semiconductor Energy Laboratory Co., Ltd.Inventors: Michio Arai, Yukio Yamauchi
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Patent number: 7112823Abstract: The invention provides an organic electroluminescent device and a method of manufacturing the same which conveniently reduce or suppress the transfer of ionic impurities into a light-emitting layer, and reduce or prevent the light-emitting property in the light-emitting layer from degrading, which promotes life extension. An organic electroluminescent device includes a functional layer having at least a light-emitting layer between a first electrode and a second electrode. At least a part of the functional layer is formed of the inorganic ion exchange material added to the functional material to form the functional layer.Type: GrantFiled: June 4, 2004Date of Patent: September 26, 2006Assignee: Seiko Epson CorporationInventors: Ryuji Ishii, Shunichi Seki
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Patent number: 7102185Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.Type: GrantFiled: June 21, 2004Date of Patent: September 5, 2006Assignee: Eastman Kodak CompanyInventors: David N. Nichols, David L. Losee, Christopher Parks
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Patent number: 7095055Abstract: The invention relates to an optical transmitting module which has at least one first semiconductor chip which in each case has at least one vertical light-emitting semiconductor component which is designed for transmitting data and/or signals, and which has at least one second semiconductor chip which has a semiconductor switching device which is provided for the purpose of switching the vertical light-emitting semiconductor component, the first semiconductor chip(s) and the second semiconductor chip(s) being embedded jointly in a single housing.Type: GrantFiled: September 4, 2001Date of Patent: August 22, 2006Assignee: Infineon Technologies AGInventor: Jaime Estevez-Garcia
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Patent number: 7095060Abstract: A unit according to the present invention includes a substrate and an IC chip used for driving a light-emitting device. A relay terminal is provided at a region spaced from peripheral areas of the substrate so as to connect the light-emitting device with the IC chip. The relay terminal is connected with a corresponding terminal of the IC chip via a connecting channel such as wire-bonding. The light-emitting device is supported by the substrate such that a terminal of the light-emitting device is electrically connected with the relay terminal. A length of a wiring line between the light-emitting device for an optical pick-up and the unit used for driving the light-emitting device is decreased.Type: GrantFiled: May 5, 2003Date of Patent: August 22, 2006Assignee: Pioneer CorporationInventor: Kiyoshi Tateishi
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Patent number: 7075593Abstract: A spatial light modulator contains a substrate (90), a plurality of overlying liquid-crystal cells (202), a plurality of respectively corresponding transistors (204), an electron-beam system (400 and 500), and a control component (203). Each transistor is in electrical communication with the corresponding liquid-crystal cell. The electron-beam system bombards each transistor with electrons that cause it to be selectively in (i) a non-conductive condition in which its channel-region electric field is substantially insufficient for conduction or (ii) a conductive condition in which its channel-region electric field is sufficient for at least partial conduction. During selected time periods when a transistor is in its conductive condition, the control component provides the transistor with a control signal that results in the polarization direction of specified light being selectively rotated in passing through the corresponding liquid-crystal cell.Type: GrantFiled: March 25, 2004Date of Patent: July 11, 2006Assignee: Video Display CorporationInventors: Marcial Vidal, David K. Mutchler, Duane A. Haven
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Patent number: 7057209Abstract: A light emitting device having high definition, a high aperture ratio, and high reliability is provided. The present invention achieves high definition and a high aperture ratio with a full color flat panel display using red, green, and blue color emission light by intentionally forming laminate portions, wherein portions of different organic compound layers of adjacent light emitting elements overlap with each other, without depending upon the method of forming the organic compound layers or the film formation precision.Type: GrantFiled: October 12, 2004Date of Patent: June 6, 2006Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toshiji Hamatani, Toru Takayama
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Patent number: 7053415Abstract: A monolithically integrated VCSEL and photodetector, and a method of manufacturing the same, are disclosed for applications where the VCSEL and photodetector require separate operation such as duplex serial data communications applications. A first embodiment integrates a VCSEL with an MSM photodetector on a semi-insulating substrate. A second embodiment builds layers of a p-i-n photodiode on top of layers forming a VCSEL using a standard VCSEL process. The p-i-n layers are etched away in areas where VCSELs are to be formed and left where photodetectors are to be formed. The VCSELs underlying the photodetectors are inoperable, and serve to recirculate photons which are not initially absorbed back into the photodetector. The transmit and receive pairs are packaged into a single package for interface to multifiber ferrules. The distance between the devices is precisely defined photolithographically, thereby making alignment easier.Type: GrantFiled: June 4, 2003Date of Patent: May 30, 2006Assignee: Optical Communication Products, Inc.Inventors: Stanley E. Swirhun, Jeffrey W. Scott