Active Layer Of Indirect Band Gap Semiconductor Patents (Class 257/86)
  • Patent number: 6849877
    Abstract: The present invention has an object of providing a light emitting device including an OLED formed on a plastic substrate, which can prevent the degradation due to penetration of moisture or oxygen. On a plastic substrate, a plurality of films for preventing oxygen or moisture from penetrating into an organic light emitting layer in the OLED (hereinafter, referred to as barrier films) and a film having a smaller stress than that of the barrier films (hereinafter, referred to as a stress relaxing film), the film being interposed between the barrier films, are provided. Owing to a laminate structure of a plurality of barrier films, even if a crack occurs in one of the barrier films, the other barrier film(s) can effectively prevent moisture or oxygen from penetrating into the organic light emitting layer. Moreover, the stress relaxing film, which has a smaller stress than that of the barrier films, is interposed between the barrier films, thereby making it possible to reduce a stress of the entire sealing film.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: February 1, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Mai Akiba
  • Patent number: 6831401
    Abstract: An electron emitting device comprising: a pair of conductors opposed to each other on a substrate; and a pair of deposition films having carbon as a main component which are respectively connected to the pair of conductors and disposed with a gap therebetween. The deposition film contains sulfur in a range of not less than 1 mol % and not more than 5 mol % as a ratio to carbon.
    Type: Grant
    Filed: February 25, 2000
    Date of Patent: December 14, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keisuke Yamamoto, Miki Tamura, Yasuhiro Hamamoto
  • Publication number: 20040238832
    Abstract: A semiconductor light-emitting device has a semiconductor layer containing Al between a substrate and an active layer containing nitrogen, wherein Al and oxygen are removed from a growth chamber before growing said active layer and a concentration of oxygen incorporated into said active layer together with Al is set to a level such that said semiconductor light-emitting device can perform a continuous laser oscillation at room temperature.
    Type: Application
    Filed: June 29, 2004
    Publication date: December 2, 2004
    Inventors: Takashi Takahashi, Morimasa Kaminishi, Shunichi Sato, Akihiro Itoh, Naoto Jikutani
  • Patent number: 6822266
    Abstract: A semiconductor light-emitting device includes an active layer having a single quantum well structure. The single quantum well structure enables a high-speed response such that the rise and fall time is 2.1 nsec. Further, the single quantum well active layer is doped with Zn at a concentration of 8×1017 cm−3. Thereby, the half-value width of the light-emitting spectrum is 25 nm or more, which is wider than in the case of no doping. Thus, temperature dependence of an optical output is reduced.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: November 23, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takahisa Kurahashi, Hiroshi Nakatsu, Tetsurou Murakami, Shouichi Ohyama
  • Patent number: 6815721
    Abstract: A diamond semiconductor has an exciton light-emission intensity characteristic that varies nonlinearly.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: November 9, 2004
    Assignee: Agency of Industrial Science & Technology, Ministry of International Trade & Industry
    Inventors: Hideyo Okushi, Hideyuki Watanabe, Daisuke Takeuchi, Koji Kajimura
  • Patent number: 6806505
    Abstract: There is provided a light emitting device and a process for producing the same in that the light emission efficiency is high, the range of selection of the material is broad, and a device array of a large area can be formed. On a substrate 11 comprising quartz glass, an n-type clad layer 12 comprising a non-single crystal body of n-type AlGaN, a light emitting layer 13 containing plural microcrystals 13a comprising ZnO, and a p-type clad layer 14 comprising a non-single crystal body of p-type BN are laminated in this order. Between the n-type clad layer 12 and the p-type clad layer 14, an insulating layer 15 is formed to fill the gap among the microcrystals 13a to prevent a leaking electric current. The insulating layer 15 is formed by oxidizing the surface of the n-type clad layer 12.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: October 19, 2004
    Assignee: Sony Corporation
    Inventors: Shigeru Kojima, Katsuya Shirai, Yoshifumi Mori, Atsushi Toda
  • Patent number: 6806502
    Abstract: Provide is a 3-5 group compound semiconductor having a concentration of a p-type dopant of 1×1017 cm− or more and 1×1021 cm−3 or less, which can be laminated to control the carrier concentration of an InGaAlN-type mixed crystal in a low range with high reproducibility. Also provided is a 3-5 group compound semiconductor in which the carrier concentration of an InGaAlN-type mixed crystal is controlled in a low range with high reproducibility, and a light emitting device having high light emitting efficiency.
    Type: Grant
    Filed: November 15, 2001
    Date of Patent: October 19, 2004
    Assignee: Sumitomo Chemical Company, Limted
    Inventors: Yasushi Iyechika, Yoshihiko Tsuchida, Yasuyuki Kurita
  • Patent number: 6803603
    Abstract: Part of light emitted downward by an active layer is reflected by an electrode functioning as a reflective layer, and travels upward to radiate outside. Since the electrode is made of a metal, it reflects almost all light regardless of its incident angle, and light can be efficiently extracted.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: October 12, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Nitta, Haruhiko Okazaki, Yukio Watanabe, Chisato Furukawa
  • Patent number: 6794688
    Abstract: A semiconductor light-emitting device exhibits high reflectance even with less number of pairs of light-reflecting layers, and allows light emitted from the active layer to be effectively extracted outside. This semiconductor light-emitting device is fabricated at good mass productivity by a semiconductor light-emitting device manufacturing method including the step of providing an active layer which generates light having a specified wavelength on a semiconductor substrate. On the semiconductor substrate, are stacked an AlxGa1−xAs layer and the active layer, in this order. Part of the AlxGa1−xAs layer with respect to the is changed into an AlOy layer (where y is a positive real number).
    Type: Grant
    Filed: September 12, 2002
    Date of Patent: September 21, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroshi Nakatsu, Takahisa Kurahashi, Tetsuroh Murakami, Shouici Ooyama
  • Publication number: 20040169184
    Abstract: A boron phosphide-based semiconductor light-emitting device, which device includes a light-emitting member having a hetero-junction structure in which an n-type lower cladding layer formed of an n-type compound semiconductor, an n-type light-emitting layer formed of an n-type Group III nitride semiconductor, and a p-type upper cladding layer provided on the light-emitting layer and formed of a p-type boron phosphide-based semiconductor are sequentially provided on a surface of a conductive or high-resistive single-crystal substrate and which device includes a p-type Ohmic electrode provided so as to achieve contact with the p-type upper cladding layer, characterized in that a amorphous layer formed of boron phosphide-based semiconductor is disposed between the p-type upper cladding layer and the n-type light-emitting layer. This boron phosphide-based semiconductor light-emitting device exhibits a low forward voltage or threshold value and has excellent reverse breakdown voltage characteristics.
    Type: Application
    Filed: November 18, 2003
    Publication date: September 2, 2004
    Applicant: SHOWA DENKO K.K.
    Inventors: Takashi Udagawa, Akira Kasahara
  • Patent number: 6740904
    Abstract: A silicon light-emitting device and a display device employing the silicon light-emitting device are provided. In the silicon light-emitting device, a doped region is ultra-shallowly doped with the opposite type dopant to the type of the substrate on one side of the substrate, so that the p-n junction between the doped region itself and the substrate creates luminance by annihilation combination of electron-hole pairs due to the quantum confinement effect. At least one semiconductor material portion at least partially forms a stack along with the doped region on the other side of the substrate. First, second, and third electrodes are formed for electric connection. The silicon light-emitting device includes a transistor of at least one step and accordingly performs current amplification and/or switching. Thus, luminance can be driven just with a small amount of current.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: May 25, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-young Kim, Byoung-lyong Choi, Eun-kyung Lee
  • Patent number: 6724012
    Abstract: A semiconductor device in which a reduction in size and thinness are realized is provided. The semiconductor device of the present invention can realize a reduction in size by forming light emitting elements as a light source, and photodiodes as photoelectric conversion elements on the same substrate. Further, it becomes possible to control two signal lines by using one driver circuit with using an output switching circuit. As a result, it becomes possible to reduce the area occupied by the driver circuits of the semiconductor device, and the semiconductor device can be made smaller.
    Type: Grant
    Filed: December 6, 2001
    Date of Patent: April 20, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 6677059
    Abstract: The invention aims to solve the problem of prior art EL devices that undesirable defects form in dielectric layers, and especially the problems of EL devices having dielectric layers of lead-base dielectric material including a lowering, variation and change with time of the luminance of light emission, and thereby provide an EL device ensuring high display quality and a method for manufacturing the same at a low cost.
    Type: Grant
    Filed: May 30, 2001
    Date of Patent: January 13, 2004
    Assignee: TDK Corporation
    Inventors: Yukihiko Shirakawa, Masashi Miwa, Katsuto Nagano
  • Patent number: 6664575
    Abstract: A GaInP stacked layer structure 1 having a GaAs single crystal substrate 10 having stacked on the surface thereof at least a buffer layer 11, an electron channel layer 12 composed of GaXIn1-XAs (0≦X≦1), a spacer layer 13 composed of GaInP and an electron supply layer 14 composed of GaInP is disclosed. The electron channel layer 12 contains a compositional gradient region imparted with a gradient by increasing the indium composition ratio (1-X) in the direction of the layer thickness increasing toward the junction interface 12b with the electron supply layer 14 side.
    Type: Grant
    Filed: December 5, 2001
    Date of Patent: December 16, 2003
    Assignee: Showa Denko Kabushiki Kaisha
    Inventor: Takashi Udagawa
  • Patent number: 6649943
    Abstract: Disclosed is a Group III nitride compound semiconductor light-emitting element formed of Group III nitride compound semiconductor layers, including a multi-layer containing light-emitting layers; a p-type semiconductor layer; and an n-type semiconductor layer, wherein the multi-layer includes a multiple quantum barrier-well layer containing quantum-barrier-formation barrier layers formed from a Group III nitride compound semiconductor and quantum-barrier-formation well layers formed from a Group III nitride compound semiconductor, the barrier layers and the well layers being laminated alternately and cyclically, and a plurality of low-energy-band-gap layers which emit light of different wavelengths; and the multiple quantum barrier-well layer is provided between the low-energy-band-gap layers.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: November 18, 2003
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Takahiro Kozawa, Kazuyoshi Tomita, Tetsu Kachi
  • Patent number: 6639354
    Abstract: An n-type cladding layer formed of a non-single crystal body of n-type AlGaN, a light emitting layer containing a plurality of micro-crystals made from ZnO, and a p-type cladding layer formed of a non-single crystal body of p-type BN are sequentially stacked on a substrate made from quartz glass. An insulating layer is formed between the n-type cladding layer and the p-type cladding layer in such a manner as to bury spaces between the micro-crystals, to thereby prevent occurrence of leakage current. The insulating layer is formed by oxidizing the surface of the n-type cladding layer. Since the light emitting layer contains the plurality of micro-crystals improved in crystallinity, it is possible to enhance the emission efficiency, to extend the selection range of each of materials for forming the light emitting layer, n-type cladding layer, p-type cladding layer, and substrate, and to form a device array on a common substrate having a large area.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: October 28, 2003
    Assignee: Sony Corporation
    Inventors: Shigeru Kojima, Katsuya Shirai, Yoshifumi Mori, Atsushi Toda
  • Patent number: 6628249
    Abstract: A light emitting apparatus comprises a light emitting section for emitting light, a color of the light being changed with a value of a driving current, and a driving section for driving the light emitting section so that the light emitting section emits light having a desired color and a desired intensity, by generating the driving current based on a signal designating the desired color and a signal designating the desired intensity and by applying the driving current to the light emitting section.
    Type: Grant
    Filed: November 9, 2000
    Date of Patent: September 30, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takeshi Kamikawa, Shigetoshi Ito, Mototaka Taneya
  • Patent number: 6610995
    Abstract: A gallium nitride-based III-V Group compound semi-conductor device has a gallium nitride-based III-V Group compound semiconductor layer provided over a substrate, and an ohmic electrode provided in contact with the semiconductor layer. The ohmic electrode is formed of a metallic material, and has been annealed.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: August 26, 2003
    Assignee: Nichia Corporation
    Inventors: Shuji Nakamura, Takao Yamada, Masayuki Senoh, Motokazu Yamada, Kanji Bando
  • Patent number: 6608328
    Abstract: A light emitting diode is made by a compound semiconductor in which light is emitted from an active region with a multiple quantum well structure. The active region is sandwiched by InGaAlP-based lower and upper cladding layers. Emission efficiency of the active region is improved by adding light and electron reflectors in the light emitting diode. These InGaAlP-based layers are grown epitaxially by Organometallic Vapor-Phase Epitaxy (OMVPE) on a GaAs substrate with a misorientation angle toward <111>A to improve the quality and surface morphology of the epilayer and performance in light emitting. The lower cladding layer of first conductivity type forms on a misoriented substrate with the same type of conductivity. Light transparent and current diffusion layers with a second conductivity is formed on top of the upper cladding layer for the spreading of current and expansion of the emission light.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: August 19, 2003
    Assignee: Uni Light Technology Inc.
    Inventors: Li-Hsin Kuo, Bor-Jen Wu, Chin-Hao Hsu, Wen-Shyh Hsu
  • Patent number: 6599133
    Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: July 29, 2003
    Assignee: Technologies and Devices International, Inc.
    Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
  • Patent number: 6586773
    Abstract: A semiconductor light-emitting device, including a first substrate of a first conductivity type, a first bonding layer provided on said first substrate and consisting essentially of a GaP material of the first conductivity type, a second bonding layer provided on the first bonding layer, coincident with the first bonding layer in a crystal orientation, having the first conductivity type, and consisting essentially of a material represented by a formula InxGayP, where 0≦x, y≦1, and x+y=1, and a light-emitting layer comprising a first cladding layer, an active layer, and a second cladding layer, which are successively provided on the second bonding layer, each of the active layer and first and second cladding layers consisting essentially of a material represented by a formula InxGayAlzP, where x+y+z=1, and 0≦x, y, z≦1.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: July 1, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryo Saeki, Hideto Sugawara, Yukio Watanabe, Tamotsu Jitosho
  • Patent number: 6563137
    Abstract: An optoelectric integrated device includes a three-dimensional solid semiconductor crystal, such as a silicon ball, and a plurality of optical devices including a light-emitting device and a light-receiving device integrated on the surface of the semiconductor crystal. Light is emitted and received between the light-emitting device and the light-receiving device through the interior of the semiconductor crystal used as an optical wiring medium.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: May 13, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventor: Mamoru Uchida
  • Patent number: 6555403
    Abstract: There are provided a semiconductor laser, a semiconductor light emitting device, and methods of manufacturing the same wherein a threshold current density in a short wavelength semiconductor laser using a nitride compound semiconductor can be reduced. An active layer is composed of a single gain layer having a thickness of more than 3 nm, and optical guiding layers are provided between the active layer and cladding layers respectively.
    Type: Grant
    Filed: July 30, 1998
    Date of Patent: April 29, 2003
    Assignee: Fujitsu Limited
    Inventors: Kay Domen, Shinichi Kubota, Akito Kuramata, Reiko Soejima
  • Publication number: 20030057507
    Abstract: A novel photodetector CMOS-compatible photodetector is disclosed in which photo-generation of carriers (electrons) is carried out in the metal of the electrodes, rather than as electron-hole pairs in the semiconductor on which the metal electrodes are deposited. The novel photo detector comprises a silicon or other semiconductor substrate material characterized by an electron energy bandgap, and a pair of metal electrodes disposed upon a surface of the silicon to define therebetween a border area of the surface. One of the two electrodes being exposed to the incident radiation and covering an area of said surface which is larger than the aforesaid border area, the aforesaid metal of the electrodes being characterized by a Fermi level which is within said electron energy bandgap.
    Type: Application
    Filed: September 26, 2001
    Publication date: March 27, 2003
    Applicant: International Business Machines Corporation
    Inventors: Ferenc M. Bozso, Fenton Read McFeely, John Jacob Yurkas
  • Patent number: 6525345
    Abstract: A semiconductor photonic device includes a Z-cut quartz substrate and a compound semiconductor layer presented by InxGayAlzN (where x+y+z=1, 0≦x ≦1, 0≦y≦1, and 0≦z≦1) formed on the Z-cut quartz substrate.
    Type: Grant
    Filed: August 5, 1999
    Date of Patent: February 25, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Michio Kadota
  • Publication number: 20030034497
    Abstract: The present invention has an object of providing a light emitting device including an OLED formed on a plastic substrate, which can prevent the degradation due to penetration of moisture or oxygen. On a plastic substrate, a plurality of films for preventing oxygen or moisture from penetrating into an organic light emitting layer in the OLED (hereinafter, referred to as barrier films) and a film having a smaller stress than that of the barrier films (hereinafter, referred to as a stress relaxing film), the film being interposed between the barrier films, are provided. Owing to a laminate structure of a plurality of barrier films, even if a crack occurs in one of the barrier films, the other barrier film(s) can effectively prevent moisture or oxygen from penetrating into the organic light emitting layer. Moreover, the stress relaxing film, which has a smaller stress than that of the barrier films, is interposed between the barrier films, thereby making it possible to reduce a stress of the entire sealing film.
    Type: Application
    Filed: June 19, 2002
    Publication date: February 20, 2003
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Mai Akiba
  • Patent number: 6515311
    Abstract: A GaN based semiconductor laser device which can prevent guided mode light emitted from the active layer from leaking through the cladding layer to the underlying layer without making the cladding layer excessively thick is provided. The device is characterized in that if an n-type cladding layer, a waveguide layer and a p-type cladding layer are collectively defined as a first three-layer waveguide path and a substrate, an underlying layer and an n-type cladding layer are collectively defined as a second three-layer waveguide path, then effective refractive indices of light propagating through the first and second three-layer waveguide paths are set different from each other.
    Type: Grant
    Filed: May 22, 2000
    Date of Patent: February 4, 2003
    Assignee: Pioneer Corporation
    Inventors: Mitsuru Nishitsuka, Kiyofumi Chikuma
  • Patent number: 6515308
    Abstract: A p-n tunnel junction between a p-type semiconductor layer and a n-type semiconductor layer provides current injection for an nitride based vertical cavity surface emitting laser or light emitting diode structure. The p-n tunnel junction reduces the number of p-type semiconductor layers in the nitride based semiconductor VCSEL or LED structure which reduces the distributed loss, reduces the threshold current densities, reduces the overall series resistance and improves the structural quality of the laser by allowing higher growth temperatures.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: February 4, 2003
    Assignee: Xerox Corporation
    Inventors: Michael A. Kneissl, Peter Kiesel, Christian G. Van de Walle
  • Patent number: 6509579
    Abstract: To provide a semiconductor device capable of preventing the bowing of the substrate, and having a semiconductor layer of a III-V group compound of a nitride system with excellent crystallinity. The semiconductor layer of the III-V group compound of the nitride system whose thickness is equal to or less than 8 &mgr;m, is provided onto a substrate made of sapphire. This reduces the bowing of the substrate due to differences in a thermal expansion coefficient and a lattice constant between the substrate and the semiconductor layer of the III-V group compound of the nitride system. An n-side contact layer forming the semiconductor layer of the III-V group of the nitride system has partially a lateral growth region made by growing in a lateral direction from a crystalline part of a seed crystal layer. In the lateral growth region, dislocation density restricts low, therefore, regions corresponding to the lateral growth region of each layer formed onto the n-side contact layer has excellent crystallinity.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: January 21, 2003
    Assignee: Sony Corporation
    Inventors: Motonobu Takeya, Katsunori Yanashima, Masao Ikeda, Takeharu Asano, Shinro Ikeda, Tomonori Hino, Katsuyoshi Shibuya
  • Patent number: 6507041
    Abstract: A gallium nitride-based III-V Group compound semiconductor device has a gallium nitride-based III-V Group compound semiconductor layer provided over a substrate, and an ohmic electrode provided in contact with the semiconductor layer. The ohmic electrode is formed of a metallic material, and has been annealed.
    Type: Grant
    Filed: January 2, 2001
    Date of Patent: January 14, 2003
    Assignee: Nichia Chemical Industries, Ltd.
    Inventors: Shuji Nakamura, Takao Yamada, Masayuki Senoh, Motokazu Yamada, Kanji Bando
  • Patent number: 6504178
    Abstract: A semiconductor imaging device is disclosed. The device includes a substrate having at least first and second surfaces opposing each other, and a circuit layer. The substrate is doped to exhibit a first conductivity type. The substrate includes a conducting layer, a region, and a plurality of doped regions. The conducting layer includes a first type dopants incorporated near the first surface. The region includes a heavily doped area within the substrate near the second surface. The plurality of doped regions includes a second type dopants formed on the second surface. The circuit layer is formed over the second surface to provide gate contacts to and readout circuits for the plurality of doped regions. The readout circuit provides readout of optical signals from pixels.
    Type: Grant
    Filed: April 5, 2001
    Date of Patent: January 7, 2003
    Assignee: Digirad Corporation
    Inventors: Lars S. Carlson, Shulai Zhao, Richard Wilson
  • Patent number: 6504171
    Abstract: A light emitting device and a method of increasing the light output of the device utilize a chirped multi-well active region to increase the probability of radiative recombination of electrons and holes within the light emitting active layers of the active region by altering the electron and hole distribution profiles within the light emitting active layers of the active region (i.e., across the active region). The chirped multi-well active region produces a higher and more uniform distribution of electrons and holes throughout the active region of the device by substantially offsetting carrier diffusion effects caused by differences in electron and hole mobility by using complementary differences in layer thickness and/or layer composition within the active region.
    Type: Grant
    Filed: January 24, 2000
    Date of Patent: January 7, 2003
    Assignee: Lumileds Lighting, U.S., LLC
    Inventors: Patrick N. Grillot, Christopher P. Kocot, Michael R. Krames, Eugene I. Chen, Stephen A. Stockman, Ying-Lan Chang, Robert C. Taber
  • Publication number: 20020195608
    Abstract: The invention provides a light emitting device and a semiconductor device each having improved characteristics by preventing occurrence of a damage caused by contact of a tool. On a substrate, an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are stacked. On the p-type semiconductor layer, a p-side electrode is provided. The p-type semiconductor layer has a projected portion for limiting current in correspondence with a current injection area in the active layer. A projected portion is formed on the surface of the p-side electrode in correspondence with the projected portion for limiting current. On the surface of the p-side electrode, a protective portion is also provided in correspondence with the area other than the current injection area in the active layer. The top face of the protective portion is higher than that of the projected portion.
    Type: Application
    Filed: August 21, 2002
    Publication date: December 26, 2002
    Inventor: Koichi Miyazaki
  • Publication number: 20020190259
    Abstract: III-Nitride light emitting diodes having improved performance are provided. In one embodiment, a light emitting device includes a substrate, a nucleation layer disposed on the substrate, a defect reduction structure disposed above the nucleation layer, and an n-type III-Nitride semiconductor layer disposed above the defect reduction structure. The n-type layer has, for example, a thickness greater than about one micron and a silicon dopant concentration greater than or equal to about 1019 cm−3. In another embodiment, a light emitting device includes a III-Nitride semiconductor active region that includes at least one barrier layer either uniformly doped with an impurity or doped with an impurity having a concentration graded in a direction substantially perpendicular to the active region.
    Type: Application
    Filed: May 29, 2001
    Publication date: December 19, 2002
    Inventors: Werner Goetz, Nathan Fredrick Gardner, Richard Scott Kern, Andrew Youngkyu Kim, Anneli Munkholm, Stephen A. Stockman, Christopher P. Kocot, Richard P. Schneider
  • Patent number: 6476420
    Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: November 5, 2002
    Assignee: Technologies and Devices International, Inc.
    Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
  • Publication number: 20020125489
    Abstract: A light emitting semiconductor device, which includes a Ga0.9 In0 1As0 97 active layer disposed between lower n-Ga0.5In0.5P and upper p-Ga0.5In0.5P cladding layers, being provided with lower and upper GaAs spacing layers each intermediate the active layer and the cladding layer. The active layer is approximately lattice-matched to a GaAs substrate and has a thickness of about 0.1 &mgr;m with a photoluminescence peak wavelength of approximately 1.3 &mgr;m, and the GaAs spacing layers each have a thickness of about 2 nm.
    Type: Application
    Filed: February 27, 2002
    Publication date: September 12, 2002
    Applicant: RICOH COMPANY, LTD.
    Inventor: Shunichi Sato
  • Patent number: 6445126
    Abstract: An organic EL device has a hole injecting electrode (2), an electron injecting electrode (6), an organic layer participating in a light emitting function disposed between the electrodes. The organic layer includes a light emitting layer (4) comprising a conjugated polymer. The device further includes an inorganic insulative hole injecting layer (3) or an inorganic insulative electron injecting layer (5). The device can take advantage of both organic and inorganic materials, and has an improved efficiency, an extended effective life, and a low cost.
    Type: Grant
    Filed: June 25, 1999
    Date of Patent: September 3, 2002
    Assignee: TDK Corporation
    Inventors: Michio Arai, Osamu Onitsuka
  • Patent number: 6410939
    Abstract: The present invention provides a semiconductor light-emitting device including a Si substrate, a first clad layer, and an intermediate layer of n-AlInN between the substrate and the first clad layer. The intermediate layer is formed of AlxGayInzN, wherein x+y+z=1, 0≦y≦0.5, and 5/95≦z/x≦40/60. Thus on the Si substrate there can be provided a nitride-based, light emitting semiconductor device of high quality capable of electrical conduction from the Si substrate.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: June 25, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Norikatsu Koide, Yoshiyuki Takahira
  • Publication number: 20020060325
    Abstract: The invention has for its object to provide an EL phosphor multilayer thin film and EL device which can emit light with improved luminance. This object is achieved by the provision of an EL phosphor multilayer thin film wherein a phosphor thin film and a dielectric thin film are stacked one upon another. The phosphor thin film comprises a matrix material containing as a main component at least one compound selected from an alkaline earth thioaluminate, an alkaline earth thiogallate and an alkaline earth thioindate, and an rare earth element as a luminescent center, and the dielectric thin film comprises an alkaline earth oxide. There is also provided an EL device comprising such an EL phosphor multilayer thin film.
    Type: Application
    Filed: May 30, 2001
    Publication date: May 23, 2002
    Applicant: TDK CORPORATION
    Inventors: Yoshihiko Yano, Tomoyuki Oike, Yukihiko Shirakawa, Katsuto Nagano
  • Publication number: 20020056846
    Abstract: A nitride semiconductor light emitting device includes a worked substrate including grooves and lands formed on a main surface of a nitride semiconductor substrate, a nitride semiconductor underlayer covering the grooves and the lands of the worked substrate and a nitride semiconductor multilayer emission structure including an emission layer including a quantum well layer or both a quantum well layer and a barrier layer in contact with the quantum well layer between an n-type layer and a p-type layer over the nitride semiconductor underlayer, while the width of the grooves is within the range of 11 to 30 &mgr;m and the width of the lands is within the range of 1 to 20 &mgr;m.
    Type: Application
    Filed: September 11, 2001
    Publication date: May 16, 2002
    Inventors: Yuhzoh Tsuda, Takayuki Yuasa, Shigetoshi Ito, Mototaka Taneya
  • Patent number: 6384430
    Abstract: A light emitting diode includes a substrate, a light emitting layer, a first cladding layer having a first conductivity type and an energy gap greater than an energy gap of the light emitting layer, a second cladding layer having a second conductivity type and an energy gap greater than an energy gap of the light emitting layer, and an intermediate barrier layer having the same conductivity type as the conductivity type of the light emitting layer but different from the conductivity type of the first or second cladding layer, and having an energy gap less than the energy gap of the first or second cladding layer but greater than the energy gap of the light emitting layer. The light emitting diode has a double heterostructure such that the light emitting layer is interposed between the first and second cladding layer. The intermediate barrier layer is disposed between the light emitting layer and the first cladding layer and/or between the light emitting layer and the second cladding layer.
    Type: Grant
    Filed: May 10, 2001
    Date of Patent: May 7, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroshi Nakatsu, Tetsuroh Murakami, Hiroyuki Hosoba, Takahisa Kurahashi
  • Patent number: 6365427
    Abstract: The present invention relates to a semiconductor laser device and a method for fabrication thereof, wherein the semiconductor laser device exhibits an improved mode selectivity.
    Type: Grant
    Filed: February 9, 2000
    Date of Patent: April 2, 2002
    Assignee: Avalon Photonics Ltd.
    Inventors: Hans Peter Gauggel, Karl Heinz Gulden
  • Patent number: 6326638
    Abstract: The semiconductor laser of this invention includes an active layer formed in a c-axis direction, wherein the active layer is made of a hexagonal-system compound semiconductor, and anisotropic strain is generated in a c plane of the active layer.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: December 4, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoshi Kamiyama, Masakatsu Suzuki, Takeshi Uenoyama, Kiyoshi Ohnaka, Akira Takamori, Masaya Mannoh, Isao Kidoguchi, Hideto Adachi, Akihiko Ishibashi, Toshiya Fukuhisa, Yasuhito Kumabuchi
  • Patent number: 6326311
    Abstract: There is provided a microstructure producing method capable of achieving satisfactory uniformity and reproducibility of the growth position, size and density of a minute particle or thin line and materializing a semiconductor device which can reduce the cost through simple processes without using any special microfabrication technique and has superior characteristics appropriate for mass-production with high yield and high productivity as well as a semiconductor device employing the microstructure. An oxide film 12 having a region 12a of a great film thickness and a region 12b of a small film thickness are formed on the surface of a semiconductor substrate 11. Next, a microstructure that is a thin line 15 made of silicon Si is selectively formed only on the surface of the small-film-thickness region 12b of the oxide film 12.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: December 4, 2001
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tohru Ueda, Yasumori Fukushima, Fumitoshi Yasuo
  • Publication number: 20010019131
    Abstract: The present invention provides a field effect transistor (FET) having, on a semi-insulating compound semiconductor substrate, a buffer layer; an active layer that includes a channel layer made of a first conductive-type epitaxial growth layer (e.g. InGaAs); source/drain electrodes formed on a first conductive-type contact layer which is formed either on said active layer or on a lateral face thereof; a gate layer made of a second conductive-type epitaxial growth layer (e.g. p+-GaAs); and a gate electrode formed on said gate layer; which further has, between said second conductive-type gate layer and said channel layer, a semiconductor layer (e.g. InGaP) that rapidly lowers the energy of the valance band spreading from said gate layer to said channel layer. The present invention improves withstand voltage characteristic of a FET having a pn junction in a gate region (JFET) and realizes stable operations of a JFET.
    Type: Application
    Filed: March 2, 2001
    Publication date: September 6, 2001
    Inventors: Takehiko Kato, Kazuki Ota, Hironobu Miyamoto, Naotaka Iwata, Masaaki Kuzuhara
  • Patent number: 6281522
    Abstract: First of all, a semiconductor substrate which consists of SiC is soaked for ten minutes in a buffered hydrofluoric acid, thereby the oxidized film formed on the surface of the semiconductor substrate being etched. Then, TMA, NH3, TMG, and hydrogen for carrier are supplied at the rates of 10 &mgr;mol/min., 2.5 L/min., and 2 L/min., respectively to the semiconductor substrate at a temperature of 1090° C. by using MOVPE, thereby a buffer layer which consists of single crystal AlN and has a thickness of 15 nm being grown on the main surface of the semiconductor substrate. After lowering the temperature to 800° C., TMA, TMG, TMI, and NH3are supplied at the rates of 0.2 &mgr;mol/min., 2 &mgr;mol/min., 20 &mgr;mol/min., and 5 L/min., respectively, thereby a single crystal layer which consists of AlGaInN being grown on the buffer layer.
    Type: Grant
    Filed: February 3, 1999
    Date of Patent: August 28, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihiko Ishibashi, Yuzaburo Ban, Yoshihiro Hara, Nobuyuki Uemura, Masahiro Kume
  • Patent number: 6265732
    Abstract: A light emitting diode includes a substrate, a light emitting layer, a first cladding layer having a first conductivity type and an energy gap greater than an energy gap of the light emitting layer, a second cladding layer having a second conductivity type and an energy gap greater than an energy gap of the light emitting layer, and an intermediate barrier layer having the same conductivity type as the conductivity type of the light emitting layer but different from the conductivity type of the first or second cladding layer, and having an energy gap less than the energy gap of the first or second cladding layer but greater than the energy gap of the light emitting layer. The light emitting diode has a double heterostructure such that the light emitting layer is interposed between the first and second cladding layer. The intermediate barrier layer is disposed between the light emitting layer and the first cladding layer and/or between the light emitting layer and the second cladding layer.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: July 24, 2001
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroshi Nakatsu, Tetsuroh Murakami, Hiroyuki Hosoba, Takahisa Kurahashi
  • Patent number: 6236067
    Abstract: A semiconductor light emitting device is disclosed. An emitting layer forming portion for forming an emitting layer made of a compound semiconductor of AlGaInP group or AlGaAs group including a n-type layer, an active layer and a p-type layer laid one on another is formed on a GaAs substrate. Further, a current diffusion layer of GaP is formed on the front surface of the emitting layer forming portion. The p-type layer between the active layer and the current diffusion layer is formed to the thickness of not less than about 2 &mgr;m, or the current diffusion layer is formed to the thickness of about 3 to 7 &mgr;m. As a result, the semiconductor light emitting device of a high luminance is thus realized, in which the distortion due to the lattice mismatch has no effect on the emitting layer.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: May 22, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Yukio Shakuda, Yukio Matsumoto, Shunji Nakata
  • Patent number: 6236794
    Abstract: The invention relates to a semiconductor electro-optical monolithic component. The component is made up of at least two sections, each of which has a respective waveguide, the waveguides being etched in the form of ridges, disposed in line, and buried in a cladding layer. The sections are electrically isolated from one other by a resistive zone. At the interface between two sections, the waveguides are locally of an extended width not less than the width of the resistive zone.
    Type: Grant
    Filed: June 8, 1999
    Date of Patent: May 22, 2001
    Assignee: Alcatel
    Inventors: Franck Mallecot, Antonina Plais, Christine Chaumont
  • Patent number: 6218681
    Abstract: The present invention provides an epitaxial wafer having compound semiconductor epitaxial layer provided on a substrate, a total thickness of a portion of the compound semiconductor epitaxial layers comprises Ga, As and P as constituent elements being not less than 80 &mgr;m and in the epitaxial layer a low carrier concentration region with a carrier concentration of from 0.5 to 9×1015 cm−3 doped with nitrogen being formed.
    Type: Grant
    Filed: December 24, 1998
    Date of Patent: April 17, 2001
    Assignee: Mitsubishi Chemical Corporation
    Inventor: Tadashige Sato