Alphanumeric Segmented Array Patents (Class 257/92)
  • Patent number: 11032889
    Abstract: A light source intended to be supplied with power by a voltage source. The light source includes a parallel assembly of at least two branches, each branch including at least one elementary light source having an electroluminescent semiconductor element, and each of the elementary light sources has a high internal series resistance.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: June 8, 2021
    Assignee: VALEO VISION
    Inventors: Zdravko Zojceski, Samuel Daroussin
  • Patent number: 9236415
    Abstract: The invention relates to a device comprising a substrate supporting a matrix of diodes organized in rows and columns, and a peripheral substrate contact is arranged on at least one side of the matrix, characterized in that the substrate comprises one or several buried conducting lines having no direct electrical connection with the peripheral substrate contact and being positioned between at least two adjacent columns of diodes and between at least two adjacent rows of diodes.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: January 12, 2016
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Laurent Mollard, Nicolas Baier, Johan Rothman
  • Patent number: 9076931
    Abstract: An optoelectronic component has a semiconductor body, a dielectric layer, a mirror and an additional layer. The semiconductor body has an active zone for generating electromagnetic radiation and an n-contact and a p-contact (1b) for electrical contacting purposes. The dielectric layer is disposed between the semiconductor body and the mirror. The additional layer is disposed between the semiconductor body and the dielectric layer. Furthermore, a method for producing a component of this type is provided.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: July 7, 2015
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Wolfgang Schmid, Christoph Klemp, Alvaro Gomez-Iglesias
  • Patent number: 9071130
    Abstract: According to an embodiment of the invention, there is provided a switching power supply device including an integrated body and a plurality of external terminals. In the integrated body, a first switching element, a constant current element, and a diode are connected in series. The plurality of external terminals include a first external terminal connected to a main terminal of an element disposed on one end side of the integrated body and a second external terminal connected to a main terminal of an element disposed on another end side of the integrated body.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: June 30, 2015
    Assignee: Toshiba Lighting & Technology Corporation
    Inventors: Noriyuki Kitamura, Yuji Takahashi, Koji Suzuki, Koji Takahashi, Toru Ishikita
  • Patent number: 9024288
    Abstract: Embodiments of the present invention provide an array substrate, a manufacturing method thereof and a display device. The manufacturing method of an array substrate, comprising: forming a gate electrode on a base substrate by a first patterning process, and then depositing a gate insulating layer on the base substrate on which the gate electrode is formed; forming source and drain electrodes on the base substrate obtained after the above step, by a second patterning process; forming an active layer formed of a graphene layer, and a protective layer disposed on the active layer, on the base substrate obtained after the above steps, by a third patterning process; and forming a planarizing layer on the base substrate, obtained after the above steps, by a fourth patterning process, in which the planarizing layer is provided with a through hole through which the source or drain electrode is exposed.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: May 5, 2015
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Tuo Sun
  • Patent number: 9018649
    Abstract: A nanopatterned surface is prepared by forming a block copolymer film on a miscut crystalline substrate, annealing the block copolymer film, then reconstructing the surface of the annealed block copolymer film The method creates a well-ordered array of voids in the block copolymer film that is maintained over a large area. The nanopatterned block copolymer films can be used in a variety of different applications, including the fabrication of high density data storage media.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: April 28, 2015
    Inventors: Thomas P. Russell, Soojin Park, Ting Xu
  • Patent number: 9012900
    Abstract: An organic light emitting diode display device capable of improving capacitance Cst of a storage capacitor and transmittance and a method of fabricating the same are disclosed. The organic light emitting diode display device includes a driving thin film transistor (TFT) formed on the substrate, a passivation film formed to cover the TFT driver, a color filter formed on the passivation film in a luminescent region, a planarization film formed to cover the color filter, a transparent metal layer formed on the planarization film, an insulating film formed on the transparent metal layer, a first electrode connected to the TFT driver and overlapping the transparent metal layer while interposing the insulating film therebetween, an organic light emitting layer and a second electrode which are sequentially formed on the first electrode. The transparent metal layer, the insulating film, and the first electrode constitute a storage capacitor in the luminescent region.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: April 21, 2015
    Assignee: LG Display Co., Ltd.
    Inventors: Jung-Sun Beak, Jeong-Oh Kim, Yong-Min Kim
  • Publication number: 20150102369
    Abstract: A light emitting device (1) of the present invention is a light emitting device including a light emitting section (3) provided on a substrate (2), light storing phosphors (7) being provided on or above at least a part of the substrate (2). It is therefore possible to provide a planar light emitting device having a light storage function.
    Type: Application
    Filed: February 14, 2013
    Publication date: April 16, 2015
    Inventors: Toshio Hata, Shinya Ishizaki, Makoto Matsuda
  • Patent number: 8941132
    Abstract: A method for manufacture of application specific solar cells includes providing and processing custom design information to determine at least a cell size and a cell shape. The method includes providing a transparent substrate having a back surface region, a front surface region, and one or more grid-line regions overlying the front side surface region. The one or more grid regions provide one or more unit cells having the cell size and the cell shape. The method further includes forming a layered structure including photovoltaic materials overlying the front surface region.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: January 27, 2015
    Assignee: Stion Corporation
    Inventors: Chester A. Farris, III, Albert S. Brown
  • Patent number: 8941139
    Abstract: A method of manufacturing a light-emitting element mounting package including laminating a metallic layer on an insulating layer; forming a light-emitting element mounting area which includes a pair of electroplating films formed by electroplating using the metallic layer as a power supply layer on the metallic layer; forming a light-emitting element mounting portion in which a plurality of wiring portions are separated by predetermined gaps, by removing predetermined portions of the metallic layer, wherein, in the forming the light-emitting element mounting portion, the metallic layer is removed so that one of the pair of electroplating films belongs to one wiring portion of the plurality of wiring portions and another of the pair of electroplating films belongs to another wiring portion adjacent to the one wiring portion.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: January 27, 2015
    Assignee: Shinko Electric Industries Co., Ltd
    Inventors: Kazutaka Kobayashi, Tadashi Arai, Yasuyuki Kimura
  • Patent number: 8927997
    Abstract: A substrate includes a thin film transistor (TFT) which includes an active layer, a gate electrode, a source electrode, and a drain electrode; a first insulating layer disposed between the active layer and the gate electrode; a second insulating layer disposed between the gate electrode and the source and drain electrodes; a third insulating layer disposed on the second insulating layer, and including a first region for opening the second insulating layer and a second region for opening one of the source and drain electrodes, the first region and the second region being integrally connected; and a first electrode connected to one of the source and drain electrodes, and disposed so as to cover the first region and the second region.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: January 6, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Won-Kyu Lee, Young-Jin Chang, Seong-Hyun Jin
  • Patent number: 8916857
    Abstract: A light-emitting element disclosed in the present invention includes a light-emitting layer and a first layer between a first electrode and a second electrode, in which the first layer is provided between the light-emitting layer and the first electrode. The present invention is characterized by the device structure in which the first layer comprising a hole-transporting material is doped with a hole-blocking material or an organic compound having a large dipole moment. This structure allows the formation of a high performance light-emitting element with high luminous efficiency and long lifetime. The device structure of the present invention facilitates the control of the rate of the carrier transport, and thus, leads to the formation of a light-emitting element with a well-controlled carrier balance, which contributes to the excellent characteristics of the light-emitting element of the present invention.
    Type: Grant
    Filed: November 24, 2012
    Date of Patent: December 23, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoko Shitagaki, Satoshi Seo, Ryoji Nomura
  • Publication number: 20140346539
    Abstract: The invention relates to a device comprising a substrate supporting a matrix (70) of diodes (Di) organised in rows and columns, and a peripheral substrate contact (75) is arranged on at least one side of the matrix (70), characterised in that the substrate comprises one or several buried conducting lines (73) having no direct electrical connection with the peripheral substrate contact and being positioned between at least two adjacent columns of diodes and between at least two adjacent rows of diodes.
    Type: Application
    Filed: May 20, 2014
    Publication date: November 27, 2014
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Laurent Mollard, Nicolas Baier, Johan Rothman
  • Patent number: 8884322
    Abstract: A light-emitting device includes a first electrode area on a substrate and a functional light-emitting layer on the first electrode area. A second electrode area is disposed on the functional light-emitting layer. A light outlet layer is disposed in a radiation path of the functional light-emitting layer. The light outlet layer incorporates a number of optical elements whose distribution and/or geometrical shape vary across a surface of the light outlet layer.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: November 11, 2014
    Assignee: OSRAM Opto Semiconductor GmbH
    Inventors: Florian Schindler, Markus Klein, Benjamin Claus Krummacher
  • Patent number: 8835949
    Abstract: A three-terminal light emitting device (LED) chip, associated fabrication method, and LED array are provided. The method forms an n-doped semiconductor layer overlying a substrate, an active semiconductor layer overlying the n-doped semiconductor layer, and a p-doped semiconductor layer overlying the active semiconductor layer. A trench is formed through the p-doped and active semiconductor layers, exposing the n-doped semiconductor layer. In one aspect, the trench is formed at least part way, but not completely, through the n-doped semiconductor layer. Then, an LED P electrode is formed overlying a first region of the p-doped semiconductor layer, a diode P electrode is formed overlying a second region of the p-doped semiconductor layer that is separated from the first region of the p-doped semiconductor layer by the trench, and an N electrode is formed overlying a top surface of the exposed n-doped semiconductor layer in the trench, shared by the LED and diode.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: September 16, 2014
    Assignee: Sharp Laboratories of America, Inc.
    Inventor: Jong-Jan Lee
  • Patent number: 8791477
    Abstract: Disclosed is a light emitting device array. The light emitting device array comprises a light emitting device and a body comprises first and second lead frames electrically connected to the light emitting device and a substrate on which the light emitting device package is disposed, the substrate comprises a base layer and a metal layer disposed on the base layer and electrically connected to the light emitting device package, wherein the metal layer comprises first and second electrode patterns electrically connected to the first and second lead frames and a heat dissipation pattern insulated from at least one of the first or(and) second electrode patterns, absorbing heat generated from at least one of the base layer or(and) the light emitting device package and then dissipating the heat.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: July 29, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Sangwoo Lee, Dongwook Park, Hongboem Jin
  • Patent number: 8766289
    Abstract: Disclosed is a light emitting device including: a light emitting structure including a plurality of light emitting regions including a first semiconductor layer, an active layer and a second semiconductor layer; a first electrode unit disposed on the first semiconductor layer in one of the light emitting regions; a second electrode unit disposed on the second semiconductor layer in another of the light emitting regions; an intermediate pad disposed on the second semiconductor layer in at least still another of the light emitting regions; and at least one connection electrode to sequentially connect the light emitting regions in series, wherein the light emitting regions connected in series are divided into 1st to ith light emitting region groups and areas of light emitting regions that belong to different groups are different (where 1<i?j, each of i and j is a natural number, and j is a last light emitting region group).
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: July 1, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Sung Kyoon Kim, Yun Kyung Oh, Sung Ho Choo
  • Patent number: 8735917
    Abstract: Disclosed is a light emitting device array. The light emitting device array comprises a light emitting device and a body comprises first and second lead frames electrically connected to the light emitting device and a substrate on which the light emitting device package is disposed, the substrate comprises a base layer and a metal layer disposed on the base layer and electrically connected to the light emitting device package, wherein the metal layer comprises first and second electrode patterns electrically connected to the first and second lead frames and a heat dissipation pattern insulated from at least one of the first or(and) second electrode patterns, absorbing heat generated from at least one of the base layer or(and) the light emitting device package and then dissipating the heat.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: May 27, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Sangwoo Lee, Dongwook Park, Hongboem Jin
  • Patent number: 8729572
    Abstract: A light emitting diode package includes an electrically insulated base, first and second electrodes, an LED chip, a voltage stabilizing module, and an encapsulative layer. The base has a first surface and an opposite second surface. The first and second electrodes are formed on the first surface of the base. The LED chip is electrically connected to the first and second electrodes. The voltage stabilizing module is formed on the first surface of the base, positioned between and electrically connected to the first and second electrodes. The voltage stabilizing module connects to the LED chip in reverse parallel and has a polarity arranged opposite to that of the LED chip. The voltage stabilizing module has an annular shape and encircles the first electrode. The encapsulative layer is formed on the base and covers the LED chip.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: May 20, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Hou-Te Lin, Chao-Hsiung Chang
  • Patent number: 8723336
    Abstract: According to an embodiment, a semiconductor light emitting device includes a light emitting body including a semiconductor light emitting layer, a support substrate supporting the light emitting body, and a bonding layer provided between the light emitting body and the support substrate, the bonding layer bonding the light emitting body and the support substrate together. The device also includes a first barrier metal layer provided between the light emitting body and the bonding layer, and an electrode provided between the light emitting body and the first barrier metal layer. The first barrier layer includes a first layer made of nickel and a second layer made of a metal having a smaller linear expansion coefficient than nickel, and the first layer and the second layer are alternately disposed in a multiple-layer structure. The electrode is electrically connected to the light emitting body.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: May 13, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yasuharu Sugawara
  • Patent number: 8710515
    Abstract: This disclosure discloses a light-emitting device. The light-emitting device comprises: a substrate; and a first light-emitting unit comprising a plurality of light-emitting diodes electrically connected to each other on the substrate. A first light-emitting diode in the first light-emitting unit comprises a first semiconductor layer with a first conductivity-type, a second semiconductor layer with a second conductivity-type, and a light-emitting stack formed between the first and second semiconductor layers. The first light-emitting diode in the first light-emitting unit further comprises a first connecting layer on the first semiconductor layer for electrically connecting to a second light-emitting diode in the first light-emitting unit; a second connecting layer, separated from the first connecting layer, formed on the first semiconductor layer; and a third connecting layer on the second semiconductor layer for electrically connecting to a third light-emitting diode in the first light-emitting unit.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: April 29, 2014
    Assignee: Epistar Corporation
    Inventors: Chao-Hsing Chen, Schang-Jing Hon
  • Patent number: 8691621
    Abstract: A method is provided for preparing a printed metal surface for the deposition of an organic semiconductor material. The method provides a substrate with a top surface, and a metal layer is formed overlying the substrate top surface. Simultaneous with a thermal treatment of the metal layer, the metal layer is exposed to a gaseous atmosphere with thiol molecules. In response to exposing the metal layer to the gaseous atmosphere with thiol molecules, the work function of the metal layer is increased. Subsequent to the thermal treatment, an organic semiconductor material is deposited overlying the metal layer. In one aspect, the metal layer is exposed to the gaseous atmosphere with thiol molecules by evaporating a liquid containing thiol molecules in an ambient air atmosphere. Alternatively, a delivery gas is passed through a liquid containing thiol molecules. An organic thin-film transistor (OTFT) and OTFT fabrication process are also provided.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: April 8, 2014
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Kurt Ulmer, Kanan Puntambekar
  • Patent number: 8648369
    Abstract: Disclosed are a light emitting device and a method of fabricating the same. The light emitting device comprises a substrate. A plurality of light emitting cells are disposed on top of the substrate to be spaced apart from one another. Each of the light emitting cells comprises a first upper semiconductor layer, an active layer, and a second lower semiconductor layer. Reflective metal layers are positioned between the substrate and the light emitting cells. The reflective metal layers are prevented from being exposed to the outside.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: February 11, 2014
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Won Cheol Seo, Joon Hee Lee, Jong Kyun You, Chang Youn Kim, Jin Cheul Shin, Hwa Mok Kim, Jang Woo Lee, Yeo Jin Yoon, Jong Kyu Kim
  • Patent number: 8648362
    Abstract: A solid state imaging device includes: a substrate; a photoelectric conversion unit that is formed on the substrate to generate and accumulate signal charges according to light quantity of incident light; a vertical transmission gate electrode that is formed to be embedded in a groove portion formed in a depth direction from one side face of the substrate according to a depth of the photoelectric conversion unit; and an overflow path that is formed on a bottom portion of the transmission gate to overflow the signal charges accumulated in the photoelectric conversion unit.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: February 11, 2014
    Assignee: Sony Corporation
    Inventor: Ryosuke Nakamura
  • Patent number: 8633492
    Abstract: An object is to improve field effect mobility of a thin film transistor using an oxide semiconductor. Another object is to suppress increase in off current even in a thin film transistor with improved field effect mobility. In a thin film transistor using an oxide semiconductor layer, by forming a semiconductor layer having higher electrical conductivity and a smaller thickness than the oxide semiconductor layer between the oxide semiconductor layer and a gate insulating layer, field effect mobility of the thin film transistor can be improved, and increase in off current can be suppressed.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: January 21, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Toshinari Sasaki
  • Patent number: 8624277
    Abstract: A display substrate includes a gate line, a gate insulation layer, a data line, a switching element, a protection insulation layer, a gate pad portion and a data pad portion. The gate insulation layer is disposed on the gate line. The switching element is connected to the gate line and the data line. The protection insulation layer is disposed on the switching element. The gate pad portion includes a first gate pad electrode which makes contact with an end portion of the gate line through a first hole formed through the gate insulation layer, and a second gate pad electrode which makes contact with the first gate pad electrode through a second hole formed through the protection insulation layer. The data pad portion includes a data pad electrode which makes contact with an end portion of the data line through a third hole formed through the protection insulation layer.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: January 7, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Min Kim, Bo-Sung Kim, Seon-Pil Jang, Seung-Hwan Cho, Kang-Moon Jo
  • Patent number: 8610139
    Abstract: A solid state light source array including a transparent substrate and N rows of solid state light emitting element series is provided. Each row of the solid state light emitting element series includes M solid state light emitting elements connected in series, wherein N, M are integers and N?1, M?2. Each of the solid state emitting elements includes a first type electrode pad and a second type electrode pad. The first and the Mth solid state emitting elements of each row of the solid state light emitting element series are electrically connected to a first conductive line and a second conductive line located on the edges of the first surface via the first type electrode pad and the second type electrode pad, respectively. The first conductive line and the second conductive line are physically disconnected.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: December 17, 2013
    Assignee: Lextar Electronics Corporation
    Inventors: Chang-Chin Yu, Mong-Ea Lin
  • Patent number: 8581272
    Abstract: A nanopatterned surface is prepared by forming a block copolymer film on a miscut crystalline substrate, annealing the block copolymer film, then reconstructing the surface of the annealed block copolymer film. The method creates a well-ordered array of voids in the block copolymer film that is maintained over a large area. The nanopatterned block copolymer films can be used in a variety of different applications, including the fabrication of high density data storage media.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: November 12, 2013
    Assignees: The University of Massachusetts, The Regents of the University of California
    Inventors: Thomas P. Russell, Soojin Park, Ting Xu
  • Patent number: 8575630
    Abstract: In a light emitting device, a light emitting device unit, and a method for fabricating a light emitting device according to an embodiment of the present invention, a light emitting device (100) includes a substrate (131), a semiconductor light emitting element (121) disposed on the substrate (131), and a resistor (122) coupled to the semiconductor light emitting element (121). The resistor (122) is coupled in parallel to the semiconductor light emitting element (121). The resistor (122) has a resistance set at such a value that when a light emitting operation voltage for causing light emission of the semiconductor light emitting element (121) is applied to the semiconductor light emitting element (121), a current flowing through the resistor (122) is equal to or less than one-fiftieth of a current flowing through the semiconductor light emitting element (121).
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: November 5, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masayuki Ito, Masataka Miyata, Taro Yamamuro, Syoji Yokota
  • Patent number: 8552439
    Abstract: A light-emitting diode (LED) package including a substrate, an LED chip, a polarizer, and a supporter is provided. The LED chip is disposed on the substrate. The polarizer is disposed above the LED chip. The supporter is disposed on the substrate for supporting the polarizer.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: October 8, 2013
    Assignees: Himax Display, Inc., Himax Technologies Limited
    Inventors: Yuet-Wing Li, Kuan-Hsu Fan-Chiang, Sin-Hua Ho
  • Patent number: 8536594
    Abstract: Solid state lighting (SSL) devices (e.g., devices with light emitting diodes) with reduced dimensions (e.g., thicknesses) and methods of manufacturing are disclosed herein. In one embodiment, an SSL device includes an SSL structure having a first region and a second region laterally spaced apart from the first region and an insulating material between and electrically isolating the first and second regions. The SSL device also includes a conductive material between the first and second regions and adjacent the insulating material to electrically couple the first and second regions in series.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: September 17, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Vladimir Odnoblyudov
  • Patent number: 8507960
    Abstract: A solid-state imaging device that includes a pixel including a photoelectric conversion section, and a conversion section that converts an electric charge generated by photoelectric conversion into a pixel signal. In the solid-state imaging device, substantially only a gate insulation film is formed on a substrate corresponding to an area under a gate electrode of at least one transistor in the pixel.
    Type: Grant
    Filed: November 27, 2006
    Date of Patent: August 13, 2013
    Assignee: Sony Corporation
    Inventor: Kazuichiro Itonaga
  • Patent number: 8421099
    Abstract: A light emitting device is provided that includes a light emitting structure including a first semiconductor layer, an active layer and a second semiconductor layer, with a roughness formed in a surface of the first semiconductor layer; a phosphor layer arranged on the first semiconductor layer; and an adhesive activation layer arranged between the first semiconductor layer and the phosphor layer. The adhesive activation layer fills a concave part of the roughness and a boundary surface between the adhesive activation layer and the phosphor layer is level.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: April 16, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hyun Don Song
  • Patent number: 8399894
    Abstract: A wiring electrode is provided on a mount substrate. A light emitting element is provided on the wiring electrode to connect electrically with the wiring electrode and is configured to emit a blue to ultraviolet light. A reflective film is provided above the light emitting element to cover the light emitting element so that a space is interposed between the reflective film and the light emitting element. The reflective film is capable of transmitting the blue to ultraviolet light. A fluorescent material layer is provided above the light emitting element to cover the light emitting element so that the reflective film is located between the fluorescent material layer and the light emitting element. A light from the fluorescent material layer is reflected by the reflective film.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: March 19, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideto Furuyama
  • Patent number: 8368297
    Abstract: An organic light emitting device, according to an exemplary embodiment of the present invention, includes a thin film transistor array panel including a pixel electrode, an organic light emitting member formed on the pixel electrode, a common electrode formed on the organic light emitting member, and a storage capacitor including a first conductive layer and a second conductive layer overlapping each other via the organic light emitting member. The first conductive layer may be formed with the same layer as the pixel electrode, and the second conductive layer may be formed with the same layer as the common electrode.
    Type: Grant
    Filed: April 9, 2009
    Date of Patent: February 5, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventor: Young-II Kim
  • Patent number: 8338843
    Abstract: An embodiment of the invention concerns a light-emitting device with an adjustable, time-variable luminance. This is achieved through electrically conductive tracks that are applied to the first electrode area. The conductive tracks are driven in a time-variable manner with different levels of electrical power.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: December 25, 2012
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Florian Schindler, Markus Klein, Benjamin Claus Krummacher
  • Patent number: 8299477
    Abstract: A light emitting device that includes a conductive substrate, an insulating layer on the conductive substrate, a plurality of light emitting device cells on the insulating layer, a connection layer electrically interconnecting the light emitting device cells, a first contact section electrically connecting the conductive substrate with at least one light emitting device cell, and a second contact section on the at least one light emitting device cell.
    Type: Grant
    Filed: October 13, 2008
    Date of Patent: October 30, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventors: Geun Ho Kim, Yong Seon Song, Yu Ho Won
  • Patent number: 8283682
    Abstract: The present invention comprises a substrate, and at least one serial array having a plurality of light emitting cells connected in series on the substrate. Each of the light emitting cells comprises a lower semiconductor layer, an upper semiconductor layer, an active layer interposed between the lower and upper semiconductor layers, a lower electrode formed on the lower semiconductor layer exposed at a first corner of the substrate, an upper electrode layer formed on the upper semiconductor layer, and an upper electrode pad formed on the upper electrode layer exposed at a second corner of the substrate. The upper electrode pad and the lower electrode are respectively disposed at the corners diagonally opposite to each other, and are symmetric with respect to those of adjacent another of the light emitting cells.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: October 9, 2012
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Yeo Jin Yoon, Jong Kyu Kim, Jun Hee Lee
  • Patent number: 8143620
    Abstract: Systems and methods for adaptively classifying audio sources are provided. In exemplary embodiments, at least one acoustic signal is received. One or more acoustic features based on the at least one acoustic signal are derived. A global summary of acoustic features based, at least in part, on the derived one or more acoustic features is determined. Further, an instantaneous global classification based on a global running estimate and the global summary of acoustic features is determined. The global running estimates may be updated and an instantaneous local classification based, at least in part, on the one or more acoustic features may be derived. One or more spectral energy classifications based, at least in part, on the instantaneous local classification and the one or more acoustic features may be determined. In some embodiments, the spectral energy classification is provided to a noise suppression system.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: March 27, 2012
    Assignee: Audience, Inc.
    Inventors: Stephen Malinowski, Carlos Avendano
  • Patent number: 8129729
    Abstract: A light-emitting device operating on a high drive voltage and a small drive current. LEDs (1) are two-dimensionally formed on an insulating substrate (10) of e.g., sapphire monolithically and connected in series to form an LED array. Two such LED arrays are connected to electrodes (32) in inverse parallel. Air-bridge wiring (28) is formed between the LEDs (1) and between the LEDs (1) and electrodes (32). The LED arrays are arranged zigzag to form a plurality of LEDs (1) to produce a high drive voltage and a small drive current. Two LED arrays are connected in inverse parallel, and therefore an AC power supply can be used as the power supply.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: March 6, 2012
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Shiro Sakai, Jin-Ping Ao, Yasuo Ono
  • Patent number: 8044415
    Abstract: A luminous structure based on light-emitting diodes, which includes: a first dielectric element with a substantially plane main face associated with a first electrode; a second dielectric element with a substantially plane main face associated with a second electrode that faces the first electrode and lies in a different plane; at least a first light-emitting diode including a semiconductor chip including, on first and second opposed faces, first and second electrical contacts, the first electrical contact being electrically connected to the first electrode, the second electrical contact being electrically connected to the second electrode, and at least the first element at least partly transmitting radiation within the ultraviolet or in the visible.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: October 25, 2011
    Assignee: Saint-Gobain Glass France
    Inventors: Rino Messere, Philippe Armand
  • Patent number: 8035115
    Abstract: A semiconductor apparatus includes a substrate; and a plurality of semiconductor thin films formed on said substrate, each of said semiconductor thin films having a pn-junction, and electrodes of p-type and n-type for injecting carriers to the pn-junction, wherein said semiconductor thin films are formed so that all or a part of said pn-junctions are connected serially. As different from a semiconductor thin film constituted of a single pn-junction, the light emission with the invented semiconductor apparatus is the summation of the light emission intensities of the entire pn-junctions, so that the light emitting intensity can be increased largely.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: October 11, 2011
    Assignee: Oki Data Corporation
    Inventors: Mitsuhiko Ogihara, Takahito Suzuki, Hiroshi Kurokawa, Taishi Kaneto
  • Patent number: 8017969
    Abstract: An LED chip package structure with high-efficiency light emission by rough surfaces includes a substrate unit, a light-emitting unit, and a package colloid unit. The substrate unit has a substrate body, and a positive electrode trace and a negative electrode trace respectively formed on the substrate body. The light-emitting unit has a plurality of LED chips arranged on the substrate body. Each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected with the positive electrode trace and the negative electrode trace of the substrate unit. The package colloid unit has a plurality of package colloids respectively covering the LED chips. Each package colloid has a cambered colloid surface and a light-emitting colloid surface respectively formed on its top surface and a lateral surface thereof.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: September 13, 2011
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Shih-Yu Wu, Wen-Kuei Wu
  • Patent number: 8017956
    Abstract: A wiring electrode is provided on a mount substrate. A light emitting element is provided on the wiring electrode to connect electrically with the wiring electrode and is configured to emit a blue to ultraviolet light. A reflective film is provided above the light emitting element to cover the light emitting element so that a space is interposed between the reflective film and the light emitting element. The reflective film is capable of transmitting the blue to ultraviolet light. A fluorescent material layer is provided above the light emitting element to cover the light emitting element so that the reflective film is located between the fluorescent material layer and the light emitting element. A light from the fluorescent material layer is reflected by the reflective film.
    Type: Grant
    Filed: December 7, 2009
    Date of Patent: September 13, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideto Furuyama
  • Patent number: 7956366
    Abstract: A monolithic light-emitting device and driving method therefore includes a plurality of light-emitting diodes, array-arranged monolithically on a single substrate. The light-emitting diodes include a pn junction-containing semiconductor material and a phosphor-containing layer passing light emitted from the semiconductor material, absorbing part, or whole of the light for conversion into light having a different wavelength. The array is constituted of a light-emitting diode group consisting of m (m?2) pieces of the light-emitting diode, the light emitting diode group being constituted of N types (N?2, providing N?m) of light-emitting diodes, each having either one of preset N types of light-emitting spectrum patterns. An average light-emitting spectrum from the whole array can be changed by regulating a power supplied to the light-emitting diodes for each light-emitting diode group sorted according to the type of the light-emitting spectrum pattern.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: June 7, 2011
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Yuichi Hiroyama, Masahiko Hata, Yoshihiko Tsuchida
  • Patent number: 7939836
    Abstract: A semiconductor light emitting element having a rectangular shape in plan view comprising at least a first side and a second side adjacent to the first side, the semiconductor light emitting element including a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, a plurality of first electrodes having a long shape along the first side and being arranged on the first conductivity-type semiconductor layer in a lattice form of x columns (x?2) along the first side and y rows (y>x) along the second side, and a second electrode arranged on the second conductivity-type semiconductor layer. The first electrode and the second electrode are arranged on the same surface side. The first electrode is surrounded by the first conductivity-type semiconductor layer, the second conductivity-type semiconductor layer, and the second electrode is provided.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: May 10, 2011
    Assignee: Nichia Corporation
    Inventors: Akinori Yoneda, Akiyoshi Kinouchi
  • Patent number: 7875882
    Abstract: A display device includes a plurality of light emitting elements arranged in a matrix. A scan signal is made to flow into a gate signal line and a data signal is made to flow into a source signal line so that the data signal is applied to a source electrode and the scan signal is supplied to a gate electrode of a control TFT arranged at a portion where the both signal lines intersect when viewed from above. Thus, when the control TFT is turned ON, a drive TFT having a gate electrode connected to the drain electrode is turned ON, so that current is supplied from a power supply line via the source electrode and the drain electrode of the drive TFT to an organic EL element and the organic EL element emits light. A holding capacity is present between the control TFT and the drive TFT. Even when the scan signal becomes LOW level and the control TFT turns OFF, the gate potential of the drive TFT is held for a predetermined period of time by the holding capacity and the organic EL element continues to emit light.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: January 25, 2011
    Assignees: Sanyo Electric Co., Ltd., Tottori Sanyo Electric Co., Ltd
    Inventors: Satoshi Morita, Shinichiro Tanaka, Osamu Kobayashi
  • Patent number: 7872257
    Abstract: An n-type TFT and a p-type TFT are realized by selectively changing only a cover coat without changing a TFT material using an equation for applying the magnitude of a difference in the Fermi energy between an interface of semiconductor and an electrode and between an interface of semiconductor and insulator. At this time, in order to configure a predetermined circuit, the process is performed, as a source electrode and a drain electrode of the p-type TFT and a source electrode and a drain electrode of the n-type TFT being connected all, respectively, and an unnecessary interconnection is cut by irradiating light using a scanning laser exposure apparatus or the like.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: January 18, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Tomihiro Hashizume, Yuji Suwa, Masaaki Fujimori, Tadashi Arai, Takeo Shiba
  • Patent number: 7858995
    Abstract: A semiconductor light emitting device includes a substrate, and a light emitting portion that is disposed on the substrate, and includes an active layer formed of a group III nitride semiconductor using a nonpolar plane or a semipolar plane as a growth principal surface, in which side end surfaces of the active layer are specular surfaces.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: December 28, 2010
    Assignee: Rohm Co., Ltd.
    Inventors: Satoshi Nakagawa, Hiroki Tsujimura
  • Patent number: RE44163
    Abstract: A semiconductor light emitting device having a semiconductor stacking structure bonded onto the support member and having excellent characteristics is provided by a preferable electrode structure. The semiconductor light emitting device comprising; a semiconductor stacking structure having a first semiconductor layer and a second semiconductor layer of conductivity types different from each other, a first electrode connected to the first semiconductor layer, and a second electrode connected to the second semiconductor layer, wherein one principal surface of the first electrode has a portion that makes contact with the first semiconductor layer so as to establish electrical continuity and an external connection section.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: April 23, 2013
    Assignee: Nichia Corporation
    Inventor: Kazuyuki Akaishi