Abstract: A semiconductor light emitting device includes a multi-layered semiconductor layer having at least a first conductive type cladding layer, an active layer, a second conductive type first cladding layer, an etching stop layer, and a second conductive type second cladding layer on a substrate. An upper section of a ridge groove is formed by an anisotropic etching process, as a first groove in such a way as to have a depth from a surface of the multi-layered semiconductor layer and as not to cross the etching stop layer at the depth. A bottom groove of the ridge groove is formed by an isotropic etching process, as a second groove by performing etching in such a way as to be stopped by the etching stop layer.

Abstract: A light-emitting element including a light-emitting thyristor and a Schottky barrier diode is provided. A Schottky barrier diode is formed by contacting a metal terminal to a gate layer of a three-terminal light-emitting thyristor consisting of a PNPN-structure. A self-scanning light-emitting element array may be driven at 3.0V by using such a Schottky barrier diode as a coupling diode of a diode-coupled self-scanning light-emitting element array.

Abstract: An integrated circuit including a memory cell includes a vertical bipolar select device including a base and an emitter. The memory cell includes a resistive memory element coupled to the emitter and a buried metallized word line contacting the base.

Abstract: A light-emitting device comprises first and second dot members. The first dot member is formed so that it makes contact with the second dot member. The first dot member comprises a plurality of first quantum dot layers. Each of the plurality of first quantum dot layers comprises a plurality of first quantum dots and a silicon dioxide film. The first quantum dot comprises an n-type silicon dot. The second dot member comprises a plurality of second quantum dot layers. Each of the plurality of second quantum dot layers comprises a plurality of second quantum dots and a silicon dioxide film. The second quantum dot comprises a p-type silicon dot.

Abstract: A semiconductor light emitting device having a semiconductor stacking structure bonded onto the support member and having excellent characteristics is provided by a preferable electrode structure. The semiconductor light emitting device comprising; a semiconductor stacking structure having a first semiconductor layer and a second semiconductor layer of conductivity types different from each other, a first electrode connected to the first semiconductor layer, and a second electrode connected to the second semiconductor layer, wherein one principal surface of the first electrode has a portion that makes contact with the first semiconductor layer so as to establish electrical continuity and an external connection section.

Abstract: Light-emitting devices, and related components, processes, systems and methods are disclosed.

Abstract: An illuminator (1) has bare semiconductor die light emitting diodes (7) on pads (11) of Ag/Ni/Ti material. A Si wafer (13) has a rough upper surface, and this roughness is carried through an oxide layer (12) and the pads (11) to provide a rough but reflective upper surface of the pads (11), thus forming a diffuser. Epoxy encapsulant (9) is deposited in a layer over the diodes (7) and the pads (11), and it is index matched with a top diffuser plate (8) of opal glass.

Abstract: Provided is an organic EL device and fabrication method thereof that can prevent the performance of the organic EL layer and the TFT from being lowered in forming the cathode using an E-beam heating evaporation process. The organic EL device includes a substrate, an anode, an organic EL layer, a cathode, and a transparent electrode connected with the cathode to extract the cathode to an outside, and further includes an interconnection line connected to the transparent electrode, for discharging charges accumulated on the cathode outside the organic EL device. According to the present invention, since the charges generated on the cathode can be removed through the interconnection line, the underlying organic EL layer and the TFT can be prevented from being damaged, so that the device reliability can be enhanced.

Abstract: A light-emitting element including a light-emitting thyristor and a Schottky barrier diode is provided. A Schottky barrier diode is formed by contacting a metal terminal to a gate layer of a three-terminal light-emitting thyristor consisting of a PNPN-structure. A self-scanning light-emitting element array may be driven at 3.0V by using such a Schottky barrier diode as a coupling diode of a diode-coupled self-scanning light-emitting element array.

Abstract: A light-emitting device includes an element array portion and an auxiliary interconnect. The element array portion includes a plurality of element groups. Each element group includes a plurality of light-emitting elements arranged in a first direction. Each light-emitting element has a structure such that a light-emitting layer lies between a first electrode and a second electrode. The element groups are arranged in a second direction perpendicular to the first direction. The auxiliary interconnect is formed of a material having a resistivity lower than the resistivity of the second electrode and is electrically connected to the second electrode of each light-emitting element. The plurality of element groups include a first element group and a second element group adjacent to each other and a third element group adjacent to the opposite side of the second element group from the first element group.

Abstract: In a nitride semiconductor light emitting device having patterns formed on the upper and lower surfaces of a substrate from which light is emitted in a flip chip bonding structure, the patterns are capable of changing light inclination at the upper and lower surfaces of the substrate to decrease total reflection at the interfaces, thereby improving light emitting efficiency.

Abstract: A light-emitting element using GaN. On a substrate (10), formed are an SiN buffer layer (12), a GaN buffer layer (14), an undoped GaN layer (16), an Si-doped n-GaN layer (18), an SLS layer (20), an undoped GaN layer (22), an MQW light-emitting layer (24), an SLS layer (26), and a p-GaN layer (28), forming a p electrode (30) and an n electrode (32). The MQW light-emitting layer (24) has a structure in which InGaN well layers and AlGaN barrier layers are alternated. The Al content ratios of the SLS layers (20, and 26) are more than 5% and less than 24%. The In content ratio of the well layer in the MQW light-emitting layer (24) is more than 3% and less than 20%. The Al content ratio of the barrier layer is more than 1% and less than 30%. By adjusting the content ratio and film thickness of each layer to a desired value, the light luminous efficiency for wavelength of less than 400 nm is improved.

Abstract: A nonvolatile memory cell with a charge storage structure is read by measuring current (such as band-to-band current) between the substrate region of the memory cell and at least one of the current carrying nodes of the memory cell. To enhance the operation of the nonvolatile memory cell, the band structure engineering is used to alter the band structure between a bulk part of the device and another part of the device supporting the measurement current.

Abstract: A light-emitting diode array comprising a conductive layer formed on a substrate, pluralities of separate light-emitting portions formed on the conductive layer, a first groove formed in the conductive layer to divide the light-emitting portions to blocks, a first electrodes formed on at least part of an upper surface of each light-emitting portion, a second electrode formed directly on the conductive layer in each block, switching common wirings separately connecting the first electrodes and first bonding pads each connected to each common wiring, first bonding pads each connected to each common wiring, and second bonding pads each connected to each second electrode, the first bonding pads and the second bonding pads being arranged longitudinally in a row, and a ratio of the number of the first bonding pads to the number of the second bonding pads being 1:n (n?3).

Abstract: A light emitting element array is made with large light emitting elements and small light emitting elements are arranged on a substrate in a matrix-like form. The large light emitting element has the luminescent area of about 1 mm square. There is a clearance N1 of about 0.5 mm between the large light emitting elements. The small light emitting element has the luminescent area of about 0.5 mm square, and each small light emitting element is disposed at a position corresponding to each clearance N1 in the scanning direction. Because the large light emitting elements and the small light emitting elements do not overlap each other in the scanning direction, even if the light emitting element array comes close to a thermosensitive recording paper, there becomes no uneven distribution of light quantity of the light emitting element array in the scanning direction.

Abstract: A semiconductor device (101) is provided herein which comprises a substrate (103) comprising germanium. The substrate has source (107) and drain (109) regions defined therein. A barrier layer (111) comprising a first material that has a higher bandgap (Eg) than germanium is disposed at the boundary of at least one of said source and drain regions. At least one of the source and drain regions comprises germanium.

Abstract: A strained-silicon (Si) channel CMOS device shallow trench isolation (STI) oxide region, and method for forming same have been provided. The method forms a Si substrate with a relaxed-SiGe layer overlying the Si substrate, or a SiGe on insulator (SGOI) substrate with a buried oxide (BOX) layer. The method forms a strained-Si layer overlying the relaxed-SiGe layer; a silicon oxide layer overlying the strained-Si layer, a silicon nitride layer overlying the silicon oxide layer, and etches the silicon nitride layer, the silicon oxide layer, the strained-Si layer, and the relaxed-SiGe layer, forming a STI trench with trench corners and a trench surface. The method forms a sacrificial oxide liner on the STI trench surface. In response to forming the sacrificial oxide liner, the method rounds and reduces stress at the STI trench corners, removes the sacrificial oxide liner, and fills the STI trench with silicon oxide.

Abstract: A wafer level semiconductor package with a build-up layer is provided, which includes a glass frame having a through hole for receiving a semiconductor chip therein, a low-modulus buffer material filled within the space formed between the semiconductor chip and the glass frame, a build-up layer formed on the glass frame and the semiconductor chip such that the build-up layer is electrically connected to the semiconductor chip, and a plurality of conductive elements mounted on the build-up layer so that the semiconductor chip is electrically connected to external devices. With the use of the glass frame and low-modulus buffer material, the wafer level semiconductor package thus-obtained is free from warpage, chip-crack, and delamination problems and the reliability thereof is enhanced. A method for fabricating the wafer level semiconductor package is also provided.

Abstract: A semiconductor laminating portion including a light emitting layer forming portion having at least an n-type layer and a p-type layer is formed on a semiconductor substrate. A current blocking layer is partially formed on its surface while a current diffusing electrode is formed on the entire surface thereof. The current diffusing electrode is patterned into a plurality of light emitting unit portions (A), electrode pad portion (B), and connecting portions (C) for connecting between the electrode pad portion (B) and the light emitting unit portions (A) or between two of the light emitting unit portions (A), and a part of the semiconductor laminating portion may be etched according to the patterning of the current diffusing electrode. The bonding electrode may be formed on the electrode pad portion (B) which is formed so as to make the light emitting layer forming portion non-luminous.

Abstract: A display device is formed by burying at least part of a light emitting device in an insulating material, wherein a drive electrode for the light emitting device is formed so as to be extracted on a surface of the insulating material. A display unit is produced by two-dimensionally arraying such light emitting devices on a base body. Since the display device is modularized by burying a light emitting device finely formed in an insulating material, to re-shape the light emitting device into a size easy to handle, it is possible to suppress the production cost of the display unit using such display devices, and to ensure a desirable handling performance of the light emitting device; for example, facilitate the carrying of the light emitting device or the mounting thereof on a base body.

Abstract: An OLED device having green emitting regions disposed over a substrate, and wherein each green emitting region includes one or more light-emitting layer(s), a reflector and a semitransparent reflector respectively disposed on opposite sides of the light-emitting layer(s) and arranged to resonate light produced by such layers such that the light has a substantial green spectral component, and a yellow color filter element disposed in relationship to each green emitting region to produce green light.

Abstract: A number of red LEDs, green LEDs, and blue LEDs are mounted on one surface of a polygonal flexible multilayer substrate. The LEDs are connected in series according to color. A red feeder terminal, a green feeder terminal, a blue feeder terminal, and a common terminal are provided on each of at least three sides of the periphery of the flexible multilayer substrate. Circuit patterns for connecting LEDs at the high-potential end of the red, green, and blue series-connected LEDs respectively to the red feeder terminals, green feeder terminals, and blue feeder terminals are provided to the flexible multilayer substrate. Also, a circuit pattern for connecting LEDs at the low-potential end of the red, green, and blue series-connected LEDs all to the common terminals is provided to the flexible multilayer substrate.

Abstract: A number of red LEDs, green LEDs, and blue LEDs are mounted on one surface of a polygonal flexible multilayer substrate. The LEDs are connected in series according to color. A red feeder terminal, a green feeder terminal, a blue feeder terminal, and a common terminal are provided on each of at least three sides of the periphery of the flexible multilayer substrate. Circuit patterns for connecting LEDs at the high-potential end of the red, green, and blue series-connected LEDs respectively to the red feeder terminals, green feeder terminals, and blue feeder terminals are provided to the flexible multilayer substrate. Also, a circuit pattern for connecting LEDs at the low-potential end of the red, green, and blue series-connected LEDs all to the common terminals is provided to the flexible multilayer substrate.

Abstract: There are provided first and second optical waveguides formed on a semiconductor substrate and having upper clad layers and core layers that are separated mutually respectively, first and second phase modulation electrodes formed on the first and second optical waveguides respectively, and first and second slot-line electrodes formed on the semiconductor substrate on both sides of the first and second optical waveguides and connected to the first and second phase modulation electrodes via air-bridge wirings separately respectively.

Abstract: A light-emitting-element array has a semiconductor layer formed on a current-blocking layer. Light-emitting elements are formed in the semiconductor layer by diffusion of an impurity of a different conductive type. An isolation trench divides the semiconductor layer into a first region and a remaining region, and divides the array of light-emitting elements into segments disposed alternately in these two regions, each segment preferably including one or two light-emitting elements. A first shared interconnecting pad is electrically coupled to the light-emitting elements in the first region by electrical paths not crossing the isolation trench. A second shared interconnecting pad is electrically coupled to light-emitting elements in the remaining semiconductor region by electrical paths crossing the isolation trench. The array can then be driven by a number of separate interconnecting pads equal to half the number of the light-emitting elements.

Abstract: A light shield apparatus and formation method for preventing the transmission of incident light towards active devices of the display. In one embodiment, the present invention recites forming a plurality of metal pixels wherein adjacent ones of the plurality of metal pixels have a gap region disposed therebetween. The present embodiment then recites depositing a light absorbing antireflective coating material within the gap region to form a light shield such that transmission of incident light through the gap region towards underlying active devices is reduced. Hence, the present embodiments also reduce problems associated with Liquid Crystal alignment difficulty and passivation integrity (cracking of thin passivation). Next, the present embodiment deposits a thin composite passivation layer above the plurality of metal pixels and the antireflective coating material.

Abstract: A signal transmission circuit, a CMOS semiconductor device, and a circuit board improve the signal transmission characteristic of a signal line having a large capacitance that is generated on the long signal line inside a large-scale integrated circuit when the signal line is long or when many driven circuits are connected to the signal line. The midpoint voltage of the power source voltage of the drive circuit and driven circuit is output. An assist-circuit having low output impedance is then connected to the signal line. The voltage of the signal line is thus held at the midpoint voltage of the power source voltage. At the same time, a drive signal that is output from the driver circuit is excited centered at the midpoint voltage (threshold voltage of the driven circuit) with a small amplitude. The driven circuit is then driven by this drive signal that is restricted to the small amplitude.

Abstract: A semiconductor device includes semiconductor elements, a housing for accommodating the semiconductor elements, a resin material arranged in the housing for enclosing the semiconductor elements, and leads connected to the semiconductor elements. Each lead is divided into two portions, that is, an inner portion embedded in the resin material and an outer portion protruding from the resin material. The outer portion of the lead is provided with an enlarged part having a barrier surface directed toward the resin material.

Abstract: A thermoelectric semiconductor has a P-type semiconductor and an N-type semiconductor disposed in parallel. A heat absorbing side of the thermoelectric semiconductor and a substrate that has an optical element mounted on its upper surface are disposed on the same plane. A heat radiation side of the thermoelectric semiconductor is disposed such that a direction from the heat absorbing side to the heat radiation side of the thermoelectric semiconductor is parallel with the upper surface of the substrate. Based on this arrangement, it is possible to set the environmental temperature of an optical module to the same level as the operation temperature of a laser diode.

Abstract: An optical semiconductor device comprising: an active region; and a p-doped cladding region disposed on one side of the active region; wherein an electron-reflecting barrier is provided on the p-side of the active region for reflecting both &Ggr;-electrons and X-electrons, the electron-reflecting barrier providing a greater potential barrier to &Ggr;-electrons than the p-doped cladding region.

Abstract: A semiconductor device has a substantially linear array of semiconductor blocks of one conductive type, each includes a diffusion region of the opposite conductive type and a electrode. The array is paralleled by an array of electrode pads, each connected to two semiconductor blocks, being connected to the diffusion region in one of the two semiconductor blocks and to the electrode in the other one of the two semiconductor blocks. The electrode pad can thus activate both semiconductor blocks, activating one semiconductor block when placed at one potential, and activating the other semiconductor block when placed at another potential. Efficient driving with a comparatively small number of electrode pads thus becomes possible.

Abstract: A PIN photodetector includes reduced parasitic capacitance and is suitable for high-speed applications. Metal interconnect leads are coupled to the photodetector and extend over electrically insulating regions which reduce or eliminate parasitic capacitance. The electrically insulating regions may be formed by a deep proton implantation process which introduces impurities into the N-type layer, P-type layer and intrinsic layer in portions of the inactive area according to one embodiment. In another embodiment, the electrically insulating regions may be formed by removing parts of the film stack that includes N-type layer, P-type layer and intrinsic layer, from portions of the inactive area, introducing impurities and optionally adding a dielectric material. The PIN photodetector may take on the shape of a mesa to provide contact to each of the upper and lower electrodes.

Abstract: In a method of manufacturing matrix electron emitter arrays, each array comprising a plurality of scanning lines formed on a glass substrate and arranged in parallel with each other, a plurality of signal lines formed in a direction to cross the scanning lines and arranged in parallel with each other, and field-emission type electron emitters formed in the pixel areas which are arranged at the intersections of the scanning lines and the signal lines, a pulse voltage with a specific polarity and another pulse voltage with the reverse polarity are applied to any two of the scanning lines and current is caused to flow through electron emitters connected in series-via a signal line, thereby subjecting the conductive thin film constituting an electron emitter to a conductive activation process for forming an electron emitting section.

Abstract: This invention discloses the basic chip architecture and packing configuration required to build an all silicon opto-coupler in which a forward biased silicon PN junction diode is used as the LED. Construction of the LED and the detector are disclosed as well as the package chip configuration. Methods for isolating circuit structures from the LED are also disclosed so that CMOS and bipolar circuits can freely added to the transmitting chip as well as the receiving chip. Bi-directional data transmission and multi-channel operation is also shown.

Abstract: An integrated LED driving device for multiple LED strings which employs a single linear regulator or other controller and a multiple-output current mirror which is almost independent of the DC input voltage source, almost independent of the transistor's or MOSFET's variations from the semiconductor integration process, and almost independent of temperature variation. The multiple-output current mirror includes a plurality of transistors or MOSFETs each of which are integrated on the same substrate, with identical width-to-length channel ratios and with identical source and gate connections. The integrated LED driving device provides for automatic current sharing in a DC mode and, alternately, with minimized phase delays in a PWM mode. The mirror-output current mirror may include mirror-cascode transistor pairs.

Abstract: Light emitting diodes (LEDs) and LED bars and LED arrays formed of semiconductive material such as III-V and particularly AIGaAs/GaAs material are formed in very thin structures using organometallic vapor deposition (OMCVD). Semiconductor p-n junctions are formed as deposited using carbon as the p-type impurity dopant. Various lift-off methods are described which permit back side processing when the growth substrate is removed and also enabled device registration for LED bars and arrays to be maintained.

Abstract: A wavelength selectable, controlled chirp, semiconductor laser system is provided. By coupling a passive cavity, including an external output mirror with a selected reflectivity, to the active cavity of a laser device, chirp is reduced by approximately the ratio of the length of the active cavity to the length of the passive cavity. In such a device, changing the length of the passive cavity by manipulating the position of the output mirror allows for selecting an output wavelength of the laser device.

Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis.

Abstract: A semiconductor device has a first surface with at least one wire bonding pad, a second surface located opposite to the first surface, and at least one side sloping inward from the first surface to the second surface. According to a first aspect of the invention, all wire bonding pads formed on the first surface are formed in the part opposite the second surface, so that mechanical loads applied during wire bonding are transmitted to the second surface and do not cause cracks in the sloping side. According to a second aspect of the invention, when an array of such semiconductor devices is mounted on a substrate, resin mounds supporting the sloping sides are formed between the semiconductor devices, so that mechanical loads transmitted to the sloping sides during wire bonding are then transmitted through the resin mounds to the substrate.

Abstract: It is an object of the present invention to provide a surface light-emitting device that can realize a lightweight and compact-profile optical input/output device with reasonable price, especially the one that emits light. The beam generator 12 comprises a surface light-emitting device having a stacked-layer formed of a cathode 2, a luminescent layer 4 made of organic material(s) and an anode 6 in that order, the stacked-layer being located adjacent to a glass substrate 8. The anode 6 is a transparent electrode that is formed to correspond to a hologram pattern of a condensing lens. When a DC voltage is applied between the cathode 2 and the anode 6 with the DC power source, the luminescent layer 4 illuminate corresponding to the hologram pattern of the condensing lens, and the light will converge to a focal point of the condensing lens. Therefore, the surface light-emitting device can play the both roles of the light source and the condensing lens.

Abstract: Light emitting diodes each comprising a body of semiconductor material having a first side surface, a second side surface, and a top surface; and a stripe of conductive material over the top surface of the body. The stripe has a first segment and a second segment, each extending from the first side surface to the second side surface of the body. The first and second segments of the stripe are configured such that they are substantially non-parallel, and the width of the stripe at its ends is less than the width of the stripe intermediate its ends.

Abstract: A method and circuit are presented for the all optical recovery of the clock signal from an arbitrary optical data signal. The method involves two stages. A first stage preprocesses the optical signal by converting a NRZ signal to a PRZ signal, or if the input optical signal is RZ, by merely amplifying it. In a preferred embodiment this stage is implemented via an integrated SOA in each arm of an asymmetric interferometric device. The output of the preprocessing stage is fed to a clock recovery stage, which consists of a symmetric interferometer that locks on to the inherent clock signal by using the second stage input signal to trigger two optical sources to self oscillate at the clock rate. In a preferred embodiment the second stage is implemented via SOAs integrated in the arms of an interferometer, with two DFB lasers as terminuses. The output of the interferometer is an optical clock signal at the clock rate of the original input.

Abstract: A 1200 dpi LED may be manufactured without highly accurate mask alignment and provide good light radiation efficiency. A first interlayer dielectric is formed on a semiconductor substrate and has a plurality of first windows formed therein and aligned in a row. A diffusion region is formed in the semiconductor substrate through each of the first windows. An electrode is formed to have an area in contact with the corresponding diffusion region. Another electrode is formed on the other side of the substrate. A second interlayer dielectric is formed on the first interlayer dielectric such that the second interlayer dielectric does not overlap the area of the electrode and does not extend to a first perimeter of the area.

Abstract: A circuit board is provided with blind connection vias which are filled with solder. The end portions of the pins of an electronic component are inserted into the connection vias, and are connected to the connection vias by solder. The electronic component is surface mounted on the circuit board with the major portions of the pins exposed.

Abstract: A multicolor organic light emitting device employs vertically stacked layers of double heterostructure devices which are fabricated from organic compounds. The vertical stacked structure is formed on a glass base having a transparent coating of ITO or similar metal to provide a substrate. Deposited on the substrate is the vertical stacked arrangement of three double heterostructure devices, each fabricated from a suitable organic material. Stacking is implemented such that the double heterostructure with the longest wavelength is on the top of the stack. This constitutes the device emitting red light on the top with the device having the shortest wavelength, namely, the device emitting blue light, on the bottom of the stack. Located between the red and blue device structures is the green device structure.

Abstract: A high density LED array with semiconductor interconnects includes a plurality of layers of material stacked on a substrate including a conductive layer, a first carrier confinement layer, an active layer, and a second carrier confinement layer. The layers are separated into isolated LEDs in a matrix of rows and columns with the conductive layer connecting a first electrode of each LED in a column to a first electrode of each other LED in the column. Row conductors connect a second electrode of each LED in a row to a second electrode of each other LED in the row and column conductors are connected to the conductive layer of each column.

Abstract: A light emitting diode array has light emitting dots arranged in a line and is characterized in that a semiconductor substrate of a chip constituting the light emitting diode array has a Dovetail grooved mesa shape on a chip end face opposed to an adjacent chip and arranged in a direction perpendicular to an arranging direction of light emitting diodes. A light emitting portion can be protected from chipping even when a length from the light emitting portion of the light emitting diode array to a chip end portion is shorter than the size of a chipping portion.

Abstract: A semiconductor light emitting light concentration device is described which has a multiple diffraction ring for collecting and concentrating the light emitted from an LED integrally formed into the electrode at the semiconductor substrate end of the light emitting device.

Abstract: In an optical printer head or image reading apparatus, light emitting diodes, photo detectors and other picture elements are formed, by a specified number of pieces individually, as picture element arrays, and these arrays are linearly arranged. The distance of the picture elements at the adjacent outermost positions of the arrays, that is, the distance between the arrays, and the position of the heightwise direction of the arrays must be composed to be identical. Accordingly, the positioning marks are formed in the arrays in the same manufacturing process of the picture elements, and the distance between the arrays is adjusted at high precision. The arrays are affixed to the wiring substrate with an adhesive, and at this time by adjusting the layer thickness of the adhesive, the positions in the heightwise direction of the array surface are identically controlled.