Abstract: An inductor component comprises an element body; first and second inductors in the body; first and second columnar wirings in the body with end surfaces exposed from a first principal surface of the body and electrically connected to the first inductor; third and fourth columnar wirings in the body with end surfaces exposed from the first principal surface and electrically connected to the second inductor; first through fourth external terminals contacting the end surfaces of the first through fourth columnar wirings, respectively; and an insulating film on the first principal surface covering a portion of the end surface of the first and third columnar wiring not contacting the first and third terminals, respectively. The first terminal is closer to the third terminal than the fourth terminal, and a shortest distance between the first and third terminals is longer than a shortest distance between the first and third columnar wirings.

Abstract: An inductor module and a method for fabricating the same are disclosed. The inductor module includes a substrate, a first inter-level dielectric layer, a plurality of second inter-level dielectric layers, a trench, and a first metal layer. The first inter-level dielectric layer is disposed on the substrate. The second inter-level dielectric layers are sequentially stacked on the first inter-level dielectric layer. The trench is disposed to penetrate at least two of the second inter-level dielectric layers. The first metal layer is disposed in the trench. The first metal layer has a top side surface and a bottom side surface opposite to each other. The top side surface is coplanar with an upper surface of the trench in the second inter-level dielectric layers. The bottom side surface is coplanar with a bottom surface of the trench in the second inter-level dielectric layers.

Abstract: A coil component includes a body, a support substrate disposed within the body, a coil portion disposed on the support substrate and having first and second lead-out portions exposed to respective surfaces of the body, a noise removal portion disposed within the body and spaced apart from the coil portion, and including a pattern portion forming an open loop and having a slit between one end portion thereof and another end portion thereof spaced apart from each other. The noise removal portion also includes a third lead-out portion connected to the pattern portion and having one surface exposed to a side surface of the body. An insulating layer is disposed between the coil portion and the noise removal portion, and first to third external electrodes are disposed on respective surfaces of the body and connected to the first to third lead-out portions, respectively.

Abstract: A manufacturing method of a package includes at least the following steps. A carrier is provided. An inductor is formed over the carrier. The inductor includes a first portion, a second portion, and a third portion. The first portion is parallel to the third portion, and the second portion connects the first portion and the third portion. A die is placed over the carrier. The die is surrounded by the inductor. An encapsulant is formed between the first portion and the third portion of the inductor. The encapsulant laterally encapsulates the die and the second portion of the inductor.

Abstract: An inductor or transformer with the inductor can include one or more windings split into strands along a radial path of the winding and provide for a more uniform current distribution across a width of the winding. The winding(s) can comprise twisting components as twistings or strand crossings located at various locations along the winding. The twisting components span the winding along a winding width with a connector or crossing strand and change a position of one strand to another at points that different strands of the winding are cut or spliced.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a first magnetic element and a second magnetic element over the semiconductor substrate. The semiconductor device structure also includes a first conductive line extending exceeding an edge of the first magnetic element. The semiconductor device structure further includes a second conductive line extending exceeding an edge of the second magnetic element. The second conductive line is electrically connected to the first conductive line.

Abstract: A patterned shielding structure is disposed between an inductor structure and a substrate. The patterned shielding structure includes a shielding layer and a first stacked structure. The shielding layer extends along a plane. The first stacked structure is stacked, along a first direction, on the shielding layer. The first direction is perpendicular to the plane. The first stacked structure has a crossed shape and is configured to enhance a shielding effect.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to dummy fill structures and methods of manufacture. The structure includes: a passive device formed in interlevel dielectric material; and a plurality of metal dummy fill structures composed of at least one main branch and two extending legs from at least one side of the main branch, the at least two extending legs being positioned and structured to suppress eddy currents of the passive device.

Abstract: A power converter is embodied on a semiconductor substrate member and has a first region with a passive electrical component with a first electrically conductive layer pattern of an electrically conductive material and a second electrically conductive layer pattern of an electrically conductive material deposited on respective sides of the semiconductor substrate member. A trench or through-hole is formed (by etching) in the substrate within the first region, and the electrically conductive material is deposited at least on a bottom portion of the trench or on a sidewall of the through-hole and electrically connected to one or both of the first conductive layer pattern and the second conductive layer pattern. A second region has an active semiconductor component integrated with the semiconductor substrate by being fabricated by a semiconductor fabrication process. There is also provided a power supply, such as a DC-DC converter, embedded the semiconductor substrate member.

Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.

Abstract: An integrated circuit (IC) structure includes a transistor, a front-side interconnection structure, a backside via, and a backside interconnection structure. The transistor includes a source/drain epitaxial structure. The front-side interconnection structure is on a front-side of the transistor. The backside via is connected to the source/drain epitaxial structure of the transistor. The backside interconnection structure is connected to the backside via and includes a conductive feature, a dielectric layer, and a spacer structure. The conductive feature is connected to the backside via. The dielectric layer laterally surrounds the conductive feature. The spacer structure is between the conductive feature and the dielectric layer and has an air gap.

Abstract: A semiconductor device is provided. The semiconductor device comprises an inductor in a far back end of line layer and a capacitor adjacent to and electrically coupled with the inductor. The capacitor comprises a first electrode layer arranged over sidewalls and a bottom surface of a via in a first insulating layer A dielectric layer is provided over the first electrode layer. A second electrode layer is provided over the dielectric layer and a metal fill layer is provided over the second electrode layer. The metal fill layer has a top surface at least level with a top surface of the first insulating layer.

Abstract: Embodiments of the disclosure generally relate to methods of forming gratings. The method includes depositing a resist material on a grating material disposed over a substrate, patterning the resist material into a resist layer, projecting a first ion beam to the first device area to form a first plurality of gratings, and projecting a second ion beam to the second device area to form a second plurality of gratings. Using a patterned resist layer allows for projecting an ion beam over a large area, which is often easier than focusing the ion beam in a specific area.

Abstract: Radio frequency (RF) switch circuitry is disclosed having a field-effect transistor with a drain, a source, and a gate, wherein the gate is driven by switch driver circuitry having a control terminal for receiving switch-on and switch-off signals and a driver terminal for outputting on-state and off-state voltages. The switch driver circuitry is configured to respond to the switch-on signal by generating the on-state voltage that when applied to the gate allows an RF signal to pass between the drain and the source and respond to the switch-off signal by generating the off-state voltage that when applied to the gate blocks the RF signal from passing between the drain and the source. A low-pass filter has an inductor coupled between the gate and the driver terminal, wherein a direct current (DC) path between the gate and the driver terminal has a total DC resistance of no more than 100 ?.

Abstract: The invention discloses crossing structures of an integrated transformer or an integrated inductor. The crossing structures can be applied to various integrated transformers or integrated inductors. The crossing structures disclosed in the present invention includes multiple segments fabricated on a first metal layer of the semiconductor structure and multiple segments fabricated on a second metal layer of the semiconductor structure, the first metal layer being different from the second metal layer.

Abstract: An inductor device includes a substrate, and a plurality of first trenches including a first metal on the substrate to form first metal layers. The first metal layers are arranged substantially parallel to the substrate. A plurality of second trenches including a second metal is over the first metal layers and includes first portions and second portions. The first portions are substantially parallel to and interdigitate the first metal layers. The second portions are substantially perpendicular to the first portions, extend from ends of the first portions, and are oriented in opposite directions such that the second portions extend over ends of adjacent first metal layers. A plurality of vias connects the first metal layers to the second metal layers. A plurality of magnetic trenches is over the first metal layers, under the second metal layers, and substantially parallel to the second portions of the plurality of second trenches.

Abstract: A LED light driver having a reduced overall thickness so as to facilitate placement within an octagon junction box and canopy. The LED light driver of the present invention includes a printed circuit board wherein the printed circuit board includes a first side and a second side and is planar in manner. The printed circuit board further includes a plurality of recesses formed on the first side and second side thereof so as to facilitate the reduction in the overall Z dimension of the LED light driver. The printed circuit board includes a metal base having an epoxy material utilized for insulation and an exterior case material. The metal base enclosed inside the epoxy further functions as a heat sink. The reduced height of the present invention further provides for less blockage of light and as such the LED light drive can be more proximate the light source.

Abstract: An organic interposer includes interconnect-level dielectric material layers embedding redistribution interconnect structures, at least one dielectric capping layer overlying a topmost interconnect-level dielectric material layer, a bonding-level dielectric layer overlying the at least one dielectric capping layer, and a dual-layer inductor structure, which may include a lower conductive coil embedded within the topmost interconnect-level dielectric material layer, a conductive via structure vertically extending through the at least one dielectric capping layer, and an upper conductive coil embedded within the bonding-level dielectric layer and comprising copper.

Abstract: Certain aspects of the present disclosure generally relate to a semiconductor device including an air gap underneath passive devices. The semiconductor device generally includes a substrate layer, a passive device layer, and a dielectric layer disposed between the substrate layer and the passive device layer, wherein the dielectric layer includes an air gap disposed beneath at least one passive device in the passive device layer.

Abstract: An electrically conductive, single-piece flat part (100) for a plug with first and second contact pins (112, 114) are arranged in two parallel rows, and with a connector region for a cable. The part has a connecting element (102). Conductors (108, 110) which open into the first and second contact pins (112, 114) extend from the first and from the second side of the connecting element, the conductors (108, 110) which lie on the opposite sides of the connecting element (102) being connected to the connecting element (102) in a manner which is offset with respect to one another in such a way that the imaginary straight extension of a conductor (108, 110) runs on the one side of the connecting element (102) next to one or between two conductors (108, 110) on the opposite side of the connecting element (102).

Abstract: A semiconductor device having 3D inductor includes a first transverse inductor, a longitudinal inductor and a second transverse inductor. The first transverse inductor is formed on a first substrate, the second transverse inductor and the longitudinal inductor are formed on a second substrate. The second substrate is bonded to the first substrate to connect the first transverse inductor and the longitudinal inductor such that the first transverse inductor, the longitudinal inductor and the second transverse inductor compose a 3D inductor.

Abstract: Integrated passive components in a stacked integrated circuit package are described. In one embodiment an apparatus has a substrate, a first die coupled to the substrate over the substrate, the first die including a power supply circuit coupled to the substrate to receive power, a second die having a processing core and coupled to the first die over the first die, the first die being coupled to the power supply circuit to power the processing core, a via through the first die, and a passive device formed in the via of the first die and coupled to the power supply circuit.

Abstract: Various semiconductor chip devices and methods of making the same are disclosed. In one aspect, an apparatus is provided that includes a first redistribution layer (RDL) structure having a first plurality of conductor traces, a first molding layer on the first RDL structure, plural conductive pillars in the first molding layer, each of the conductive pillars including a first end and a second end, a second RDL structure on the first molding layer, the second RDL structure having a second plurality of conductor traces, and wherein some of the conductive pillars are electrically connected between some of the first plurality of conductor traces and some of the second plurality of conductor traces to provide a first inductor coil.

Abstract: An electronic device and methods for inductively charging an electronic device using another external electronic device. The electronic device may include an enclosure, a battery positioned within the enclosure, and an inductive coil coupled to the battery. The inductive coil may have two or more operational modes, including a power receiving operational mode for wirelessly receiving power and a power transmitting operational mode for wirelessly transmitting power. The electronic device may also have a controller coupled to the inductive coil for selecting one of the operational modes.

Abstract: An electronic device and methods for inductively charging an electronic device using another external electronic device. The electronic device may include an enclosure, a battery positioned within the enclosure, and an inductive coil coupled to the battery. The inductive coil may have two or more operational modes, including a power receiving operational mode for wirelessly receiving power and a power transmitting operational mode for wirelessly transmitting power. The electronic device may also have a controller coupled to the inductive coil for selecting one of the operational modes.

Abstract: There are provided an inductor and a method of manufacturing the same. The inductor includes: a body including a coil part; and cover parts disposed on upper and lower surfaces of the body. The coil part includes a plurality of through-vias penetrating through the upper and lower surfaces of the body and connection patterns disposed on the upper and lower surfaces of the body, disposed in the cover parts, and connecting the plurality of through-vias to each other.

Abstract: Disclosed herein is a coil component that includes an insulating substrate, a first coil part formed on the first surface of the insulating substrate, and a second coil part formed on the second surface of the insulating substrate. At least an innermost turn of the first coil part is radially separated by spiral-shaped slits into three or more conductor parts. At least an innermost turn of the second coil part is radially separated by spiral-shaped slits into three or more conductor parts. Inner peripheral ends of respective innermost to outermost conductor parts of the three or more conductor parts of the first coil part are connected to inner peripheral ends of the respective outermost to innermost conductor parts of the three or more conductor parts of the second coil part.

Abstract: A resonant power converter for operation in the radio frequency range, preferably in the VHF, comprises at least one PCB-embedded transformer. The transformer is configured for radio frequency operation and comprises a printed circuit board defining a horizontal plane, the printed circuit board comprising at least two horizontal conductive layers separated by an isolating layer, a first embedded solenoid forming a primary winding of the transformer and a second embedded solenoid being arranged parallel to the first solenoid and forming a secondary winding of the transformer, wherein the first and second embedded solenoids are formed in the conductive layers of the printed circuit board, wherein each full turn of an embedded solenoid has a horizontal top portion formed in an upper conductive layer, a horizontal bottom portion formed in a lower conductive layer, and two vertical side portions formed by vias extending between the upper and the lower conducting layers.

Abstract: An inductor device (1) includes a magnetic body (2) and a conductor buried in the magnetic body (2), and the conductor includes first conductors (3) as metal pins. The magnetic body (2) is formed into a flat plate shape with a first main surface and a second main surface each having a predetermined shape, which oppose each other, and side surfaces connecting the first main surface and the second main surface. The conductor includes the first conductors (3) one end portions of which are exposed to the second main surface of the magnetic body (2) and a second conductor (4) which is connected to the other end portions of the first conductors (3).

Abstract: A coupled inductor structure includes a first three-dimensional inductor structure and a second three-dimensional folded inductor structure. At least a portion of the first three-dimensional folded inductor structure is located within a volume bounded by the second three-dimensional folded inductor structure. By nesting the first three-dimensional folded inductor structure within the second three-dimensional folded inductor structure, a variety of coupling factors can be achieved while minimizing the size of the coupled inductor structure.

Abstract: An integrated circuit (IC) includes a circuit substrate having a front side surface and an opposite back side surface. Active circuitry is located on the front side surface. An inductive structure is located within a deep trench formed in the circuit substrate below the backside surface. The inductive structure is coupled to the active circuitry.

Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.

Abstract: Embodiments are directed to a method of forming a laminated magnetic inductor and resulting structures having multiple magnetic layer thicknesses. A first magnetic stack having one or more magnetic layers alternating with one or more insulating layers is formed in a first inner region of the laminated magnetic inductor. A second magnetic stack is formed opposite a major surface of the first magnetic stack in an outer region of the laminated magnetic inductor. A third magnetic stack is formed opposite a major surface of the second magnetic stack in a second inner region of the laminated magnetic inductor. The magnetic layers are formed such that a thickness of a magnetic layer in each of the first and third magnetic stacks is less than a thickness of a magnetic layer in the second magnetic stack.

Abstract: In one general aspect, an apparatus can include a first terminal, a second terminal, and a resistive element extending between the first terminal and the second terminal. The resistive element can include a first via in contact with a first segment of a first metal layer and a first segment of a second metal layer, and can include a second via in contact with the first segment of the second metal layer and a second segment of the first metal layer. The apparatus can also include a third via in contact with the second segment of the first metal layer and a third segment of the second metal layer.

Abstract: An electronic device and methods for inductively charging an electronic device using another external electronic device. The electronic device may include an enclosure, a battery positioned within the enclosure, and an inductive coil coupled to the battery. The inductive coil may have two or more operational modes, including a power receiving operational mode for wirelessly receiving power and a power transmitting operational mode for wirelessly transmitting power. The electronic device may also have a controller coupled to the inductive coil for selecting one of the operational modes.

Abstract: An inductor component 1a includes a resin layer 3 and an inductor electrode 6. The inductor electrode 6 includes metal pins 7a to 7d that extend in the resin layer 3 with end faces 70a to 70d of the metal pins 7a to 7d exposed from an upper surface 3a of the resin layer 3, and upper wiring plates 8a and 8b that are disposed on the upper surface 3a of the resin layer 3 and that connect the end faces 70a and 70c of the short metal pins 7a and 7c and the end faces 70b and 70d of the long metal pins 7b and 7d to each other. In this case, the inductor electrode 6 is formed of the metal pins 7a to 7d and the wiring plates 8a to 8c that each have a specific electrical resistance lower than that of a conductive paste and plating.

Abstract: An electronic device and methods for inductively charging an electronic device using another external electronic device. The electronic device may include an enclosure, a battery positioned within the enclosure, and an inductive coil coupled to the battery. The inductive coil may have two or more operational modes, including a power receiving operational mode for wirelessly receiving power and a power transmitting operational mode for wirelessly transmitting power. The electronic device may also have a controller coupled to the inductive coil for selecting one of the operational modes.

Abstract: The present disclosure, in some embodiments, relates to an interconnect structure. The interconnect structure has a metal body disposed over a substrate, and a metal projection protruding outward from an upper surface of the metal body. A dielectric layer is disposed over the substrate and surrounds the metal body and the metal projection. A barrier layer separates the metal body and the metal projection from the dielectric layer.

Abstract: An embodiment of coil assembly includes a laterally disposed ferrite ring having a central opening. A laterally disposed annular conductive member is positioned above the ferrite ring and has a plurality of spaced-apart circumferential segments. A plurality of bond wires are connected at opposite ends thereof to outer and inner portions of the plurality of spaced-apart circumferential segments. A layer of mold compound covers the ferrite ring and the bond wires.

Abstract: A three-dimensional inductor is formed in an integrated circuit die using conductive through-body-vias which pass through the body of the die and contact one or more metal interconnect layers on the front side of the die and terminate on the back side of the die. In another embodiment, the through-body-vias may pass through a dielectric material disposed in a plug in the body of the die. In yet another aspect, a transformer may be formed by coupling multiple inductors formed using through-body-vias. In still another aspect, a three-dimensional inductor may include conductors formed of stacks of on chip metallization layers and conductive through-layer-vias disposed in insulation layers between metallization layers. Other embodiments are described.

Abstract: Disclosed are a transmitting coil structure and wireless power transmitting terminal using the transmitting coil structure. The transmitting coil has a first winding and a second winding connected in parallel, so that the transmitting coil has a smaller inductance than the conventional transmitting coil in the condition of the same spatial magnetic field. When the receiving terminal is near the transmitting coil, the inductance of the transmitting coil is smaller, and the influence of the receiving terminal to the inductance of the transmitting coil is reduced significantly, and the effect to the impedance matching of the primary side transmitting coil and the resonant capacitor will not be too large, so as to improve the power transmission efficiency of the system.

Abstract: A magnetic laminating structure and process includes alternating layers of a magnetic material and a multilayered insulating material, wherein the multilayered insulating material is intermediate adjacent magnetic material layers and comprises a first insulating layer abutting at least one additional insulating layer, wherein the first insulating layer and the at least one additional insulating layer comprise different dielectric materials and/or are formed by a different deposition process, and wherein the layers of the magnetic material have a cumulative thickness greater than 1 micron.

Abstract: This disclosure pertains to wireless power transfer systems, and in particular (but not exclusively), to techniques to improve the coupling efficiency between a power transmitting unit and a power receiving unit within a computing device. The present disclosure includes a system which comprises a computing unit which includes a power receiving unit and a conductive surface. The conductive surface has an opening that is adjacent to the power receiving unit and a slot extending from the opening towards the perimeter of the conductive surface. The computing unit further includes a system base coupled to the power receiving unit wherein the power receiving unit is to provide power to the system base. The system also includes a power transmitting unit adjacent to the computing unit.

Abstract: A fabrication method of a layer structure for mounting a semiconductor device is provided, which includes the steps of: providing a base material, wherein the base material has a conductive layer having a first surface having a plurality of first conductive elements and an opposite second surface having a plurality of second conductive elements, and a first encapsulant formed on the first surface of the conductive layer for encapsulating the first conductive elements; partially removing the conductive layer to form a circuit layer that electrically connects the first conductive elements and the second conductive elements; and forming a second encapsulant on a bottom surface of the first encapsulant for encapsulating the circuit layer and the second conductive elements, thus reducing the fabrication difficulty and increasing the product yield.

Abstract: Electronic device comprising an interconnection structure comprising an alternating stack of arrays of conducting lines and dielectric layers in which: all the lines of a same array extend in a same plane and form an equipotential; a first pattern of a first array is such that the lines of the first array intersect at several intersections; a third pattern of a third array is similar, superimposed and aligned with the first pattern; a second pattern of a second array arranged between the first and third arrays is such that the lines of the second array intersect at several intersections offset with respect to those of the first and third patterns; a first conducting via extends from a line of the first and/or third array and is not in contact with the second array.

Abstract: A semiconductor device includes: a semiconductor substrate having a first surface and a second surface that face each other, and having an element region and an isolation region, the element region including a transistor in the first surface, and the isolation region including an element isolation layer surrounding the element region; and a contact plug extending from the first surface to the second surface in the isolation region of the semiconductor substrate.

Abstract: A semiconductor device includes a first main electrode terminal and second main electrode terminal disposed on the principal surface of a semiconductor substrate so as to be spaced from one another, an insulating film formed on the principal surface of the semiconductor substrate, and a thin film resistance layer. One end side of the thin film resistance layer is connected to the first main electrode terminal and the other end side of the thin film resistance layer is connected to the second main electrode terminal, the thin film resistance layer being spirally formed on the insulating film in such a way as to surround the first main electrode terminal. The thin film resistance layer extends while oscillating in a thickness direction of the semiconductor substrate.

Abstract: A method making a three-dimensional inductor, the method including: forming a plurality of vias in a substrate or a molding compound, wherein the vias are arranged with spacings among them; forming a metal layer having interconnects, wherein the interconnects of the metal layer connect the plurality of vias on one end of the vias; forming a plurality of wires to connect the plurality of vias on the other end of the vias to form the 3D inductor; and tuning one or more of the plurality of wires to adjust a physical configuration and inductance value of the 3D inductor.

Abstract: An inductor device includes a first insulating layer having a first via hole, a first metal layer formed on an upper surface of the first insulating layer and having a droop portion at an upper end-side of the first via hole, a second metal layer formed on a lower surface of the first insulating layer and having a first connection part exposed to a bottom surface of the first via hole, and a first metal-plated layer formed in the first via hole and configured to connect the first connection part and the droop portion of the first metal layer.

Abstract: A method for providing an inductively loaded integrated circuit includes providing a wafer with an integrated circuit formed thereon, the integrated circuit comprising at least one substrate via, including one or more substrate vias that are to be inductively loaded, and fabricating an inductive element on the backside of the wafer that electrically connects to the substrate vias that are to be inductively loaded. A corresponding apparatus includes a wafer with an integrated circuit formed on a top side of the wafer and an inductive element formed on a back side of the wafer, and at least one substrate via that extends through the wafer and electrically connects the inductive element to the integrated circuit. In certain embodiments, the inductive element comprises a plurality of conductive layers. In some embodiments, the inductive element comprises multiple turns on each conductive layer.