Optical Enhancement Of Defects Or Not Directly Visible States, E.g., Selective Electrolytic Deposition, Bubbles In Liquids, Light Emission, Color Change (epo) Patents (Class 257/E21.527)
  • Patent number: 8071404
    Abstract: By using a first substrate which has a light-transmitting property and whose first face is provided with a light-absorbing layer, a mixture including an organic compound and an inorganic material is irradiated with light having a wavelength, which is absorbed by the inorganic material to heat the mixture, and thereby a film of the organic compound included in the mixture is formed on the first face of the first substrate. Then, the first face of the first substrate and a deposition surface of a second substrate are arranged to be adjacent to or in contact with each other, irradiation with light having a wavelength, which is absorbed by the light-absorbing layer is conducted from a second face side of the first substrate, to heat the organic compound, and thereby at least part of the organic compound is formed as a film on the deposition surface of the second substrate.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: December 6, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Koichiro Tanaka, Hisao Ikeda, Satoshi Seo
  • Patent number: 8062925
    Abstract: A process for preparing a semiconductor light-emitting device for mounting is disclosed. The light-emitting device has a mounting face for mounting to a sub-mount. The process involves treating at least one surface of the light-emitting device other than the mounting face to lower a surface energy of the at least one surface, such that when mounting the light-emitting device, an underfill material applied between the mounting face and the sub-mount is inhibited from contaminating the at least one surface.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: November 22, 2011
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company LLC
    Inventors: Oleg Borisovich Shchekin, Xiaolin Sun, Decai Sun
  • Patent number: 8058081
    Abstract: A method comprises providing a semiconductor structure. The semiconductor structure comprises a feature comprising a first material and a layer of a second material formed over the feature. The semiconductor structure is exposed to an etchant. The etchant is adapted to selectively remove the first material, leaving the second material substantially intact. After exposing the semiconductor structure to the etchant, it is detected whether the feature has been affected by the etchant.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: November 15, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Moritz Andreas Meyer, Eckhard Langer, Frank Koschinsky
  • Patent number: 8048699
    Abstract: An organic electroluminescent device includes: a switching element and a driving element connected to each other on a substrate including a pixel region; a planarization layer on the switching element and the driving element, the planarization layer having a substantially flat top surface; a cathode on the planarization layer, the cathode connected to the driving element; an emitting layer on the cathode; and an anode on the emitting layer.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: November 1, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Jae-Hee Park, Kyung-Min Park, Seok-Jong Lee
  • Patent number: 8039914
    Abstract: A solid-state imaging device includes the following elements. A photoelectric conversion section is arranged in a semiconductor layer having a first surface through which light enters the photoelectric conversion section. A signal circuit section is arranged in a second surface of the semiconductor layer opposite to the first surface. The signal circuit section processes signal charge obtained by photoelectric conversion by the photoelectric conversion section. A reflective layer is arranged on the second surface of the semiconductor layer opposite to the first surface. The reflective layer reflects light transmitted through the photoelectric conversion section back thereto. The reflective layer is composed of a single tungsten layer or a laminate containing a tungsten layer.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: October 18, 2011
    Assignee: Sony Corporation
    Inventor: Kentaro Akiyama
  • Patent number: 8039867
    Abstract: A ZnO-containing semiconductor layer, doped with Se, has an emission peak wavelength in visual light and has a band gap equivalent to a band gap of ZnO.
    Type: Grant
    Filed: August 13, 2009
    Date of Patent: October 18, 2011
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Akio Ogawa, Michihiro Sano, Hiroyuki Kato, Naochika Horio, Hiroshi Kotani, Tomofumi Yamamuro
  • Patent number: 8030638
    Abstract: A compound semiconductor device is manufactured by using a polycrystalline SiC substrate, the compound semiconductor device having a buffer layer being formed on the substrate and having a high thermal conductivity of SiC and aligned orientations of crystal axes. The method for manufacturing the compound semiconductor device includes: forming a mask pattern on a polycrystalline SiC substrate, the mask pattern having an opening of a stripe shape defined by opposing parallel sides or a hexagonal shape having an apex angle of 120 degrees and exposing the surface of the polycrystalline SiC substrate in the opening; growing a nitride semiconductor buffer layer, starting growing on the polycrystalline SiC substrate exposed in the opening of the mask pattern, burying the mask pattern, and having a flat surface; and growing a GaN series compound semiconductor layer on the nitride semiconductor buffer layer.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: October 4, 2011
    Assignee: Fujitsu Limited
    Inventor: Toshihide Kikkawa
  • Patent number: 8008694
    Abstract: A light source with enhanced brightness includes an angle-selective optical filter and a light emitting diode (LED) having a high reflective layer. The angle-selective filter is located on the top surface of emitting diode to pass lights at specified angles. According to one embodiment, the angle-selective filter includes index-alternating layers. With a reflective polarizer, the light source can produce polarized light with enhanced brightness.
    Type: Grant
    Filed: September 22, 2007
    Date of Patent: August 30, 2011
    Assignee: YLX, Ltd.
    Inventors: Li Xu, Yi Li
  • Patent number: 7968355
    Abstract: The present invention is directed to a vertical-type luminous device and high through-put methods of manufacturing the luminous device. These luminous devices can be utilized in a variety of luminous packages, which can be placed in luminous systems. The luminous devices are designed to maximize light emitting efficiency and/or thermal dissipation. Other improvements include an embedded zener diode to protect against harmful reverse bias voltages.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: June 28, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: YuSik Kim
  • Publication number: 20110135187
    Abstract: A photovoltaic cell manufacturing method includes: detecting a structural defect existing in compartment elements; obtaining an image by capturing a region including the structural defect and the scribe line with a predetermined definition; specifying first number of pixels on the image, the first number of pixels corresponding to a distance between the scribe lines adjacent to each other or corresponding to a width of the scribe line; referring to an actual value indicating the distance between the scribe lines adjacent to each other or indicating the width of the scribe line, the distance being preliminarily stored, and the width of the scribe line being preliminarily stored; calculating an actual size of one pixel on the image by comparing the first number of pixels with the actual value; specifying second number of pixels on the image, the second number of pixels corresponding to the distance between the structural defect and the scribe line; comparing the second number of pixels with the actual size of o
    Type: Application
    Filed: August 14, 2009
    Publication date: June 9, 2011
    Applicant: ULVAC, INC.
    Inventors: Kazuhiro Yamamuro, Junpei Yuyama, Katsumi Yamane
  • Patent number: 7956393
    Abstract: A composition for a photoresist stripper and a method of fabricating a thin film transistor array substrate are provided according to one or more embodiments. In one or more embodiments, the composition includes about 5-30 weight % of a chain amine compound, about 0.5-10 weight % of a cyclic amine compound, about 10-80 weight % of a glycol ether compound, about 5-30 weight % of distilled water, and about 0.1-5 weight % of a corrosion inhibitor.
    Type: Grant
    Filed: September 21, 2009
    Date of Patent: June 7, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Hyun Choung, Bong-Kyun Kim, Hong-Sick Park, Sun-Young Hong, Young-Joo Choi, Byeong-Jin Lee, Nam-Seok Suh, Byung-Uk Kim, Suk-Il Yoon, Jong-Hyun Jeong, Sung-Gun Shin, Soon-Beom Huh, Se-Hwan Jung, Doo-Young Jang, Sun-Joo Park, Oh-Hwan Kweon
  • Patent number: 7947516
    Abstract: A method of packaging a light-emitting diode (LED) chip includes coupling the LED chip to a printed circuit board (PCB) and forming a conductor on a cover plate. Conductive epoxy is applied to at least one of the LED chip and the conductor. The cover plate is coupled to the PCB such that the conductive epoxy forms a circuit connection between the LED chip and the conductor. An LED-based lighting product includes a PCB with one or more LED chips mounted directly thereon. A cover plate has conductors that couple at least to the one or more LED chips and to the PCB, such that the conductors form electrical connections between the one or more LED chips and the PCB.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: May 24, 2011
    Assignee: AlbEO Technologies, Inc.
    Inventor: Jeffrey Bisberg
  • Patent number: 7947526
    Abstract: An exemplary method for making a backside illumination image sensor includes the follow steps. A substrate having a top surface is firstly provided. Secondly, many recesses are formed in the top surface. Thirdly, a light pervious layer is applied on the top surface. The light pervious layer has a plurality of filling portions received in the recesses. Then, an epitaxial silicon layer is applied on the light pervious layer. Next, many light sensitive regions and circuits are formed on the epitaxial silicon layer. Finally, the substrate is etched to expose the filling portions of the light pervious layer, thereby forming the backside illumination image sensor with the filling portions functioning as micro-lenses.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: May 24, 2011
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Jen-Tsorng Chang
  • Patent number: 7935560
    Abstract: A method of fabricating a CMOS image sensor comprising an array of active pixel cells. Each active pixel cell includes a substrate; a photosensing device formed at or below a substrate surface for collecting charge carriers in response to incident light; and, one or more light transmissive conductive wire structures formed above the photosensing device, the one or more conductive wire structures being located in an optical path above the photosensing device. The formed light transmissive conductive wire structures provide both an electrical and optical function. An optical function is provided by tailoring the thickness of the conductive wire layer to filter light according to a pixel color scheme. Alternately, the light transmissive conductive wire structures may be formed as a microlens structure providing a light focusing function. Electrical functions for the conductive wire layer include use as a capacitor plate, as a resistor or as an interconnect.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: May 3, 2011
    Assignee: International Business Machines Corporation
    Inventors: Brent A. Anderson, John J. Ellis-Monaghan, Edward J. Nowak
  • Patent number: 7927894
    Abstract: The present invention relates to an apparatus (10) for aligning an optical device with an object. The apparatus comprises, a frame (12), a support unit (16) for supporting said optical device or said object and a transportation device (14) arranged to at least tilt the support unit in relation to the frame, wherein a segment of a sphere (18, 22) is provided, which segment defines a spherical surface (20), and the tilting movement of the support unit is controlled by said spherical surface. The apparatus according to the invention allows for a tilting movement between said optical device and said object, while such movement does not lead to a shift in focus. Furthermore the invention relates to an optical instrument and a semiconductor process system comprising said apparatus.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: April 19, 2011
    Assignee: NXP B.V.
    Inventors: Job Vianen, Jozef P. W. Stokkermans
  • Patent number: 7833807
    Abstract: Some semiconductor lasers have an initial failure mode that is advanced as the amount of optical power therein, namely, the amount of optical output observed from the outside increases in almost independent of the temperature. The initial failure mode that is advanced as the amount of optical output increases is not sufficiently screened, so that the initial failure rate is somewhat higher than that of the semiconductor laser having the conventional active layer material. It is effective to introduce a test with large optical output at lower temperature than average operating temperature such as room temperature, during the manufacturing process. This helps to eliminate elements having the initial failure mode that is advanced as the amount optical output increases, thereby to extend the expected life of the laser diodes.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: November 16, 2010
    Assignee: Opnext Japan, Inc.
    Inventors: Hiroyuki Kamiyama, Masaru Mukaikubo, Hiroaki Inoue, Chiyuki Kitahara
  • Patent number: 7833845
    Abstract: An object is to provide a manufacturing method of a microcrystalline semiconductor film with favorable quality over a large-area substrate. After forming a gate insulating film over a gate electrode, in order to improve quality of a microcrystalline semiconductor film formed in an initial stage, glow discharge plasma is generated by supplying high-frequency powers with different frequencies, and a lower part of the film near an interface with the gate insulating film is formed under a first film formation condition, which is low in film formation rate but results in a good quality film. Thereafter, an upper part of the film is deposited under a second film formation condition with higher film formation rate, and further, a buffer layer is stacked on the microcrystalline semiconductor film.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: November 16, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Sachiaki Teduka, Satoshi Toriumi, Makoto Furuno, Yasuhiro Jinbo, Koji Dairiki, Hideaki Kuwabara
  • Patent number: 7790482
    Abstract: The invention relates to an LED package for facilitating color mixing using a diffuser and a manufacturing method of the same. The LED package includes a substrate with an electrode formed thereon, and an LED chip mounted on the substrate. The LED package also includes an encapsulant applied around the light emitting diode chip, containing a diffuser. The LED package further includes a lens part disposed on the light emitting diode chip and the encapsulant to radiate light in a wide angle. The LED package allows light from the light emitting diode chip to be emitted out of the package without distortion. The invention allows light to exit through the encapsulant containing the diffuser and the lens part, achieving uniform diffusion and emission of light from the LED chip, thereby increasing a radiating angle and obtaining a uniform light source.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: September 7, 2010
    Assignee: Samsung Led Co., Ltd.
    Inventors: Seong Yeon Han, Seon Goo Lee, Chang Ho Song, Jung Kyu Park, Young Sam Park, Kyung Taeg Han
  • Patent number: 7772016
    Abstract: Measurement of the extinction coefficient k is employed for effective and prompt in-line monitoring and/or controlling of the metal film composition. The dependency of the extinction coefficient on the composition of a metal compound is characterized by measuring the extinction coefficients of a series of the metal compound with different compositions. A monitor metal film is then deposited on a wafer. The extinction coefficient k of the film on the wafer is measured and a film compositional parameter is extracted. The wafer processing may continue if k is in specification or the needed compositional change in the film may be extracted from the measured value of the k and the established dependence of k on the composition of the film for out-of-spec k values.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: August 10, 2010
    Assignee: International Business Machines Corporation
    Inventors: Russell D. Allen, Stephen L. Brown, Alessandro C. Callegari, Michael P. Chudzik, Vijay Narayanan, Vamsi K. Paruchuri
  • Patent number: 7772015
    Abstract: An analysis method of wafer ion implant is presented, the steps of the method comprises: (a) cleave a wafer for analysis, and (b) from these pieces of wafers determine which ones are wafer with defect and set an insulator on the wafer with defect, (c) finally, use scanning electron microscope to observe whether the ion implant on the wafer with defect was correct or not. Whereby, engineers can take less time to analyze whether the ion implant of the wafer is correct or not with 100% repeatability.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: August 10, 2010
    Assignee: Inotera Memories, Inc.
    Inventors: Yi-Wei Hsieh, Jeremy Duncan Russell, Pei-Yi Chen
  • Publication number: 20100197049
    Abstract: It is an object of the present invention to provide a doping apparatus, a doping method, and a method for fabricating a thin film transistor that can carry out doping to the carrier concentration which is optimum for obtaining the desired electric characteristic non-destructively and in an easy manner. In accordance with the present invention, an electric characteristic of a semiconductor element (threshold voltage in a transistor and the like) is correctly and precisely monitored by using a contact angle, and is controlled by controlling a doping method. In addition, the present invention can be momentarily acquired information by in-situ monitoring the characteristic and can be fed back without a time lag.
    Type: Application
    Filed: April 7, 2010
    Publication date: August 5, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Junichi KOEZUKA, Naoto YAMADE
  • Patent number: 7763499
    Abstract: An improved imaging device having a pixel arrangement featuring a multilayer light shield. The multilayer light shield includes stacked layers of light-shielding and light-transparent material. The light-transparent material, such as a dielectric, is selected to have a stress, such as a tensile stress, that offsets the stress, such as a compressive stress, of the light shielding material. Without the stress offset, the high compressive stress of the refractory metal could damage the integrity of the nearby silicon. The refractory metal is capable of withstanding the high temperatures associated with front end CMOS processing. The laminate structure allows the light shield to be placed close to the pixel surface. The light-transparent material has a thickness equal to about one-quarter wavelength of the light to be blocked, to act as an anti-reflective coating. An aperture in the light shield exposes the active region of the pixel's photoconversion device.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: July 27, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Jiutao Li, Jin Li
  • Patent number: 7754557
    Abstract: A method for manufacturing a vertical CMOS image sensor related to a semiconductor device is disclosed. A high-temperature double annealing process and/or an additional passivation nitride film are selectively applied in order to improve dark leakage characteristics and also to prevent or reduce an incidence of circular defects, thereby enhancing the quality and reliability of the vertical CMOS image sensor.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: July 13, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Jeong Su Park
  • Patent number: 7736938
    Abstract: A method for fabricating a CMOS image sensor for preventing corrosion of a metal pad. The method for fabricating the CMOS image sensor can include sequentially forming a dielectric film, a metal pad having an opening, and a first passivation film on a semiconductor substrate having a scribe lane and a pixel region defined therein, forming a color filter layer on the first passivation film at the pixel region, forming an overcoat layer on the entire surface of the semiconductor substrate, including the metal pad, to reduce the step difference between the scribe lane and the pixel region, forming a micro lens on the overcoat layer at the pixel region, forming a photo resist to expose the overcoat layer at the scribe lane, performing an etching process on the entire surface of the semiconductor substrate to etch the overcoat layer at the scribe lane, and removing the photo resist by a cleaning process.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: June 15, 2010
    Assignee: Dongbu HiTek Co., Ltd
    Inventor: Young-Je Yun
  • Patent number: 7727873
    Abstract: An object of the present invention is to provide a method for producing a gallium nitride-based compound semiconductor multilayer structure useful for the production of a gallium nitride-based compound semiconductor light-emitting device which can ensure that the operating voltage is reduced, the light emission output is good and the light emission output is less changed due to aging.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: June 1, 2010
    Assignee: Showa Denko K.K.
    Inventors: Hisao Sato, Hitoshi Takeda
  • Patent number: 7723150
    Abstract: A method for fabricating an image sensor, which includes the following steps, is provided. A semiconductor substrate including a sensor array, a pad and a passivation layer is provided, and the passivation layer covers the sensor array and the pad. An opening, which comprises tapered sidewalls not perpendicular to a bared surface of the pad, is formed in the semiconductor substrate to expose the pad. An under layer is formed on the semiconductor substrate, and covers the pad and the passivation layer. A color filter array is formed on the under layer and over the corresponding sensor array. A planar layer is formed on the color filter array. A portion of the under layer is removed to expose the pad. A plurality of U-lenses is formed on the planar layer.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: May 25, 2010
    Assignee: United Microelectronics Corp.
    Inventor: Cheng-Hung Yu
  • Patent number: 7713776
    Abstract: A method of making a light emitting diode includes forming a plurality of electrically conductive members at intervals on a first surface of an epitaxial layer which generates light so that the electrically conductive members are in ohmic contact with the epitaxial layer, forming a light incident layer on the first surface at regions where none of the electrically conductive members are formed, forming a light reflecting layer on the light incident layer and the electrically conductive members, providing an adhesive on the light reflecting layer, and bonding a permanent substrate to the light reflecting layer through the adhesive and through a wafer bonding process.
    Type: Grant
    Filed: August 13, 2009
    Date of Patent: May 11, 2010
    Inventors: Ray-Hua Horng, Dong-Sing Wuu
  • Patent number: 7704758
    Abstract: A method for manufacturing an optical device, the method includes the steps of: forming a multilayer film, including forming a first mirror above a substrate, forming an active layer above the first mirror, forming a second mirror above the active layer, forming a semiconductor layer on the second mirror, and forming a sacrificial layer on the semiconductor layer; conducting a reflection coefficient examination on the multilayer film; patterning the multilayer film to form a surface-emitting laser section having the first mirror, the active layer and the second mirror, and a diode section having the semiconductor layer; and removing at least a portion of the sacrificial layer to expose at least a portion of an upper surface of the semiconductor layer, wherein an optical film thickness of the semiconductor layer is formed to be an odd multiple or an even multiple of ?/4, where ? is a design wavelength of light emitted by the surface-emitting laser section, and an optical film thickness of the sacrificial layer
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: April 27, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Yasutaka Imai
  • Patent number: 7682844
    Abstract: A silicon substrate processing method for reducing the thickness of an area of a silicon substrate on which a metal layer is formed to implement a semiconductor integrated circuit is disclosed. The method includes: (A) a process which evenly reduces the thickness of the backside of a silicon substrate to an extent where mechanical strength is maintained and the metal layer on the silicon substrate remains intact; (B) a process which detects defects from the backside of the silicon substrate after the process (A); (C) a process which further reduces the thickness of a defect-containing area of the silicon substrate by processing the backside of the silicon substrate; and (D) a process which measures the thickness of the area of the silicon substrate which is reduced in the process (C).
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: March 23, 2010
    Assignee: Ricoh Company, Ltd.
    Inventors: Takuya Naoe, Hirohiko Endoh
  • Patent number: 7655536
    Abstract: Word lines of a NAND flash memory array are formed by concentric, rectangular shaped, closed loops that have a width of approximately half the minimum feature size of the patterning process used. The resulting circuits have word lines linked together so that peripheral circuits are shared. Separate erase blocks are established by shield plates.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: February 2, 2010
    Assignee: SanDisk Corporation
    Inventor: Masaaki Higashitani
  • Patent number: 7608858
    Abstract: A liquid crystal display is provided. A liquid crystal display includes a first substrate having color filters therewith; a second substrate having plural first signal lines and plural second signal lines thereon; plural first openings located at intersections of said first signal lines and plural of second signal lines; and plural supports located at said plural first openings and between said first substrate and said second substrate, and separating said first substrate from said second substrate.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: October 27, 2009
    Assignee: HannStar Display Corporation
    Inventors: Chia-Te Liao, Tean-Sen Jen, Hsu-Ho Wu, Ming-Tien Lin, Te-Cheng Chung
  • Patent number: 7563626
    Abstract: A manufacturing method of a CMOS image sensor including at least one of the following steps. Forming an under-structure including a photodiode, a metal wire, and an interlayer insulation film for insulation between a metal pad and the metal wire. Forming a passivation layer on and/or over the under-structure. Selectively etching the passivation layer and the interlayer insulation film below the passivation layer to form a color filter region and a metal pad exposure region. Simultaneously etching the color filter region and the metal pad exposure region. Sequentially forming a plurality of color filters and a plurality of micro lenses on the interlayer insulation film etched to form the color filters.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: July 21, 2009
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Kyung-Min Park
  • Patent number: 7531440
    Abstract: A semiconductor laser device includes an n-type cladding layer 103 made of n?type (Al0.3Ga0.7)0.5In0.5P, an undoped active layer 104 and a first p-type cladding layer 105 made of p?type (Al0.3Ga0.7)0.5In0.5P. These layers are successively stacked in bottom-to-top order. The active layer 104 has a multi-quantum well structure composed of a first optical guide layer of undoped Al0.4Ga0.6As, a layered structure in which well layers of undoped GaAs and barrier layers of undoped Al0.4Ga0.6As are alternately formed, and a second optical guide layer of undoped Al0.4Ga0.6As. The first optical guide layer, the layered structure and the second optical guide layer are successively stacked in bottom-to-top order.
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: May 12, 2009
    Assignee: Panasonic Corporation
    Inventor: Tsutomu Ukai
  • Patent number: 7517710
    Abstract: A method of manufacturing a field emission device (FED), which reduces the number of photomask patterning processes and improves the manufacturing yield of the FED, is provided.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: April 14, 2009
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Jun-Hee Choi, Ho-Suk Kang, Chan-Wook Baik, Ha-Jong Kim
  • Patent number: 7479401
    Abstract: This invention relates to a novel optoelectronic chip with one or more optoelectronic devices, such as photodiodes, fabricated on a front side of a semiconductor wafer and contacts on a backside of the semiconductor wafer. The backside contacts can be contact bumps, which allow the optoelectronic chip to achieve the benefits of flip chip packaging without flipping the optoelectronic chip upside down with respect to a chip carrier. In an optical communication system, a photodiode chip can be backside bumped to a chip carrier or an electronic chip, allowing front side illumination of the photodiode chip. Front side illumination offers many benefits, including improved fiber alignment, reduced manufacturing time, and overall cost reduction.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: January 20, 2009
    Assignee: Microsemi Corporation
    Inventors: Jay Jie Lai, Truc Q. Vu, Gary B. Warren
  • Publication number: 20090011524
    Abstract: In one disclosed embodiment, the present method for determining resist suitability for semiconductor wafer fabrication comprises forming a layer of resist over a semiconductor wafer, exposing the layer of resist to patterned radiation, and determining resist suitability by using a scatterometry process prior to developing a lithographic pattern on the layer of resist. In one embodiment, the semiconductor wafer is heated in a post exposure bake process after scatterometry is performed. In one embodiment, the patterned radiation is provided by an extreme ultraviolet (EUV) light source in a lithographic process. In other embodiments, patterned radiation is provided by an electron beam, or ion beam, for example. In one embodiment, the present method determines out-gassing of a layer of resist during exposure to patterned radiation.
    Type: Application
    Filed: July 6, 2007
    Publication date: January 8, 2009
    Inventors: Thomas Wallow, Bruno M. LaFontaine
  • Publication number: 20080318351
    Abstract: In a method of setting recipes of a defect test, a laser intensity map of a sample is obtained. The laser intensity map is then area-scanned to obtain average laser intensity. Recipes are set based on the average laser intensity. Thus, a laser power set in a defect detector may be constant regardless of inspectors so that the defect detector may have improved defect detection reliability.
    Type: Application
    Filed: October 10, 2007
    Publication date: December 25, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ho-Seong KANG, Bong-Su KIM, Young-Nam KIM, Joung-Soo KIM, Gee-Jun LEE
  • Patent number: 7468289
    Abstract: A solid-state imaging device having a high sensitivity and a structure in which a miniaturized pixel is obtained, and a method for manufacturing the solid-state imaging device in which an interface is stable, a spectroscopic characteristic is excellent and which can be manufactured with a high yield ratio are provided. The solid-state imaging device includes at least a silicon layer formed with a photo sensor portion and a wiring layer formed on the front-surface side of the silicon layer, and in which light L is made to enter from the rear-surface side opposite to the front-surface side of the silicon layer and the thickness of the silicon layer 4 is 10 ?m or less.
    Type: Grant
    Filed: August 23, 2006
    Date of Patent: December 23, 2008
    Assignee: Sony Corporation
    Inventors: Yasushi Maruyama, Hideshi Abe, Hiroyuki Mori
  • Patent number: 7449348
    Abstract: The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate compensating for retrograde feature profiles on an imprint mask. An aspect of the invention generates feedback information that facilitates control of imprint mask feature profile via employing a scatterometry system to detect retrograde feature profiles, and mitigating the retrograde profiles via a spacer etchback procedure.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: November 11, 2008
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Srikanteswara Dakshina-Murthy, Bhanwar Singh, Ramkumar Subramanian, Khoi A. Phan
  • Publication number: 20080188014
    Abstract: Embodiments herein present a method for a feed forward suicide control scheme based on spacer height controlling pre-clean time. The method forms field effect transistor gates over a substrate and then forms spacers on the gates. Next, the method measures the spacers using an atomic force microscope to determine a measured spacer height. The method then conducts a pre-cleaning etch, wherein a duration of the pre-cleaning is adjusted according to the measured spacer height. If the measured spacer height is below a predetermined amount, the duration of the pre-cleaning is reduced; and, if the measured spacer height is above a predetermined amount, the duration of the pre-cleaning is increased.
    Type: Application
    Filed: January 9, 2006
    Publication date: August 7, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ricky S. Amos, Bryant C. Colwill, Kevin E. Mello
  • Patent number: 7364930
    Abstract: What is proposed here is a method of structuring surfaces of glass-type materials and variants of this method, comprising the following steps of operation: providing a semiconductor substrate, structuring, with the formation of recesses, of at least one surface of the semiconductor substrate, providing a substrate of glass-type material, joining the semiconductor substrate to the glass-type substrate, with a structured surface of the semiconductor substrate being joined to a surface of the glass-type surface in an at least partly overlapping relationship, and heating the substrates so bonded by annealing in a way so as to induce an inflow of the glass-type material into the recesses of the structured surface of the semiconductor substrate. The variants of the method are particularly well suitable for the manufacture of micro-optical lenses and micro-mechanical components such as micro-relays or micro-valves.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: April 29, 2008
    Assignee: Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung e.V.
    Inventors: Hans-Joachim Quenzer, Peter Merz, Arne Veit Schulz
  • Patent number: 7361541
    Abstract: A semiconductor light emitting device and a method to form the same are disclosed. The device has at least one porous or low density dielectric region formed in or on top of a bottom electrode, at least one top electrode on the porous or low density dielectric region, and one or more color filters placed above the top electrode, wherein the porous or low density dielectric region contains light emitting nanocrystal materials.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: April 22, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-Chao Huang, Fu-Liang Yang
  • Patent number: 7256473
    Abstract: A composite structure is disclosed that includes a support wafer and a layered structure on the support wafer. The layered structure includes at least one layer of a monocrystalline material and at least one layer of a dielectric material. In addition, the layered structure materials and the thickness of each layer are chosen such that the thermal impedance between ambient temperature and 600° K of the composite structure is a value that is no greater than about 1.3 times the thermal impedance of a monocrystalline bulk SiC wafer having the same dimensions as the composite structure. The composite structure provides sufficient heat dissipation properties for manufacturing optical, electronic, or optoelectronic components.
    Type: Grant
    Filed: October 6, 2006
    Date of Patent: August 14, 2007
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Bruce Faure, Alice Boussagol
  • Patent number: 7211461
    Abstract: The purpose of the invention is increasing the efficiency of utilizing an EL material and providing a deposition method and a vapor deposition apparatus which is one of the film formation systems which are excellent in throughput and uniformity in film thickness in forming an EL layer. According to the invention, evaporation is performed by moving or reciprocating an evaporation source holder in which a plurality of containers (crucible) each encapsulating an evaporation material are set only in an X direction while moving a substrate at regular intervals. Further, in the plurality of evaporation source holders, film thickness meters of adjacent evaporation sources are disposed alternately so as to sandwich the movement pathway of the substrate.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: May 1, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichiro Sakata, Shunpei Yamazaki
  • Patent number: 7205167
    Abstract: A method for detecting photoresist residue during semiconductor device manufacture includes developing photoresist on a surface of a semiconductor device to expose portions of the surface A plurality of etch paths are then partially etched into the surface and inspected to determine their depths.
    Type: Grant
    Filed: May 10, 2004
    Date of Patent: April 17, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: To-Yu Chen, Mei-Yen Li, Yung-Lung Hsu
  • Publication number: 20070042510
    Abstract: Systems and methods for monitoring a semiconductor manufacturing process are provided. The method includes: performing a semiconductor manufacturing process step on a wafer; directing light having a known wavelength at the wafer; monitoring a predetermined spectral range of light transmitted through a selected region of the wafer to detect an optical characteristic of the selected region; and based on the detected optical characteristic of the selected region, adjusting a process condition of the semiconductor manufacturing process step.
    Type: Application
    Filed: August 19, 2005
    Publication date: February 22, 2007
    Inventor: Woo Yoo