Of Thick-film Circuits Or Parts Thereof (epo) Patents (Class 257/E21.534)
  • Patent number: 12134263
    Abstract: A direct to mesh (DtM) screen printer for creating a screen stencil is provided. The DtM screen printer includes a fixture to hold a frame, which holds a pre-stretched mesh in place during application of a jettable emulsion, a platen having a cavity and an array of holes in a top surface of the platen and is located against one side of the pre-stretched mesh, and a printer carriage supporting a print head for printing the jettable emulsion on a side of the pre-stretched mesh opposite the platen.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: November 5, 2024
    Assignee: DualChrome AG
    Inventors: John Cecil Harwell, Shlomo Hermon, René Bär
  • Patent number: 12101893
    Abstract: A method of dispensing a metallic nanoparticle composition along a trajectory on a substrate is disclosed. The composition is dispensed from a nozzle through its outlet. The outlet is characterized by an outlet size. First, an initial pressure is applied to the composition in the nozzle to cause the composition to flow from the outlet. The nozzle is positioned at a height such that the composition does not flow onto the substrate. Second, the nozzle is lowered toward the substrate such that a fluid bridge forms between the outlet and the substrate and an adjusted pressure is applied to the composition in the nozzle. The adjusted pressure is lower than needed for the composition to continue to flow from the outlet. Third, the fluid is dispensed from the nozzle. A dispensing pressure is applied to the fluid while the nozzle is laterally displaced along the trajectory on the substrate.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: September 24, 2024
    Assignee: XTPL S.A.
    Inventors: Mateusz Zając, Urszula Nowak, Piotr Kowalczewski, Filip Granek, Jan Kotarski, Maciej Tybel, Szymon Zięba
  • Patent number: 10270032
    Abstract: A method of forming a device includes emitting a coherent light beam and providing a mask including a region transparent to the light beam. The method further includes projecting the light beam on a photosensitive layer through the transparent region of the mask. The method further includes forming a recess in the photosensitive layer, wherein the recess corresponds to a position of the transparent region of the mask. The method further includes filling an organic light emitting material in the recess.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: April 23, 2019
    Assignee: INT TECH CO., LTD.
    Inventor: Chien-Yu Chen
  • Patent number: 10270362
    Abstract: A rectifier IC includes, in a single package, a transistor chip in which a transistor is integrated, a controller chip that detects a drain voltage (VD) and a source voltage (VS) of the transistor so as to perform ON/OFF control of the transistor, and functions as secondary side rectifier means of an insulation type switching power supply. The controller chip turns on the transistor when VD is lower than VS and turns off the transistor when VD is higher than VS. The insulation type switching power supply includes a transformer supplied with an input voltage, a control unit that controls primary side current of the transformer according to a feedback signal, a rectifying and a smoothing unit that rectifies and smooths a secondary side voltage of the transformer so as to generate an output voltage, and an output feedback unit that generates the feedback signal according to the output voltage.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: April 23, 2019
    Assignee: Rohm Co., Ltd.
    Inventor: Junichi Hagino
  • Patent number: 9755591
    Abstract: An apparatus including: a plurality of amplifiers having a plurality of output ports, respectively, the plurality of amplifiers configured to amplify radio frequency (RF) signals received from at least one antenna; a plurality of demodulators configured to receive the amplified RF signals at a plurality of input ports, respectively, the plurality of demodulators configured to downconvert the received RF signals; and a plurality of switches configured to couple selected output ports of the plurality of amplifiers to selected input ports of the plurality of demodulators, wherein each switch of the plurality of switches is configured such that at least one of the plurality of output ports of the plurality of amplifiers is selectively coupled to any of multiple input ports of the plurality of input ports of the plurality of demodulators.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: September 5, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Chuan Wang, Dongling Pan, Wing Fat Andy Lau, Jorge Andres Garcia, David Zixiang Yang
  • Patent number: 9686862
    Abstract: A capacitor in a multilayer printed circuit board is described. The capacitor may include a via of a via-in-pad type and a dielectric mixture filled in the via of the via-in-pad type. The via may be disposed under an integrated circuit contact pad of the multilayer printed circuit board. The dielectric mixture may include a nanoparticle-sized dielectric powder mixed with an adhesive material.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: June 20, 2017
    Assignee: FINISAR CORPORATION
    Inventor: Henry Meyer Daghighian
  • Patent number: 9593027
    Abstract: The disclosure provides relates to compositions and methods for water treatment. It also addresses a method for synthesizing TiO2 (and other metal oxides) with or without dopants. This method enables control over size, phase, morphology and porosity and specific surface area of these materials. The disclosure also provides metal oxide composites that can be used in photocatalysts, photovoltaics, energy storage materials (e.g., Li-ion anodes), and solar hydrogen applications.
    Type: Grant
    Filed: March 2, 2013
    Date of Patent: March 14, 2017
    Assignee: The Regents of the University of California
    Inventors: David Kisailus, Nichola Kinsinger
  • Patent number: 8102005
    Abstract: The present invention provides a method for forming a wiring having a minute shape on a large substrate with a small number of steps, and further a wiring substrate formed by the method. Moreover, the present invention provides a semiconductor device in which cost reduction and throughput improvement are possible due to the small number of steps and reduction of materials and which has a semiconductor element with a minute structure, and further a manufacturing method thereof. According to the present invention, a composition including metal particles and organic resin is irradiated with laser light and a part of the metal particles is baked to form a conductive layer typified by a wiring, an electrode or the like over a substrate. Further, a semiconductor device having the baked conductive layer as a wiring or an electrode is formed.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: January 24, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroko Yamamoto, Osamu Nakamura
  • Publication number: 20100212732
    Abstract: A solar cell includes a substrate, a protective layer located over a first surface of the substrate, a first electrode located over a second surface of the substrate, at least one p-type semiconductor absorber layer located over the first electrode, an n-type semiconductor layer located over the p-type semiconductor absorber layer, and a second electrode over the n-type semiconductor layer. The p-type semiconductor absorber layer includes a copper indium selenide (CIS) based alloy material, and the second electrode is transparent and electrically conductive. The protective layer has an emissivity greater than 0.25 at a wavelength of 2 ?m, has a reactivity with a selenium-containing gas lower than that of the substrate, and may differ from the first electrode in at least one of composition, thickness, density, emissivity, conductivity or stress state. The emissivity profile of the protective layer may be uniform or non-uniform.
    Type: Application
    Filed: February 20, 2009
    Publication date: August 26, 2010
    Inventors: Chris Schmidt, John Corson
  • Patent number: 7494923
    Abstract: The present invention provides a method for forming a wiring having a minute shape on a large substrate with a small number of steps, and further a wiring substrate formed by the method. Moreover, the present invention provides a semiconductor device in which cost reduction and throughput improvement are possible due to the small number of steps and reduction of materials and which has a semiconductor element with a minute structure, and further a manufacturing method thereof. According to the present invention, a composition including metal particles and organic resin is irradiated with laser light and a part of the metal particles is baked to form a conductive layer typified by a wiring, an electrode or the like over a substrate. Further, a semiconductor device having the baked conductive layer as a wiring or an electrode is formed.
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: February 24, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroko Yamamoto, Osamu Nakamura