Abstract: A socket connector includes a substrate having signal and ground contact channels between upper and lower surfaces and ground bar slots. The socket connector includes signal socket contacts received in signal contact channels and ground socket contacts received in ground contact channels. The socket connector includes ground bars received in corresponding ground bar slots. The ground bars electrically connect the corresponding ground socket contacts.

Abstract: The present disclosure discloses a test apparatus for testing a package-on-package (POP) type semiconductor package includes a lower socket mounted to a tester board providing a test signal, and provided with a plurality of socket pins connected to a lower terminal of a lower package to electrically connect the lower package and the tester board to each other; a pusher to which an upper package is coupled, the pusher having a pusher body which may be moved to approach the lower socket or to be moved away from the lower socket; and an upper socket coupled to the pusher body, and provided with an insulating pad formed of a nonelastic insulating material and a plurality of electrically-conductive parts supported on the insulating pad, the electrically-conductive part being formed of an elastic insulating material containing a plurality of electrically-conductive particles.

Abstract: A system and method for coupling is described. The system includes, a printed electronic circuit having one or more conductive traces disposed on a flexible substrate The printed electronic circuit includes one or more magnetic couplers disposed on the flexible substrate. The system includes a magnetic connector having one or more magnets that each magnetically attach to a corresponding one of the one or more magnetic couplers The magnetic connector includes one or more spring-loaded pins each aligned with and electrically coupled to a corresponding one of the one or more conductive traces.

Abstract: A modular integrated circuit test fixture integrates the integrated circuit (IC) handler to IC test fixture alignment interface (the alignment plate) into a daughter card subassembly, which reduces the overall rejection rate of devices due to alignment errors. The test fixture has a plurality of daughter card subassemblies for receiving integrated circuits for testing. Each daughter card subassembly is independently removable from the test fixture and includes a daughter card for a particular size and type of integrated circuit, a plurality of sockets electrically and mechanically coupled to the daughter card to receive respective integrated circuits for testing, and an alignment plate to provide alignment between an IC handler and respective ones of the daughter card subassemblies and to provide alignment for one or more manual test lids. The manual test lids are removed for automatic testing using an IC handler.

Abstract: A method, in some embodiments, comprises: providing a direct bonded copper (DBC) substrate including a plurality of copper traces; providing a guide plate having protrusions on a surface of the guide plate; mounting hollow bush rings onto the protrusions; mounting the bush rings onto the copper traces by aligning the protrusions of the guide plate with solder units on said copper traces; attaching the bush rings and one or more dies to the copper traces by simultaneously reflowing said solder units and other solder units positioned between the dies and the copper traces; and after said simultaneous reflow, removing the protrusions from the bush rings.

Abstract: A contact monolithically formed of a single metal plate includes a tubular part, a first end part, a second end part, and a spring accommodated in the tubular part. The first end part is at a first end of the tubular part and moves relative to the tubular part. The second end part includes a terminal and a flexible portion. The flexible portion extends from a second end of the tubular part. The terminal extends from the flexible portion in a direction away from the tubular part. The spring urges the first end part in a direction away from the second end part. The flexible portion deforms and thereby moves the terminal on a surface of an object when the terminal is pressed against the object.

Abstract: A stretchable organic light-emitting display device includes a stretchable base plate including a stretchable substrate, first metal electrodes that are separated from each other and located in a plurality of rows on a the stretchable substrate, and first power wirings electrically coupling respective ones of the metal electrodes of each row, a light-emitting layer on the stretchable base plate, second metal electrodes located in a plurality of rows on the light-emitting layer and corresponding to the first metal electrodes, second power wirings for electrically coupling respective ones of the second metal electrodes of each row, and an encapsulation substrate covering the second power wiring.

Abstract: A system for connecting a first chip to a second chip having a post on the first chip having a first metallic material, a recessed wall within the second chip and defining a well within the second chip, a conductive diffusion layer material on a surface of the recessed wall within the well, and a malleable electrically conductive material on the post, the post being dimensioned for insertion into the well such that the malleable electrically conductive material will deform within the well and, upon heating to at least a tack temperature for the malleable, electrically conductive material, will form an electrically conductive tack connection with the diffusion layer to create an electrically conductive path between the first chip and the second chip.

Abstract: This invention discloses a through-silicon via (TSV) structure for providing an electrical path between a first-side surface and a second-side surface of a silicon chip, and a method for fabricating the structure. In one embodiment, the TSV structure comprises a via penetrated through the chip from the first-side surface to the second-side surface, providing a first end on the first-side surface and a second end on the second-side surface. A local isolation layer is deposited on the via's sidewall and on a portion of the first-side surface surrounding the first end. The TSV structure further comprises a plurality of substantially closely-packed microstructures arranged to form a substantially non-random pattern and fabricated on at least the portion of the first-side surface covered by the local isolation layer for promoting adhesion of the local isolation layer to the chip. A majority of the microstructures has a depth of at least 1 ?m.

Abstract: A device includes a semiconductor die having a surface, a plurality of proximity connectors proximate to the surface, and a circuit coupled to at least one of the plurality of proximity connectors. The semiconductor die is configured to communicate voltage-mode signals through capacitive coupling using one or more of the plurality of proximity connectors. The circuit also includes a filter with a capacitive-summing junction to equalize the signals.

Abstract: A sensor for acoustic applications such as a silicone microphone is provided containing a backplate provided with apertures and a flexible diaphragm formed from a silicon on insulator (SOI) wafer which includes a layer of heavily doped silicon, a layer of silicon and an intermediate oxide layer that is connected to, and insulated from the backplate. The arrangement of the diaphragm in relation to the rest of the sensor and the sensor location, being mounted over the aperture in a PCB, reduces the acoustic signal pathway which allows the sensor to be both thinner and more importantly, enables there to be a greater back volume.

Abstract: The present invention is an apparatus for integrating multiple devices. The apparatus includes a substrate having a first via and a second via, a semiconductor chip positioned on a top portion of the substrate and positioned between the first via and the second via, first and second bumps positioned on the semiconductor chip, and an interposer wafer having a first interposer spring assembly and a second interposer spring assembly, the first interposer spring assembly having a first interposer spring and a first electrical connection attached to the first interposer spring, and the second interposer spring assembly having a second interposer spring and a second electrical connection attached to the second interposer spring.

Abstract: A processing technique facilitating the fabrication of the integrated circuit with microsprings at different vertical positions relative to a surface of a substrate is described. During the fabrication technique, microsprings are lithographically defined on surfaces of a first substrate and a second substrate. Then, a hole is created through a first substrate. Moreover, the integrated circuit may be created by rigidly mechanically coupling the two substrates to each other such that the microsprings on the surface of the second substrate are within a region defined at least in part by an edge around the hole. Subsequently, photoresist that constrains the microsprings on the surfaces of the two substrates may be removed. In this way, microsprings at the different vertical positions can be fabricated.

Abstract: At least one microspring has applied thereover a laminate structure to provide: mechanical protection during handling and wafer processing, a spring spacer layer, strengthening of the anchor between spring and substrate, provision of a gap stop during spring deflection, and moisture and contaminant protection. A fully-formed laminate structure may be applied over the microspring structure or a partly-formed laminate structure may be applied over the microspring structure then cured or hardened. The tip portion of the microspring may protrude through the laminate structure and be exposed for contact or may be buried within the contact structure. The laminate structure may remain in place in the final microspring structure or be removed in whole or in part. The laminate structure may be photolithographically patternable material, patterned and etched to remove some or all of the structure, forming for example additional structural elements such as a gap stop for the microspring.

Abstract: A semiconductor device includes a main current external electrode for connecting a high-voltage main current electrode of a power semiconductor element to the outside, and a resin case into which the main current external electrode is press fitted. The main current external electrode has a press-fitted fixing portion and a claw fixing portion for fixation to the resin case. The claw fixing portion includes a projection passing through a through hole defined in the resin case, and having a bendable claw portion at its tip end.

Abstract: In some aspects of the invention, an insulating substrate fixed onto a metal base plate can include an insulating plate and metal foils. A semiconductor element can be disposed on each of the metal foils. External connection terminals can be fixed to a set of ends of terminal holders, respectively. The other ends of the terminal holders can be bonded to the metal foils, respectively. External connection terminals which are main terminals through which main current flows are disposed on a lid. By preparing a plurality of lids having different layouts of the external connection terminals, in which the external connection terminals are connected to the terminal holders in the resin case, respectively, and exchanging the lids, the positions of the external connection terminals can be easily changed.

Abstract: A semiconductor arrangement includes a circuit carrier, bonding wire and at least N half bridge circuits. The circuit carrier includes a first metallization layer, a second metallization layer, an intermediate metallization layer arranged between the first metallization layer and the second metallization layer, a first insulation layer arranged between the intermediate metallization layer and the second metallization layer, and a second insulation layer arranged between the first metallization layer and the intermediate metallization layer. Each half bridge circuit includes a controllable first semiconductor switch and a controllable second semiconductor switch. The first semiconductor switch and the second semiconductor switch of each half bridge circuit are arranged on that side of the first metallization layer of the circuit carrier facing away from the second insulation layer. The bonding wire is directly bonded to the intermediate metallization layer of the circuit carrier at a first bonding location.

Abstract: A package has a pad chip having contact pads, a spring chip having micro-springs in contact with the contact pads to form interconnects, the area in which the micro-springs contact the contact pads forming an interconnect area, a chemical activator in the interconnect area, and an adhesive responsive to the chemical activator in the interconnect area. A package has a pad chip having contact pads, a spring chip having micro-springs in contact with the contact pads to form interconnects, a chemical activator on one of either the pad chip or the spring chip, and an adhesive responsive to the chemical activator on the other of either the pad chip or the spring chip.

Abstract: A pressure-contact power semiconductor module is arranged on a heat sink. The power semiconductor module is used with at least one substrate provided with conductor tracks and power semiconductor components. The module has a mounting body, on the underside of which the at least one substrate is arranged, and which is formed with cutouts. The module also includes a load connection element which is provided with contact feet that project away from strip sections and make pressure contact with the conductor tracks. The power semiconductor module additionally has a dimensionally stable cover, which covers the mounting body on all sides and is connected to the mounting body by means of snap-action latching connections. At least one pad element is restrained between the cover and the strip sections of the load connection elements.

Abstract: Some embodiments provide force input control devices for sensing vector forces comprising: a sensor die comprising: a rigid island, an elastic element coupled to the rigid island, die frame coupled to a periphery of the elastic element, one or more stress sensitive components on the elastic element, and signal processing IC, where the sensor die is sensitive to a magnitude and a direction of a force applied to the rigid island within the sensor die, where the sensor die is coupled electrically and mechanically to a substrate, a spring element coupling an external button, where the force is applied, to the rigid island element, wherein the spring element has a flat geometry and located in a plane parallel to a plane of the substrate, where the spring element is configured to translate a deflection of the button into an allowable force applied to the rigid island.

Abstract: Semiconductor dies are stacked offset from one another so that terminals located along two edges of each die are exposed. The two edges of the dies having terminals may be oriented in the same direction. Electrical connections may connect terminals on one die with terminals on another die, and the stack may be disposed on a wiring substrate to which the terminals of the dies may be electrically connected.

Abstract: The invention relates to a power semiconductor module including a power semiconductor chip arranged on a substrate and comprising a bottom side facing the substrate, a top side facing away from the substrate, and an electrical contact face arranged on the top side. A bond wire is bonded to the contact face. At least when the power semiconductor module is fastened to a heatsink, a contact pressure element creates a contact pressure force (F) acting on a sub-portion 36 of a bond wire portion configured between two adjacent bond sites. The contact pressure force (F) results in the power semiconductor chip and a substrate beneath being pressed against the heatsink.

Abstract: A semiconductor device in accordance with one embodiment of the invention can include a substrate onto which a wiring pattern is formed. In addition, the semiconductor device can include a plurality of semiconductor packages. Each semiconductor package can include a lead frame that is coupled to an electrode of a semiconductor chip. Each lead frame can be located on a side surface and a bottom surface of the semiconductor package. In addition, the semiconductor device can include a pressure-contact section for receiving the plurality of semiconductor packages and for causing the plurality of semiconductor packages to come into contact with the wiring pattern.

Abstract: A cap for a MEMS package includes a main body having a bottom surface, a top surface, a plurality of accommodations recessed from the bottom surface towards the top surface, and a plurality of slots recessed from the top surface towards the bottom surface in a way that the top surface is defined into a plurality of regions corresponding to the accommodations respectively. After completion of the MEMS package, the package can be cut along the slots into a plurality of MEMS package units, such that the cutting work can be done quickly and the cutting burrs can be minimized.

Abstract: A microelectronic package includes a mounting structure, a microelectronic element associated with the mounting structure, and a plurality of conductive posts physically connected to the mounting structure and electrically connected to the microelectronic element. The conductive posts project from the mounting structure in an upward direction, at least one of the conductive posts being an offset post. Each offset post has a base connected to the mounting structure, the base of each offset post defining a centroid. Each offset post also defines an upper extremity having a centroid, the centroid of the upper extremity being offset from the centroid of the base in a horizontal offset direction transverse to the upward direction. The mounting structure is adapted to permit tilting of each offset post about a horizontal axis so that the upper extremities may wipe across a contact pad of an opposing circuit board.

Abstract: A device includes a first device structure having a semiconductor platform, and a second device structure having a microstructure spaced from the semiconductor platform. The device further includes a cable having a plurality of beams to couple the microstructure to the first device structure. Each beam of the plurality of beams has a polymer coating and a serpentine-shaped region.

Abstract: The present invention is an apparatus for integrating multiple devices. The apparatus includes a substrate having a first via and a second via, a semiconductor chip positioned on a top portion of the substrate and positioned between the first via and the second via, first and second bumps positioned on the semiconductor chip, and an interposer wafer having a first interposer spring assembly and a second interposer spring assembly, the first interposer spring assembly having a first interposer spring and a first electrical connection attached to the first interposer spring, and the second interposer spring assembly having a second interposer spring and a second electrical connection attached to the second interposer spring.

Abstract: At least one microspring has applied thereover a laminate structure to provide: mechanical protection during handling and wafer processing, a spring spacer layer, strengthening of the anchor between spring and substrate, provision of a gap stop during spring deflection, and moisture and contaminant protection. A fully-formed laminate structure may be applied over the microspring structure or a partly-formed laminate structure may be applied over the microspring structure then cured or hardened. The tip portion of the microspring may protrude through the laminate structure and be exposed for contact or may be buried within the contact structure. The laminate structure may remain in place in the final microspring structure or be removed in whole or in part. The laminate structure may be photolithographically patternable material, patterned and etched to remove some or all of the structure, forming for example additional structural elements such as a gap stop for the microspring.

Abstract: A device including a semiconductor chip and metal foils. One embodiment provides a device including a semiconductor chip having a first electrode on a first face and a second electrode on a second face opposite to the first face. A first metal foil is attached to the first electrode of the semiconductor chip in an electrically conductive manner. A second metal foil is attached to the second electrode of the semiconductor chip in an electrically conductive manner.

Abstract: Disclosed is a semiconductor package 3 including a socket 1 which is formed on the top surface 3a for enabling electrical conductivity and a connecting terminal 2 which is formed on the bottom surface 3b for enabling electrical conductivity. The socket 1a has a depressed shape, and a spiral contact 1 is formed in the depression 1c. An electronic circuit module is constructed by mounting and electrically connecting a semiconductor module wherein a plurality of semiconductor packages 3 is stacked on a circuit board. A circuit board with sockets is constructed by mounting a socket board on a circuit board.

Abstract: A device includes a semiconductor die having a surface, a plurality of proximity connectors proximate to the surface, and a circuit coupled to at least one of the plurality of proximity connectors. The semiconductor die is configured to communicate voltage-mode signals through capacitive coupling using one or more of the plurality of proximity connectors. The circuit also includes a filter with a capacitive-summing junction to equalize the signals.

Abstract: A semiconductor device includes a semiconductor element; a plate member disposed opposite to an electronic-circuit forming portion of the semiconductor element; and an elastic body arranged in a compressed state between the semiconductor element and the plate member, wherein the elastic body includes at least one first protruding portion at one end in an extension direction of the elastic body, the first protruding portion being formed opposite to the electronic-circuit forming portion of the semiconductor element, and the semiconductor element and the plate member are fastened by an adhesive agent.

Abstract: An integrated circuit, a circuit system and method of manufacturing such is disclosed. One embodiment provides a circuit chip including a first contact field on a chip surface; and an insulating layer on the chip surface. The insulating layer includes a flexible material. A contact pillar is coupled to the first contact field and extends from the chip surface through the insulating layer. The contact pillar includes a conductive material.

Abstract: A semiconductor device that can cope with larger numbers of pins and finer pitches while suppressing lowering of the manufacturing yield and reliability includes: a semiconductor chip having a plurality of electrodes provided on an upper surface thereof; a plurality of lead terminals including inner lead portions disposed toward the semiconductor chip; a sheet-form wiring member having a plurality of conductors insulated from one another on one main surface thereof; and a sealing-resin layer for sealing at least the semiconductor chip, the inner lead portions and the wiring member. The electrodes of the semiconductor device and the inner lead portions of the lead terminals are electrically connected respectively to each other via the conductors of the wiring member.

Abstract: A method of assembling a semiconductor device includes providing a chip attached to an elastic carrier, and supporting the elastic carrier with a stiffener. The method additionally includes removing the stiffener from the elastic carrier after attaching the elastic carrier to a board.

Abstract: A semiconductor module including: a semiconductor chip in which an integrated circuit is formed; an electrode formed on the semiconductor chip and electrically connected to the integrated circuit; an insulating film formed on the semiconductor chip and having an opening positioned corresponding to the electrode; an elastic protrusion disposed on the insulating film, a surface of the elastic protrusion opposite to the insulating film being convexly curved; an interconnect extending from over the electrode to over the elastic protrusion; an elastic substrate on which a lead is formed, the lead being in contact with part of the interconnect positioned on the elastic protrusion; and an adhesive maintaining a space between a surface of the semiconductor chip on which the elastic protrusion is formed and a surface of the elastic substrate on which the lead is formed. The elastic substrate has a first depression formed by elastic deformation.

Abstract: Semiconductor devices that contain a system in package and methods for making such packages are described. The semiconductor device with a system in package (SIP) contains a first IC die, passive components, and discrete devices that are contained in a lower level of the package. The SIP also contains a second IC die that is vertically separated from the first IC die by an array of metal interposers, thereby isolating the components of the first IC die from the components of the second IC die. Such a configuration provides more functionality within a single semiconductor package while also reducing or eliminating local heating in the package. Other embodiments are also described.

Abstract: A portable memory card and methods of manufacturing same are disclosed. The portable memory includes a substrate having a plurality of holes formed therein. During the encapsulation process, mold compound flows over the top surface of the substrate, through the holes, and down into a recessed section formed in the bottom mold cap plate to form a projection of mold compound on the bottom surface of the substrate.

Abstract: An assembly of substrate packages interconnected with flex cables and a method of fabrication of the substrate package. The assembly allows input/output (I/O) signals to be speedily transmitted between substrate packages via flex cable and without being routed through the motherboard. Embodiments relate to a substrate package providing separable inter-package flex cable connection. Hermetically-sealed guiding through holes are provided on the substrate package as a mechanical alignment feature to guide connection between flex cables and high speed I/O contact pads on the substrate package. Embodiments of the method of fabrication relate to simultaneously forming hermetically-sealed guiding through holes and I/O contact pads.

Abstract: Apparatus and methods are provided for integrating microchannel cooling modules within high-density electronic modules (e.g., chip packages, system-on-a-package modules, etc.,) comprising multiple high-performance IC chips. Electronic modules are designed such that high-performance (high power) IC chips are disposed in close proximity to the integrated cooling module (or cooling plate) for effective heat extraction. Moreover, electronic modules which comprise large surface area silicon carriers with multiple chips face mounted thereon are designed such that integrated silicon cooling modules are rigidly bonded to the back surfaces of such chips to increase the structural integrity of the silicon carriers.

Abstract: A high reliability power module which includes a plurality of hermetically sealed packages each having electrical terminals formed from an alloy of tungsten copper and brazed onto a surface of a ceramic substrate.

Abstract: Provided is near-field optical probe including: a cantilever arm support portion that is formed of a lower silicon layer of a silicon-on-insulator (SOI) substrate, the cantilever arm support portion having a through hole formed therein at a side of the lower silicon layer; and a cantilever arm forming of a junction oxidation layer pattern and an upper silicon layer pattern on the SOI substrate that are supported on an upper surface of the lower silicon layer and each have a smaller hole than the through hole, a silicon oxidation layer pattern having a tip including an aperture at a vertical end, corresponding with the hole on the upper silicon layer pattern, and an optical transmission prevention layer that is formed on the silicon oxidation layer pattern and does not cover the aperture.

Abstract: Even when a substrate on which a semiconductor package has been mounted is made curved, stress upon electrical connections is mitigated, thereby eliminating faulty connections and improving connection reliability. A semiconductor chip has electrodes on a second face thereof. Support blocks, capable of bending and flexing, are placed at two locations on a peripheral edge of a first face of the semiconductor chip. An interposer is placed so as to span the support blocks with the support blocks interposed between itself and the semiconductor chip, and has a wiring pattern in a flexible resin film. Two end portions of the interposer are folded back onto the side of the second face of the semiconductor chip, and the wiring pattern thereof is electrically connected to the electrodes of the semiconductor chip.

Abstract: A package has a pad chip having contact pads, a spring chip having micro-springs in contact with the contact pads to form interconnects, the area in which the micro-springs contact the contact pads forming an interconnect area, a chemical activator in the interconnect area, and an adhesive responsive to the chemical activator in the interconnect area. A package has a pad chip having contact pads, a spring chip having micro-springs in contact with the contact pads to form interconnects, a chemical activator on one of either the pad chip or the spring chip, and an adhesive responsive to the chemical activator on the other of either the pad chip or the spring chip.

Abstract: A device is disclosed which includes a flexible material including at least one conductive wiring trace, a first die including at least an integrated circuit, the first die being positioned above a portion of the flexible material, and an encapsulant material that covers the first die and at least a portion of the flexible material. A method is disclosed which includes positioning a first die above a portion of a flexible material, the first die including an integrated circuit and the flexible material including at least one conductive wiring trace, and forming an encapsulant material that covers the first die and at least a portion of the flexible material, wherein at least a portion of the flexible material extends beyond the encapsulant material.

Abstract: The invention relates to a power semiconductor module including a power semiconductor chip arranged on a substrate and comprising a bottom side facing the substrate, a top side facing away from the substrate, and an electrical contact face arranged on the top side. A bond wire is bonded to the contact face. At least when the power semiconductor module is fastened to a heatsink, a contact pressure element creates a contact pressure force (F) acting on a sub-portion 36 of a bond wire portion configured between two adjacent bond sites. The contact pressure force (F) results in the power semiconductor chip and a substrate beneath being pressed against the heatsink.

Abstract: A power semiconductor arrangement is provided that includes a power semiconductor chip being electrically connected to a set of plug-like elements with at least two plug-like elements and further including a sheet metal strip line including a set of openings receiving the first set of plug-like elements, where the set of openings in the sheet metal strip line and the set of plug-like elements establish a press fit connection.

Abstract: A structure has at least one structure component formed of a first material residing on a substrate, such that the structure is out of a plane of the substrate. A first coating of a second material then coats the structure. A second coating of a non-oxidizing material coats the structure at a thickness less than a thickness of the second material.

Abstract: Systems and methods are provided for fabricating compliant spring contacts for use in, for example, IC packaging and interconnection between multi-layers in stacked IC packages and electronic components. Internal stresses generated within an formed film are released to cause the film to buckle and/or bow away from a supporting terminal. A thin stressed metal film layer is selectively broken away from the substrate of the supporting terminal allowing the stressed metal film to take on a bowed and/or spring-like shaped through minute deformation based on a release of the internal stresses. The resultant thin compliant spring contact can deform a small amount as the spring contact is then pressed against a compatible mating contact surface in an overlying layer.

Abstract: To prevent or alleviate the occurrence of stress in the junction portion between the semiconductor element and the semiconductor package for mounting the semiconductor element, so that cracks will not occur even when there is mounted a semiconductor element having a low strength. A package for semiconductor devices is formed as a laminate of many layers including a plurality of conducting layers and insulating resin layers that are alternately laminated one upon the other and having, on one surface of the laminate, a portion for mounting a semiconductor element. The whole region or some region(s) of the insulating resin layers of the laminate, including at least the portion for mounting the semiconductor element and the peripheries thereof, are constituted by a prepreg obtained by impregnating a woven fabric of a liquid crystal polymer with an insulating resin.