Abstract: A system including a point of load converter module (POL). The POL module includes a point of load printed circuit board. At least one inductor is mounted to the point of load printed circuit board. The POL module includes a power network. The point of load converter module is configured to be surface mounted. The system includes a heat sink including a first leg configured to be surface mounted adjacent the point of load printed circuit board, a second leg configured to be surface mounted adjacent the point of load printed circuit board opposite the first leg, and a cap portion connecting the first leg to the second leg. The heat sink is sized and shaped to encompass the POL and configured to connect to the power network. The power network may be a PGND network.

Abstract: A semiconductor package is provided. The semiconductor package includes a first substrate, a first semiconductor chip disposed on the first substrate, a heat sink structure comprising a lower heat sink pattern disposed on the first semiconductor chip, a metal film pattern disposed on the lower heat sink pattern, and an insulating film disposed on side walls of the lower heat sink pattern and side walls of the metal film pattern, an interposer disposed on the heat sink structure, and a solder ball which connects the heat sink structure and the interposer.

Abstract: A multisided heat spreader includes a base, a first wall, and a second wall. A proximal end of the first wall is connected to a first end of the base. A proximal end of the second wall is connected to a second end of the base which is opposite to the first end of the base. A space is defined adjacent to a first surface of the base and between the first wall and the second wall such that the multisided heat spreader is open between a distal end of the first wall and a distal end of the second wall. The first wall and the second wall are configured to receive an electronic component in the space therebetween. A second surface of the base is configured to be attached to a heat generation component. The first surface of the base is opposite to the second surface of the base.

Abstract: A fixture to facilitate fabrication of a heat sink includes a base plate to support a lower section of the heat sink, and multiple registration pins extending from the base plate. A platen is provided over a heat transfer element (HTE) of the heat sink, with the platen including slip fit regions to slip fit around respective registration pins, and with the lower section and HTE disposed between the base plate and the platen, and forming a fixture stack segment aligned with an active region of the cold plate. A load plate is provided which includes slip fit regions configured to slip fit around corresponding registration pins with the load plate disposed over the fixture stack segment. The load plate includes a single load pin centrally disposed to apply a load to the fixture stack segment and facilitate bonding the lower section and HTE together.

Abstract: A thermal control system for pluggable optics in an optical telecom platform. The thermal control system comprises a thermal interface and one or more actuators. The thermal interface is configured to dissipate heat from a pluggable optical module in the optical telecom platform. The one or more actuators configured to change a position of the pluggable optical module relative to the thermal interface such that a thermal resistance between the pluggable optical module and the thermal interface is different based on a position of the pluggable optical module relative to the thermal interface.

Abstract: A thermal control system for pluggable optics in an optical platform. The thermal control system includes a heatsink and an actuator. The heatsink is configured to dissipate heat from a pluggable optical module in the optical platform. The heatsink includes a mating surface configured to make thermal contact with a module surface of the pluggable optical module inserted into the optical platform. The actuator is configured to manipulate the mating surface to change a contact area between the mating surface and the module surface such that the contact area between the mating surface and the module surface is larger for a temperature above a predetermined temperature than for a temperature below a predetermined temperature.

Abstract: A thermal conductive stress relaxation structure is interposed between a high-temperature substance and a low-temperature substance to conduct heat in a heat-transfer direction from the high-temperature substance to the low-temperature substance. The structure includes an assembly configured such that a thermal conductive material gathers in a non-bonded state having stress relaxation effect. Such an assembly is a rolled-up body configured such that a carbon-based sheet material and a metal-based sheet material are alternately rolled up, for example. This structure has one or more interfaces at which adjacent parts can slide, thereby dividing a deformable region to relax the thermal stress. It has a low rigidity and can thus deform to release the thermal stress. The structure can suppress the thermal stresses and the shape changes that would be generated in the high-temperature substance and the low-temperature substance, and each physical body located there between.

Abstract: A semiconductor module arrangement includes a semiconductor module having a top side, an underside opposite the top side, and a plurality of electrical connection contacts formed at the top side. The semiconductor module arrangement additionally includes a printed circuit board, a heat sink having a mounting side, and one or a plurality of fixing elements for fixing the printed circuit board to the heat sink. Either a multiplicity of projections are formed at the underside of the semiconductor module and a multiplicity of receiving regions for receiving the projections are formed at the mounting side of the heat sink, or a multiplicity of projections are formed at the mounting side of the heat sink and a multiplicity of receiving regions for receiving the projections are formed at the underside of the semiconductor module. In any case, each of the projections extends into one of the receiving regions.

Abstract: The invention relates to an electronic module and to a method for producing same, comprising a mold body (2), a first circuit carrier (3; 13) having a first inner face (3a; 13a), on which electronic components (5) are arranged, and a first outer face (3b; 13b), a second circuit carrier (4; 14) having a second inner face (4a; 14a), on which electronic components (5) are arranged, and a second outer face (4b; 14b), and at least one spring device (6, 7; 16) which connects the inner faces (3a, 14a; 13a, 14a), or surfaces of electronic components (5) arranged thereon, of the first and second circuit carriers (3, 4; 13, 14), wherein the first and second outer faces (3a, 4a; 13a, 14a) are exposed towards the outside of the electronic module in order to emit heat directly to the outside, and wherein the first and second outer faces (3a, 4a; 13a, 14a) are parallel to each other.

Abstract: The thermal energy transfer techniques of the disclosed embodiments utilize passive thermal energy transfer techniques to reduce undesirable side effects of trapped thermal energy at the circuit level. The trapped thermal energy may be transferred through the circuit with thermally conductive structures or elements that may be produced as part of a standard integrated circuit process. The localized and passive removal of thermal energy achieved at the circuit level rather just at the package level is both more effective and more efficient.

Abstract: Semiconductor dies are mounted on a heat sink array frame structure. The heat sink array frame structure and the semiconductor dies are assembled together with an insulating substrate that has a corresponding array of apertures on an adhesive tape. The semiconductor dies are connected electrically with electrical contacts on the insulating substrate. The semiconductor dies, heat sinks and electrical connections to the contacts are encapsulated with a mold compound and then the encapsulated array is de-taped and singulated.

Abstract: A method of manufacturing a modular semiconductor subassembly: providing at least one semiconductor subassembly having a modular sidewall element of modular dimensions and a semiconductor substrate base element coupled to the modular sidewall element that has at least one semiconductor element with a layout sized to be accommodated by modular dimensions of the modular sidewall element. If a modular package protective cover is to be used: providing the modular package protective cover configured to accommodate the semiconductor subassembly in accordance with a modular design; securing the semiconductor subassembly in the modular package protective cover to create a modular package assembly; and mounting the modular package assembly to a core, with a base side of the semiconductor substrate base element in contact with the core; otherwise: mounting the at semiconductor subassembly to the core, with the base side of the semiconductor substrate base element in contact with the core.

Abstract: An electronic device includes a first semi-conductor die, a second semi-conductor die and an electrically conductive element. The electrically conductive element includes a first electrically conductive part interposed at least partially between the first semi-conductor die and the second semi-conductor die, wherein said first part is electrically coupled to the first semi-conductor die. The electrically conductive element further includes a second electrically conductive part electrically coupled to the first part, wherein said second part extends from at least part of the first part. The first part is an electrically conductive strap between the dice, and the second part is clip extending from at least part of the strap.

Abstract: A semiconductor arrangement includes a circuit carrier, bonding wire and at least N half bridge circuits. The circuit carrier includes a first metallization layer, a second metallization layer, an intermediate metallization layer arranged between the first metallization layer and the second metallization layer, a first insulation layer arranged between the intermediate metallization layer and the second metallization layer, and a second insulation layer arranged between the first metallization layer and the intermediate metallization layer. Each half bridge circuit includes a controllable first semiconductor switch and a controllable second semiconductor switch. The first semiconductor switch and the second semiconductor switch of each half bridge circuit are arranged on that side of the first metallization layer of the circuit carrier facing away from the second insulation layer. The bonding wire is directly bonded to the intermediate metallization layer of the circuit carrier at a first bonding location.

Abstract: A process for forming a heat sink on a semiconductor package at the wafer level stage of manufacture is disclosed. A semiconductor component wafer, prior to separation into separate component packages, is covered on one side with a resin metal foil layer. The resin foil layer is patterned by laser ablation to define the heat sink locations, and then a thermal paste is applied over the patterned layer. The thermal conductive past is hardened to form the heat sinks. The wafer can then be separated into packages.

Abstract: A semiconductor package which is allocated between a wiring board and a cooling member, the semiconductor package, includes: a package board; a heating element which is mounted on the package board; a chip part which is mounted on the package board and provided around the heating element; and a heat transfer element having a main body unit which is jointed to the heating element with a metal joint material and a leg part which extends from the main body part to the package board and of which a tip is attached to the package board, and wherein the leg part, comprising: a first leg part allocated in a corner of the package board; and a second leg part which is allocated inside the first leg part between the heating element and the chip part on the package board.

Abstract: A semiconductor package includes a first semiconductor chip having a first surface and a second surface which faces away from the first surface, a heat dissipation member, defined with a cavity, disposed on the first surface of the first semiconductor chip and having a plurality of metal pillars which contact the first semiconductor chip, and one or more second semiconductor chips stacked on the first surface of the first semiconductor chip in the cavity to be electrically connected with one another and with the first semiconductor chip.

Abstract: Embodiments of a microelectronic package are generally described herein. A microelectronic package may include a die having a first side and a second side, opposite the first side, a flange coupled to the first side of the die, and a lead frame proximately positioned relative to the die and coupled to the second side of the die. Other embodiments may be described and claimed.

Abstract: Flip chip packages having warpage control and methods for fabricating such packages are described. In one embodiment, the flip chip package comprises a package substrate; a chip coupled to the package substrate; and a ring structure coupled to the package substrate and positioned laterally around the periphery of the chip so that a surface of the chip is exposed, wherein the ring structure comprises one or more compressive members, each of the one or more compressive members compressively opposed to a surface of the package substrate to counter or absorb stresses in the package substrate.

Abstract: A heatsink carries a UV-ray light emitting diode. Flow passages for causing circulation of a fluid that cools the UV-ray light emitting diode are opened in the heatsink. Supply ports and discharge ports are opened in a mount surface of a header where supply and discharge of the fluid for cooling purpose to and from the heatsink are performed. A pair of circulation orifices corresponding to the supply port and the discharge port are opened in the contact surface that contacts the mount surface in the heatsink. Recesses are formed around the respective circulation orifices, and an annular sealing member that exhibits rubber elasticity and that is compressed between the heatsink and the header is disposed in each of the recesses.

Abstract: A system for clamping a heat sink that prevents excessive clamping force is provided. The system may include a heat sink, a semiconductor device, a printed circuit board, and a cover. The semiconductor device may be mounted onto the circuit board and attached to the cover. The heat sink may be designed to interface with the semiconductor device to transfer heat away from the semiconductor device and dissipate the heat into the environment. Accordingly, the heat sink may be clamped into a tight mechanical connection with the semiconductor device to minimize thermal resistance between the semiconductor device and the heat sink. To prevent excessive clamping force from damaging the semiconductor device, loading columns may extend between the cover and the heat sink.

Abstract: A semiconductor package includes a radiator plate including a stress alleviation section, a resin sheet arranged on the radiator plate, a pair of bus bars joined to the radiator plate through the resin sheet at positions at which the stress alleviation section is interposed between the bus bars, and a semiconductor device joined to the pair of bus bars by being sandwiched between the bus bars, and energized from outside through the pair of bus bars.

Abstract: A power transistor includes a first terminal, a second terminal and a control terminal. A support layer is formed of a first material having a first bandgap. An active region is formed of a second material having a second bandgap wider than the first bandgap, and is disposed on the support layer. The active region is arranged to form part of a current path between the first and second terminal in a forward mode of operation. The active region includes at least one pn-junction.

Abstract: Semiconductor package structures are provided which are designed to have liquid coolers integrally packaged with first level chip modules. In particular, apparatus for integrally packaging a liquid cooler device within a first level chip package structure include structures in which a liquid cooler device is thermally coupled directly to the back side of an integrated circuit chip flip-chip mounted on flexible chip carrier substrate. The liquid cooler device is mechanically coupled to the package substrate through a metallic stiffener structure that is bonded to the flexible package substrate to provide mechanical rigidity to the flexible package substrate.

Abstract: A semiconductor device includes an enclosure of insulating material having an introduction portion and a discharge portion for an insulating refrigerant and also having an opening, filters mounted on the introduction portion and the discharge portion, respectively, so as to prevent conductive foreign matter from entering the enclosure, a power semiconductor element provided on the outside of the enclosure, a heat sink bonded to the power semiconductor element and extending through the opening and within the enclosure, and an insulator covering the portions of the power semiconductor element and the heat sink lying outside of the enclosure.

Abstract: The semiconductor package includes a dielectric layer, a trace layer, a conductive layer, a die and an underfill layer. The dielectric layer has first side and an opposing dielectric layer second side. Multiple vias extend through the dielectric layer from the dielectric layer first side to the dielectric layer second side. Multiple solder balls are disposed at the dielectric layer second side. Each of the solder balls is electrically coupled to a different one of the vias. The die is electrically coupled to the solder balls. The conductive layer is disposed between the dielectric layer second side and the die. The conductive layer defines a window there through for allowing the solder balls to electrically couple to the vias without contacting the conductive layer, i.e., no physical or electrical contact. The underfill layer is formed between the die and the conductive layer, while the trace layer is formed at the dielectric layer first side.

Abstract: A die package is provided, including a die positioned on and in direct contact with a first heat sink element, and also including a package case and leads made of conductive material, protruding from the package case. The die package further includes a second heat sink element shaped as a spring element, in contact between the die and the leads, and emerging from a side of the package case opposite the first heat sink element.

Abstract: A support structure for use with a semiconductor substrate in thinning, or backgrinding, thereof, as well as during post-thinning processing of the semiconductor substrate includes a portion that extends substantially along and around an outer periphery of the semiconductor substrate to impart the thinned semiconductor substrate with rigidity. The support structure may be configured as a ring or as a member that substantially covers an active surface of the semiconductor substrate and forms a protective structure over each semiconductor device carried by the active surface.

Abstract: A semiconductor module has a housing (2) and a metal base plate (3). A reliable yet easily producible force-transmitting connection between a semiconductor module and an external heat sink is provided by a mechanical pressure-proof counterpart (4) which is incorporated into the housing (2) and forms a firm connection (14) with a pressure-proof connecting element (10) on the base plate side. The connection is provided with a passage opening (12) for fastening the semiconductor module to the heat sink.

Abstract: A mounting structure, in which semiconductor package 1 and heat sink 8 for dissipating heat generated from semiconductor package 1 are mounted on mounting board 3. The rear surface of semiconductor package 1 is bonded to the front surface of mounting board 3 facing the rear surface. Heat sink 8 is brought into contact with the rear surface of semiconductor package 1 via through-ole 5 formed on mounting board 3. Semiconductor package 1 and heat sink 8 are pressed to each other by the elastic force of clip 6.

Abstract: A package and a package assembly for a power device having a high operation voltage and impulse voltage are provided. The package assembly for a power device comprises an assembly wherein the power device is encapsulated and electrically connected to a lead protruding outside the package, and an isolation spacer filling a clearance distance between the package and a heat sink attached to the package.

Abstract: A package structure includes a substrate; a die over and flip bonded on the substrate; a heat sink over the die; and one or more spacer separating the heat sink from the substrate.

Abstract: According to an aspect of the present invention, there is provided an electronic device including: a substrate board; a semiconductor device mounted on the substrate board; a heat sink configured to radiate heat from the semiconductor device; a first conductive portion provided on the substrate board; and a second conductive portion provided on the substrate board, the second conductive portion separated from the first conductive portion by a discharge gap, wherein: the heat sink is electrically connected to the first conductive portion; and the second conductive portion is grounded.

Abstract: A heat dissipation package is provided. Conducting leads of the package are located between two dissipating parts of a heat dissipation carrier to form the heat dissipation package with a structure of heat outside and electricity inside. Consequently, there is no limitation caused by electrical elements surrounding the heat dissipation carrier, so as to enhance the expandability of the heat dissipation carrier and improve the efficiency for heat dissipation of the heat generation element.

Abstract: A power semiconductor module is disclosed, including a plate-type substrate fitted with at least one component, and a base plate provided for dissipating heat from the component via the substrate. In at least one embodiment, a supporting apparatus, which keeps the substrate in thermal contact with the base plate, has a central pressure bolt adjoined by a plurality of stamps which extend in different directions and are intended to contact-connect the substrate, the individual stamps being at non-uniform distances from the substrate in the mechanically unloaded state of the pressure bolt.

Abstract: A power semiconductor module with segmented base plate. One embodiment provides a semiconductor module including a base plate and at least two circuit carriers. The base plate includes at least two base plate segments spaced distant from one another. Each of the circuit carriers includes a ceramic substrate provided with at least a first metallization layer. Each of the circuit carriers is arranged on exactly one of the base plate segments. At least two of the circuit carriers are spaced distant from one another.

Abstract: An apparatus to package a semiconductor chip includes a coil configured to use induction heating to reflow a solder ball of the semiconductor chip. The coil includes a first body, a second body parallel to the first body, a third body extending from the first body to the second body. The first and second bodies are symmetrical with respect to a vertical plane disposed therebetween. The first and second bodies have inclined surfaces facing each other, and the inclined surfaces are distant from each other downward.

Abstract: An integrated circuit package-on-package system includes: providing a base substrate having a central opening; attaching a bottom die below the base substrate partially covering the central opening, the bottom die connected through the central opening to a top surface of the base substrate; attaching a top die above the base substrate partially covering the central opening; attaching external conductive interconnections to a base bottom surface of the base substrate; and molding an encapsulant leaving the external conductive interconnections partially exposed.

Abstract: A semiconductor chip 36 is mounted on a package substrate 30 with its circuit side facing to a board 38. Heat is dissipated from an upper side of the semiconductor chip 36 opposite to the circuit side. A sealing resin 32 seals around the periphery of the semiconductor chip 36 so that the upper side of the semiconductor chip 36 is exposed to atmosphere. A fixing member 34 is buried in the sealing resin 32 so that a hook 40 formed on the tip of the fixing member 34 extends above the upper side of the semiconductor chip 36. A spreader 10 dissipates heat emitted from the semiconductor chip 36. A guiding slot 12 is formed on the side facing to the package substrate 30 of the spreader 10. The hooks 40 of the fixing members 34 are inserted into the guiding slots 12 respectively, and then the spreader 10 is rotated by predetermined angle against the package substrate 30. Then, the hooks 40 travel along the slots 12.

Abstract: A power transistor. One embodiment provides a power transistor having a first terminal, a second terminal and a control terminal. A support layer is formed of a first material having a first bandgap. An active region is formed of a second material having a second bandgap wider than the first bandgap, and is disposed on the support layer. The active region is arranged to form part of a current path between the first and second terminal in a forward mode of operation. The active region includes at least one pn-junction.

Abstract: According to an aspect of the present invention, there is provided an electronic device including: a substrate board; a semiconductor device mounted on the substrate board; a heat sink configured to radiate heat from the semiconductor device; a first conductive portion provided on the substrate board; and a second conductive portion provided on the substrate board, the second conductive portion separated from the first conductive portion by a discharge gap, wherein: the heat sink is electrically connected to the first conductive portion; and the second conductive portion is grounded.

Abstract: In one embodiment, a method comprises coupling a coreless substrate panel to a pressure cover plate of a carrier, applying flux to the coreless substrate panel, placing at least one die on the coreless substrate panel, reflowing solder onto the coreless substrate panel, defluxing the coreless substrate panel, underfilling the coreless substrate panel, and attaching at least one heat spreader to the coreless substrate panel.

Abstract: Standard solderless connectors extend from a molded package body supporting at least one high power LED. The package includes a relatively large metal slug extending completely through the package. The LED is mounted over the top surface of the metal slug with an electrically insulating ceramic submount in-between the LED and metal slug. Electrodes on the submount are connected to the package connectors. Solderless clamping means, such as screw openings, are provided on the package for firmly clamping the package on a thermally conductive mounting board. The slug in the package thermally contacts the board to sink heat away from the LED. Fiducial structures (e,g., holes) in the package precisely position the package on corresponding fiducial structures on the board. Other packages are described that do not use a molded body.

Abstract: A microelectronic package is provided that includes a microelectronic device and a cover. The device and the cover are typically substantially immobilized relative to each other. The cover typically has a higher coefficient of thermal expansion while the device has a higher effective stiffness. The package may be formed in wafer-level processes.

Abstract: A tightly packed three-dimensional electronic system or subsystem comprising multiple stacks of semiconductor elements is described. The system is repairable because the elements connect together using re-workable flip chip connectors; each flip chip connector comprises a conductive spring element on one side and a corresponding well filled with solder on the other side. The spring elements relieve stresses at the interfaces and allow the component stacks to remain flat; they also provide vertical compliance for easing assembly of elements that have been imperfectly thinned or planarized. Semiconductor integration platforms may be used to integrate active and passive devices, multi-layer interconnections, through wafer connections, I/O plugs, and terminals for attachment of other semiconductor elements or cables.

Abstract: An integrated circuit package (50) is provided which comprises a substrate (20), an integrated circuit (12) mounted on the substrate, and a compressive, thermally conductive interposer (52) mounted on the integrated circuit.

Abstract: A hard drive connecting device for a notebook PC is installed in a case of the notebook PC for connecting a main board and a hard drive in the case, which includes a flexible board having at least a first side, at least a second side, and conductive lines for electrically connecting the first side to the second side; a first connector located in the hard drive bay electrically connected to the first side for electrically connecting the hard drive; and a second connector electrically connected to the second side for electrically connecting the main board. The flexible board facilitates electrical connection of the hard drive that allows reduction of both the size of the hard drive and the installation space required for the hard drive, thus facilitating profile miniaturization of notebook PCs.

Abstract: This invention relates to a chip package structure comprising of a chip, multiple leads with inner and outer ends, an exposed chip upper surface, an encapsulated body encloses the peripherals of the chip, and multiple conducting wires used to connect electrically the chip and leads, wherein said leads extends internally to the surfaces on the two sides of the chip, in the mean time, pasting method is used to connect the two side surfaces of the chip to the leads in order to carry the chip, therefore, traditional die pad is replaced, furthermore, the outer ends or lower surfaces of the leads are exposed out of encapsulated body, this is to prevent solder overflow and enhance solder aggregation effect, in the mean time, packaging cost can be saved and easier visual positioning and rework can be obtained from this package structure, leads are used as terminals to be electrically connected to the external; therefore, through the internally extended leads structure, die pad is replaced, and the effects of package

Abstract: In some embodiments, an integrated circuit package includes a substrate and a heat spreader coupled to the substrate by fasteners. Thermal interface material thermally couples the die to the heat spreader. The heat spreader is provided over the die and is attached to the substrate with fasteners rather than a sealant-adhesive. Some examples of suitable fasteners may include rivets, barbed connectors, and gripping clips.

Abstract: In one embodiment, a liquid immersion cooled multichip module is provided which includes a substrate having chips mounted thereon and which is adapted to mount with a printed circuit board. A lid is adapted to secure to the printed circuit board so as to mount with the substrate to form a fluid chamber between the lid and the substrate, and to cause the substrate to mate with the printed circuit board. In one embodiment, a cambered bolster plate is located on a side of the printed circuit board opposite the lid and the lid is fastened to the bolster plate to secure the lid to the printed circuit board. A baffle, which may be removable in some embodiments, is located within the lid and directs coolant flow through the fluid chamber.