Abstract: A method for controlling operation of a fan in an information handling system using a single parameter includes measuring a temperature associated with the information handling system, determining an average power load of the information handling system, determining a ratio based on the average power load, a light power load and a heavy power load, calculating a single parameter based on the measured temperature and the ratio, determining an operating fan speed based on the single parameter and signaling a fan to operate at the operating fan speed. The ratio may be difference between the average power load and the light power load divided by a difference between a heavy power load minus the light power load. Determining an operating fan speed may include applying one or more constants to the ratio.

Abstract: A circuit device includes: a plurality of circuit blocks, each circuit block being provided with at least one temperature sensor; and a control circuit controlling the plurality of circuit blocks. Each circuit block performs first feedback control for temperature abnormality detection, based on a temperature detection value of the temperature sensor provided in each circuit block. The control circuit performs second feedback control for temperature abnormality detection to each circuit block of the plurality of circuit blocks, based on the temperature detection value of the temperature sensor.

Abstract: The present invention provides an aerosol generation system comprising: a controller for an inhalation device, the controller including a first power supply, a first connector, and a first processor configured to perform energization control of a heater which is used to heat an aerosol source, and a power supply device including a second power supply, a second connector which is connected to the first connector at the time of charging of the first power supply, and a second processor configured to perform control of power supply from the second power supply to the controller via the second connector, wherein a first voltage applied to a power supply terminal of the first processor and a second voltage applied to a power supply terminal of the second processor are different from each other.

Abstract: A structure includes an electrical device, and an active contact landed on a portion of the electrical device. The active contact includes a first body of a first material. A thermal dissipation pillar is adjacent the active contact and unlanded on but over the portion of the electrical device. The thermal dissipation pillar includes a second body of a second material having a higher thermal conductivity than the first material. The thermal dissipation pillar may be in thermal communication with a wire in a dielectric layer over the active contact and the thermal dissipation pillar. The electrical device can be any integrated circuit device that generates heat.

Abstract: In one example, a semiconductor package comprises a substrate having a top surface and a bottom surface, an electronic device mounted on the top surface of the substrate and coupled to one or more interconnects on the bottom surface of the substrate, a cover over the electronic device, a casing around a periphery of the cover, and an encapsulant between the cover and the casing and the substrate.

Abstract: An electronic device includes a processor, a battery, a charging circuit, a controller, and an arithmetic logic unit. The processor is capable of operating at a preset frequency or a low frequency. The charging circuit is electrically connected to an external power supply and a battery and transmits a disconnection signal and to be powered by the battery when the external power supply and the charging circuit are changed from a connected state to a disconnected state. The controller is configured to transmit a first control signal when the external power supply and the charging circuit are changed from the connected state to the disconnected state. The arithmetic logic unit is configured to transmit a frequency reduction signal to the processor according to the disconnection signal and the first control signal, so that the processor reduces the preset frequency to the low frequency and operates at the low frequency.

Abstract: In one example, a method includes providing a first side of a semiconductor substrate with a plurality of transistors, etching a second side of the substrate, opposite the first side, with a pattern of trenches, the trenches having a pre-defined depth and width, and providing the etched semiconductor substrate in a package. In one example, the predefined depth and width of the trenches is such so as to increase the surface area of the second side of the substrate by at least 20 percent. In one example, the method also includes providing a layer of a thermal interface material (TIM) on the second side of the substrate, including to fill at least a portion of the trenches.

Abstract: The present invention provides an aerosol generation system comprising: a controller for an inhalation device, the controller including a first power supply, a first connector, and a first processor configured to perform energization control of a heater which is used to heat an aerosol source, and a power supply device including a second power supply, a second connector which is connected to the first connector at the time of charging of the first power supply, and a second processor configured to perform control of power supply from the second power supply to the controller via the second connector, wherein a first voltage applied to a power supply terminal of the first processor and a second voltage applied to a power supply terminal of the second processor are different from each other.

Abstract: A working temperature calculation method for a storage device of a server is provided. Firstly, n detected temperatures are converted into n transformed temperatures according to a composite temperature algorithm. If all of the n transformed temperatures are lower than a strengthen heat dissipation trigger temperature, the lowest temperature of the n transformed temperatures is set as a working temperature of the storage device. If at least one of the n transformed temperatures is higher than the strengthen heat dissipation trigger temperature, the highest temperature of the n transformed temperatures is set as the working temperature. When the storage device receives a temperature read command from the host, the storage device sends an information about the working temperature to the host, and the host controls a heat dissipation mode of the heat dissipation mechanism according to the working temperature.

Abstract: A computer-implemented method is disclosed that is usable during production of an assembly using at least a first machine tool. The method comprises retrieving a predetermined production plan for the assembly, wherein the predetermined production plan comprises a plurality of operations using the first machine tool; acquiring input data to determine a production deviation from the predetermined production plan; determining, responsive to determining the production deviation, a modified production plan for the assembly by substituting one or more substitute operations for one or more of the plurality of operations of the predetermined production plan; and transmitting instructions to the first machine tool corresponding to the one or more substitute operations of the modified production plan.

Abstract: The present technology relates to a phase-locked loop that allows a reduction in power consumption. A SAR-ADC that includes two capacitors and outputs a result of comparison between voltages generated from the two capacitors, a current source that charges the two capacitors with current, a first switch that is disposed between one of the two capacitors and the current source and is provided with a phase difference between a first clock of a reference frequency and a second clock having a higher frequency than the first clock, and a second switch that is disposed between another of the two capacitors and the current source and is provided with the second clock are included. The present disclosure can be applied, for example, to a wireless communication device.

Abstract: An apparatus comprises: a first circuitry to charge first and second capacitors to a predetermined voltage level; a second circuitry to discharge the first capacitor through a diode at a first time; a third circuitry to discharge the second capacitor through the diode at a second time, wherein the second time is greater than the first time; a comparator to compare a first voltage of the first capacitor with a second voltage of the second capacitor; and logic to adjust a scaling factor applied to the second voltage according to an output of the comparator.

Abstract: An image sensor chip includes an internal voltage generator for generating internal voltages using an external voltage received at a first terminal of the image sensor chip, a temperature sensor for generating a temperature voltage, a selection circuit for outputting one of the external voltage, the internal voltages, and the temperature voltage, a digital code generation circuit for generating a digital code using an output voltage of the selection circuit, and a second terminal for outputting the digital code from the image sensor chip.

Abstract: A system with circuit alteration detection can include a shield in at least one metal layer over an integrated circuit, and a detector coupled to the shield to detect a change in impedance characteristics of one or more shield lines of the shield due to physical alteration of the shield. The shield lines can be arranged in one or more metal layers and cover an area with shape arrangements such as parallel lines and serpentines. The detector can include one or more comparators to detect a difference in impedance of more than a tolerance value. An appropriate countermeasure response can be initiated upon detection of the difference in impedance.

Abstract: A method of controlling on-die termination (ODT) in a multi-rank system including a plurality of memory ranks is provided. The method includes: enabling ODT circuits of the plurality of memory ranks into an initial state when the multi-rank system is powered on; enabling the ODT circuits of a write target memory rank and non-target memory ranks among the plurality of memory ranks during a write operation; and disabling the ODT circuit of a read target memory rank among the plurality of memory ranks while enabling the ODT circuits of non-target memory ranks among the plurality of memory ranks during a read operation.

Abstract: This application is directed to a passively-cooled electronic device including a housing, a plurality of electronic assemblies and a plurality of thermally conductive parts. The electronic assemblies are enclosed in the housing, and include a first electronic assembly and a second electronic assembly. The first and second electronic assemblies are disposed proximately to each other within the housing, and the second electronic assembly is substantially sensitive to heat, including heat generated by operation of the first electronic assembly. The thermally conductive parts are coupled between the first electronic assembly and the housing, and configured to create a first plurality of heat conduction paths to conduct the heat generated by the first electronic assembly away from the second electronic assembly without using a fan. At least a subset of the thermally conductive parts mechanically supports one or both of the first and second electronic assemblies.

Abstract: A method for managing a temperature of a device includes determining a temperature of a circuit or a package including the circuit, and selectively operating a thermoelectric semiconductor based on the determined temperature to adjust the temperature of the circuit or the package.

Abstract: Chip packages with improved tamper resistance and methods of using such chip packages to provide improved tamper resistance. A lead frame includes a die attach paddle, a plurality of outer lead fingers, and a plurality of inner lead fingers located between the outer lead fingers and the die attach paddle. A chip is attached to the die attach paddle. The chip includes a surface having an outer boundary and a plurality of bond pads arranged proximate to the outer boundary. A first plurality of wires extend from the outer lead fingers to respective locations on the surface of the chip that are interior of the outer boundary relative to the bond pads. A tamper detection circuit is coupled with the first plurality of wires. A second plurality of wires extend from the inner lead fingers to the bond pads on the chip. The second plurality of wires are located between the lead frame and the first plurality of wires.

Abstract: The present disclosure provides a current circuit. The current circuit includes a bandgap reference circuit, a plurality of current mirror circuits and a control circuit. The bandgap reference circuit is configured to provide a first current, wherein the first current is based on a reference voltage signal and is independent of temperature. The plurality of current mirror circuits are coupled to the bandgap reference circuit to receive the reference voltage signal, and the current mirror circuits are configured to provide a plurality of mirror currents based on the reference voltage signal provided by the bandgap reference circuit. The control circuit is configured to control a current flow from the plurality of current mirror circuits.

Abstract: A high side current sensing amplifier architecture is simplified and improved over prior art current sensing amplifier circuits by using chopping only, without requiring auto-zeroing, and by using a simpler (and faster) switched capacitor filter instead of an auto-zeroing integrator filter. Also, VIP (positive DC sense node) is merged with the VDDHV (power supply) node, such that the integrated circuit package requires only a single node (package pin) to accommodate both the VIP and VDDHV connections for the current sensing amplifier circuit, resulting in being able to use a smaller integrated circuit package. A small resistor is coupled between VIP and VDDHV to reduce the offset considerably. A low latency time high voltage level shifter is provided which is essential for precise chopping operation.

Abstract: A heat removal element comprises a deformable frame, having a first coefficient of thermal expansion. The frame includes a set of separate cavities formed in the frame, the set including a first cavity and a second cavity; and on one side of the first cavity, a deformable wall adapted to provide mechanical compliance with a heat source for transferring heat away from the heat source. The second cavity comprises a material that fills, at least partly, the second cavity, this material having a second coefficient of thermal expansion that differs from the first coefficient of thermal expansion.

Abstract: A heat dissipation control method is applied to an immersion cooling apparatus for cooling a heat generating member. The immersion cooling apparatus includes a cooling chamber, a fan device, and a pump communicated with the cooling chamber and the fan device for transmitting vapor generated by a cooling solution to the fan device and transmitting the cooling solution to the cooling chamber. The heat generating member is immersed in the cooling solution stored in the cooling chamber. The fan device cools the vapor into liquid. The heat dissipation control method includes utilizing a sensing processor to detect a vapor temperature, the sensing processor preferentially increasing power of the pump when determining the vapor temperature is larger than a maximum of a temperature control range, and the sensing processor preferentially decreasing power of the fan device when determining the vapor temperature is less than a minimum of the temperature control range.

Abstract: The present invention relates to integrated circuits. More specifically, embodiments of the present invention provide methods and systems for determining temperatures of an integrated circuit using an one-point calibration technique, where temperature is determined by a single temperature measurement and calculation using known electrical characteristics of the integrated circuit.

Abstract: A clock generator receives first and second clock signals, and input representing a desired frequency ratio. A comparison is made between frequencies of an output clock signal and the first clock signal, and a first error signal represents the difference between the desired frequency ratio and this comparison result. The first error signal is filtered. A comparison is made between frequencies of the output clock signal and the second clock signal, and a second error signal represents the difference between the filtered first error signal and this comparison result. The second error signal is filtered. A numerically controlled oscillator receives the filtered second error signal and generates an output clock signal. As a result, the output clock signal has the jitter characteristics of the first input clock signal over a useful range of jitter frequencies and the frequency accuracy of the second input clock signal.

Abstract: An electromagnetic radiation (EMR) receiver is located upon a printed circuit board (PCB) glass security layer. EMR flux is transmitted by the glass security layer and received by the EMR receiver. When the PCB is subject to a tamper event the EMR transmitted by glass security layer is increased. A monitoring device that monitors the flux or interference pattern of the EMR received by the EMR receiver detects a change in flux or interference pattern and passes a tamper signal to one or more computer system devices to respond to the tamper event. For example, one or more cryptographic adapter card or computer system functions or secured crypto components may be disabled.

Abstract: A semiconductor device comprises a power device, a sensor which measures a physical state of the power device to transmit a signal according to the physical state, and a main electrode terminal through which a main current of the power device flows. The semiconductor device further comprises a sensor signal terminal connected to the sensor for receiving a signal from the sensor, a driving terminal which receives driving power for driving the power device, and an open bottomed case which houses the power device, the sensor, the main electrode terminal, the sensor signal terminal and the driving terminal. The first and second terminals electrically conduct with each other to form a double structure. Also, the sensor signal terminal and the driving terminal each have a first terminal and a second terminal which are not embedded within the case.

Abstract: Disclosed is a managing device for cooling an inverter. The managing device for cooling an inverter includes a fan controller configured to provide an electric current flowing in a cooling fan; and a controller configured to determine whether the current flowing in the cooling fan is out of a preset range, and, when the current is out of the preset range, configured to control the cooling fan with a control voltage different from an operating voltage of the cooling fan.

Abstract: An internal voltage generation circuit may be provided. The internal voltage generation circuit may include a first internal voltage generation circuit configured to provide a reference internal voltage to either an internal voltage control circuit or a node at which an output internal voltage is generated. The internal voltage generation circuit may include a second internal voltage generation circuit configured to change a level of the output internal voltage. The internal voltage generation circuit may include an internal voltage control circuit configured to compare the reference internal voltage with the output internal voltage and control the first and second internal voltage generation circuits to change the level of the output internal voltage according to a comparison.

Abstract: A system for post-silicon leakage characterization is configured to apply a rail voltage to a hardware component; cause the hardware component to operate at a particular frequency; cause a cooling device, coupled to the hardware component, to operate at a cooling capacity; run a workload on the hardware component after applying the rail voltage, causing the hardware component to operate at a particular frequency, and causing the cooling device to operate at a particular cooling capacity; discontinue the workload and clocks of the hardware component after a temperature of the hardware component has reached a steady high point; continuously measure temperature and leakage power of the hardware component after discontinuing the workload until the temperature of the hardware component has reached a steady low point; and adjust a power management procedure for the hardware component based on measured temperature and measured leakage power of the hardware component.

Abstract: A temperature-controlled photodetector sub-system is described. The temperature control element allows the operation of the photodetector at a desired temperature. The temperature control element can be a heater or a cooler. In some cases, the photodetector is a germanium photodetector. In some cases a temperature measuring device is provided. In some cases, a control circuit is used to control the temperature of the germanium photodetector within a temperature range, or at a temperature of interest. An advantage provided by the apparatus described is the operation of the photodetector so that the responsivity of the germanium detector can be held at essentially a constant value.

Abstract: The present invention discloses a control circuit for a gate driver circuit, an operating method thereof and a display device comprising the control circuit, the control circuit includes: a detection circuit, a power supply and a charge pump circuit, wherein, the detection circuit is used to generate a digital control signal corresponding to an ambient temperature based on the ambient temperature of the gate driver circuit, the power supply is used to supply an initial voltage to a pump charge circuit and the pump charge circuit is used to adjust the initial voltage based on the digital control signal to generate a driving voltage, and output the driving voltage to the gate driver circuit. By enabling the driving voltage to be dynamically adjustable, the power consumption of the gate driver circuit is reduced, and the life of the thin film transistor in the gate driver circuit is lengthened.

Abstract: A temperature detection circuit and a temperature measurement circuit capable of detecting and measuring temperatures precisely are disclosed. The temperature detection circuit includes n temperature detectors (n is an integer of 2 or more), each of the temperature detectors being configured to output a detection signal of high level when a temperature of an object reaches a first value, and a temperature determination part configured to determine whether or not the temperature of the object has reached a second value based on a count of high-level detection signals.

Abstract: According to one embodiment, a semiconductor device includes: an integrated circuit that has a plurality of power consumption modes different in power consumption; a temperature detection circuit that detects temperature of the integrated circuit; a counter that measures time taken for temperature change in the integrated circuit; and a state machine that causes a state transition to take place in the integrated circuit based on the temperature detected by the temperature detection circuit and the time measured by the counter, wherein the integrated circuit selects the power consumption mode based on the state subjected to transition by the state machine.

Abstract: This image pickup element unit is provided with: an image pickup element substrate having mounted thereon an image pickup element that converts inputted light into electric signals; and a temperature adjusting member for adjusting the temperature of the image pickup element. The image pickup element unit is configured such that: the temperature adjusting member is configured to have a recessed section, and include a left-side member, a right-side member, an upper-side member, a lower-side member, and a rear-side member of the recessed section; the image pickup element is disposed to be surrounded by the left-side member, the right-side member, the upper-side member, the lower-side member, and the rear-side member; and the image pickup element unit is attached to the image pickup element substrate by having the rear-side member therebetween.

Abstract: Methods, systems, and computer program products for initializing one or more components of a system, the system comprising an integrated circuit that comprises at least one processor, are disclosed. A method includes initializing at least one component of the system, determining a temperature of the integrated circuit using a temperature sensing device embedded on the integrated circuit, comparing the determined temperature to a predetermined suitable temperature operating range of at least one additional component to yield a comparison result, and initializing the at least one additional component based on the comparison result. The at least one additional component may be initialized on the condition that the determined temperature of the integrated circuit is within the predetermined suitable temperature operating range of the at least one additional component.

Abstract: Methods and devices configured to provide selective heat transfer of a temperature-sensitive circuit are provided. In an example, a device comprises a thinned base substrate including an integrated circuit (e.g., back side illuminated (BSI) image sensor comprising a detector array area and a peripheral circuitry area). The device also comprises a supporting substrate comprising one or more thermoelectric structures. The supporting substrate may be coupled to the base substrate such that the one or more thermoelectric structures are aligned with the detector array area, and the thermoelectric structures may be configured to transfer heat away from the detector array area, while a reduced cross-section of a thinned base substrate may be configured to substantially reduce lateral heat flow across the base substrate and enable selective heat transfer.

Abstract: Method of manufacturing sinterable electrical components for jointly sintering with active components, the components in planar shape being provided with at least one planar lower face meant for sintering, and an electrical contact area on the face opposite to the sintering face being available in the form of a metallic contact face, whose upper side is contactable by means of a commonly known method of the group: wire bonding or soldering or sintering or pressure contacting, the component being a temperature sensor, whose lower face is provided with a sinterable metallization on a ceramic body, said ceramic body having two electrical contact faces for continued electrical connection.

Abstract: A method of forming an on-chip heat sink includes forming a device on a substrate. The method also includes forming a plurality of insulator layers over the device. The method further includes forming a heat sink in at least one of the plurality of insulator layers and proximate to the device. The heat sink includes a reservoir of phase change material having a melting point temperature that is less than an upper limit of a design operating temperature of the chip.

Abstract: An object is to provide a light-emitting module in which a light-emitting element suffering a short-circuit failure does not cause wasteful electric power consumption. Another object is to provide a light-emitting panel in which a light-emitting element suffering a short-circuit failure does not allow the reliability of an adjacent light-emitting element to lower. Focusing on heat generated by a light-emitting element suffering a short-circuit failure, provided is a structure in which electric power is supplied to a light-emitting element through a positive temperature coefficient thermistor (PTC thermistor) thermally coupled with the light-emitting element.

Abstract: A stacked semiconductor apparatus and method of fabricating same are disclosed. The apparatus includes upper and lower semiconductor devices having a similar pattern of connection elements. When stacked connected the resulting plurality of semiconductor devices includes a serial connection path traversing the stack, and may also include parallel connection paths, back-side mounted large components, and vertical thermal conduits.

Abstract: A semiconductor package includes a substrate, a ground circuit supported by the substrate, at least one semiconductor chip disposed on the substrate and a carbon-containing heat-dissipating part disposed on the substrate and electrically connected to the ground circuit. The heat-dissipating part may include carbon fibers and/or carbon cloth.

Abstract: Some embodiments have a semiconductor chip supported above a substrate, a filler layer encapsulating the semiconductor chip, a heat sink; and through contacts extending upwardly from the substrate nearly to an upper surface of the filler layer. In some embodiments of electronic packages, the through contacts separated from the heat sink by a trench cut into the upper surface of the filler layer, the through contacts intersecting one wall of the trench and the heat sink intersecting the other wall of the trench an electronic semiconductor package. A method of forming the package and a lead frame are also disclosed.

Abstract: There is provided a semiconductor device such that it is possible to average the temperatures of a plurality of semiconductor chips simply by providing gate resistors. The semiconductor device includes a semiconductor module wherein a plurality of circuit substrates on which are mounted one or more semiconductor chips having a gate terminal and a gate resistor connected to the gate terminal are disposed in parallel, wherein the disposition distance of the gate resistor from the semiconductor chip is set based on the temperature of the semiconductor chip.

Abstract: The invention relates to an electronic module and to a method for producing same, comprising a mold body (2), a first circuit carrier (3; 13) having a first inner face (3a; 13a), on which electronic components (5) are arranged, and a first outer face (3b; 13b), a second circuit carrier (4; 14) having a second inner face (4a; 14a), on which electronic components (5) are arranged, and a second outer face (4b; 14b), and at least one spring device (6, 7; 16) which connects the inner faces (3a, 14a; 13a, 14a), or surfaces of electronic components (5) arranged thereon, of the first and second circuit carriers (3, 4; 13, 14), wherein the first and second outer faces (3a, 4a; 13a, 14a) are exposed towards the outside of the electronic module in order to emit heat directly to the outside, and wherein the first and second outer faces (3a, 4a; 13a, 14a) are parallel to each other.

Abstract: A semiconductor device includes a semiconductor chip joined with a substrate and a base plate joined with the substrate. The base plate includes a first metal layer clad to a second metal layer. The second metal layer is deformed to provide a pin-fin or fin cooling structure. The second metal layer has a sub-layer that has no pins and no pin-fins. The first metal layer has a first thickness and the sub-layer has a second thickness. The ratio between the first thickness and the second thickness is at least 4:1.

Abstract: The mechanisms for forming metal bumps to connect to a cooling device (or a heat sink) described herein enable substrates with devices to dissipate heat generated more efficiently. In addition, the metal bumps allow customization of bump designs to meet the needs of different chips. Further, the usage of metal bumps between the semiconductor chip and cooling device enables advanced cooling by passing a cooling fluid between the bumps.

Abstract: Integrated circuit (IC) packages with an inter-die thermal spreader are disclosed. A disclosed IC package includes a plurality of stacked dies disposed on a package substrate. A heat spreader is disposed on a top die of the plurality of stacked dies. The IC package further includes a thermal spreader layer disposed adjacent to at least one die of the plurality of stacked dies. The thermal spreader layer may extend out of a periphery of the plurality of stacked dies and may be attached to the heat spreader through a support member.

Abstract: The invention is directed to apparatus and chips comprising a large scale chemical field effect transistor arrays that include an array of sample-retaining regions capable of retaining a chemical or biological sample from a sample fluid for analysis. In one aspect such transistor arrays have a pitch of 10 ?m or less and each sample-retaining region is positioned on at least one chemical field effect transistor which is configured to generate at least one output signal related to a characteristic of a chemical or biological sample in such sample-retaining region.

Abstract: The semiconductor package as well as a method for making it and using it is disclosed. The semiconductor package comprises a semiconductor chip having at least one heat-generating semiconductor device and a volumetrically expandable chamber disposed to sealingly surround the semiconductor chip, the volumetrically expandable chamber filled entirely with a non-electrically conductive liquid in contact with the semiconductor device and circulated within the volumetrically expandable chamber at least in part by the generated heat of the at least one semiconductor device to cool the at least one semiconductor device.

Abstract: A heat transfer member is disposed between a semiconductor element and an electrode plate. The heat transfer member comprises a metal portion extending between a first face at the semiconductor element side and a second face at the plate electrode side, and a ceramic portion surrounding the metal portion. An area of the first face is less than an area of the second face in the metal portion.