Abstract: A semiconductor device encompasses a cooler made of ceramics, having a first main face and a second main face, being parallel and opposite to the first main face, defined by two opposite side faces perpendicular to the first and second main faces, a plurality of conductive-pattern layers delineated on the first main face, a semiconductor chip mounted on the first main face via one of the plurality of conductive-pattern layers, and a seal member configured to seal the semiconductor chip.

Abstract: A production method for an electronic material filler includes: a preparation step of preparing a silica particle material produced by a dry method; and a first surface treatment step of performing surface treatment on the silica particle material with a silane compound having a vinyl group, a phenyl group, a phenylamino group, an alkyl group having four or more carbon atoms, a methacryl group, or an epoxy group, to obtain a first surface treatment-processed particle material. After the silica particle material is produced by the dry method, the silica particle material is not brought into contact with liquid water, and has a particle diameter of 100 nm to 600 nm or a specific surface area of 5 m2/g to 35 m2/g.

Abstract: A thermometer-coded Digital to Analog Converter (DAC) is described, whose output is changed with fast speed, and reduced output overshoot or undershoot. The thermometer-coded DAC has selection switches and an up/down counter, with DAC codes separated into higher and lower bits. The lower bits increase up to a maximum code, then decrease. The configuration of resistors in the DAC reduces output spike, especially at the DAC code changing point.

Abstract: Provided is a resin composition for encapsulation used for encapsulating a power semiconductor element formed from SiC, GaN, Ga2O3, or diamond, the resin composition for encapsulation including a thermosetting resin (A) and silica (B), in which the silica (B) includes Fe, the content of Fe is equal to or less than 220 ppm with respect to the total amount of the silica (B), and the resin composition is in a granular form, a tablet form, or a sheet form.

Abstract: An electronic device on a spacecraft that is enclosed by a conformal coating that is transparent and sufficiently conductive to conduct accumulated charge on the electronic device. The coating includes an intrinsic conducting polymer, such as PEDOT:PSS, dissolved, for example, in an organic solvent, and mixed with a polyurethane, such as Arathane™ 5750 or 5753.

Abstract: A curable epoxy resin formulation composition useful as insulation for an electrical apparatus including (a) at least one liquid epoxy resin; (b) at least one liquid cyclic anhydride hardener; (c) at least one thermally conducting and electrically insulating filler, wherein the filler includes an epoxy-silane treated filler; and (d) at least one cure catalyst with no amine hydrogens; wherein the epoxy resin formulation composition upon curing provides a cured product with a requisite balance of electrical, mechanical, and thermal properties such as Tg, tensile strength, dielectric strength, and volume resistivity such that the cured product can be used in applications operated at a temperature of greater than or equal to 120° C.

Abstract: Provided are a thin circuit device with show-through of thin metal wires prevented and a method of manufacturing the circuit device. A circuit device mainly includes: a substrate including a first substrate and second substrates; pads formed respectively on upper surfaces of the second substrates; a semiconductor element fixed on an upper surface of the first substrate; thin metal wires each connecting the semiconductor elements and a corresponding one of the pads; and a sealing resin with which the semiconductor element and the thin metal wires are covered, and which thereby seals the circuit device with the semiconductor element and the thin metal wires disposed therein. Furthermore, filler particles located in the uppermost portion of the sealing resin are covered with a resin material constituting the sealing resin.

Abstract: A semiconductor device is configured that two or more semiconductor elements are stacked and mount on a lead frame, the aforementioned lead frame is electrically joined to the semiconductor element with a wire, and the semiconductor element, the wire and an electric junction are encapsulated with a cured product of an epoxy resin composition for encapsulating semiconductor device, and that the epoxy resin composition for encapsulating semiconductor device contains (A) an epoxy resin; (B) a curing agent; and (C) an inorganic filler, and that the (C) inorganic filler contains particles having particle diameter of equal to or smaller than two-thirds of a thinnest filled thickness at a rate of equal to or higher than 99.9% by mass.

Abstract: An electronic component includes a unit including an electronic device; and an opposite member opposing the electronic device, wherein the unit and the opposite member are bonded together with an adhering member disposed between the unit and the opposite member and having light-cured resin and inorganic particles dispersed in the light-cured resin; and wherein in a particle-diameter distribution of the inorganic particles by volume, a particle diameter having a cumulative value of distribution of 50 is 0.5 ?m or more, and a particle diameter having a cumulative value of distribution of 90% is 5.0 ?m or less.

Abstract: A chipset package structure includes a carrier, a plurality of pinouts, at least one semiconductor package preforms, at least one electromagnetic shielding layer and a protective layer. The pinouts are disposed on the carrier. The semiconductor package preforms is disposed on the second surface of the carrier and electrically connected to the pinouts. The electromagnetic shielding layer is disposed on the semiconductor package preforms and the electromagnetic shielding layer. At least one of the electromagnetic shielding layers comprises a carbon nanotube film structure. The protective layer covers the electromagnetic shielding layer.

Abstract: According to the present invention, an epoxy resin composition for semiconductor encapsulant including (A) an epoxy resin, (B) a curing agent, (C) an inorganic filler, and (D) a compound in which a copolymer of a 1-alkene having 5 to 80 carbon atoms and maleic anhydride is esterified with an alcohol having 5 to 25 carbon atoms in the presence of a compound represented by General Formula (1), wherein R1 in General Formula (1) is selected from the group consisting of an alkyl group having 1 to 5 carbon atoms, a halogenated alkyl group having 1 to 5 carbon atoms, and an aromatic group having 6 to 10 carbon atoms is provided.

Abstract: A sheet of material includes a layer of the insulative thermoplastic material such as PET (poly(ethylene terephthalate)). The sheet is placed down over the wirebonds and a semiconductor die of a substrate assembly so that the sheet contacts the wirebonds and/or the semiconductor die. In one example, the sheet is a preform and the bottom of the sheet includes a layer of tacky adhesive that adheres the sheet to the substrate assembly. The sheet is then heated such that the PET softens and becomes conformal to the wirebonds and the semiconductor die of the upper surface of the substrate assembly. The resulting encapsulated substrate assembly is then encapsulated (for example, by overmolding in an injection molding process) to form a packaged semiconductor device. The conformal PET sheet is embedded within the packaged semiconductor device in such a way that it separates the wirebonds and semiconductor die from another encapsulant.

Abstract: A semiconductor device includes a semiconductor chip, an electrode pad formed on the semiconductor chip, an underlying barrier metal formed on the electrode pad, a solder bump formed on the underlying barrier metal, and an underfill material surrounding the underlying barrier metal and the solder bump. A junction interface of the solder bump with the underlying barrier metal corresponds to an upper surface of the underlying barrier metal, and a portion of the underfill material bonded to a side surface of the solder bump and an end surface of the underlying barrier metal forms a right angle or an obtuse angle.

Abstract: Disclosed is a resin composition for encapsulating a semiconductor containing a curing agent, an epoxy resin (B) and an inorganic filler (C), wherein the curing agent is a phenol resin (A) having a predetermined structure. Also disclosed is a semiconductor device obtained by encapsulating a semiconductor element with a cured product of the resin composition for encapsulating a semiconductor.

Abstract: An insulating member of the invention can include an epoxy resin, a first inorganic filler diffused in the epoxy resin and having an average particle diameter of 1 to 99 nm, and a second inorganic filler diffused in the epoxy resin and having an average particle diameter of 0.1 to 100 ?m. The first and second inorganic fillers can be independent of each other, and can be selected from a group including Al2O3, SiO2, BN, AlN, and Si3N4, and the blending ratios of the first and second inorganic fillers in the insulating member can be 0.1 to 7% by weight and 80 to 95% by weight respectively. A metal base substrate can be formed by forming a metal foil and a metal base on either surface of the insulating member.

Abstract: The present invention relates to an epoxy resin composition for semiconductor encapsulation, including the following components (A) to (E), in which the component (D) is contained in an amount of from 0.1 to 1.

Abstract: In order to easily inject underfill resin and perform molding with reliability, groove sections are formed on a surface of a circuit board such that the ends of the groove sections extend to semiconductor elements. Low-viscosity underfill resin applied dropwise is guided by the groove sections and flows between the circuit board and the semiconductor elements. The underfill resin hardly expands to regions outside the semiconductor elements.

Abstract: An integrated circuit die comprises a device layer comprising a plurality of semiconductor devices; an interconnect layer comprising a plurality of interconnect paths connecting the semiconductor devices and embedded in a dielectric material; and a plurality of hard nanoparticles embedded in the dielectric material of the interconnect layer, the hard nanoparticles having a hardness greater than a hardness of the dielectric material and of a hardness of the interconnect paths.

Abstract: An integrated circuit is attached to a package substrate. The integrated circuit is electrically connected to the package substrate using a plurality of bond wires connected between a plurality of bond posts and a plurality of bond pads. A first plurality of the bond pads are along a first side of the integrated circuit and coupled to a first plurality of the bond posts with a first plurality of the bond wires. A second plurality of the bond pads are along a second side of the integrated circuit and coupled to a second plurality of the bond posts with a second plurality of the bond wires. Mold compound is injected through a plurality of openings in the package substrate. A first opening is between the first plurality of bond posts and the first side. A second opening is between the second plurality of bond posts and the second side.

Abstract: This invention is a semiconductor wafer having an active side and a back side opposite the active side, which back side is coated with a filled, spin-coatable coating, wherein the coating comprises a resin and a spherical filler characterized by an average particle diameter of greater than 2 ?m and a single peak particle size distribution. In another embodiment the invention is a method for producing a spin-coatable, B-stageable coating with a thixotropic index of 1.2 or less. In a third embodiment the invention is a method for producing a coated semiconductor wafer.

Abstract: A semiconductor device includes a substrate, a semiconductor chip, and first and second insulations. The substrate has at least a first region and a second region. The semiconductor chip structure covers the first region. The first insulation covers the second region. The first insulation has a first thermal expansion coefficient approximately equal to that of the semiconductor chip structure. The second insulation covers the semiconductor chip structure and the first insulation so that the semiconductor chip structure and the first insulation are sandwiched between the substrate and the second insulation. The second insulation has a second thermal expansion coefficient approximately equal to that of the substrate.

Abstract: A resin composition for encapsulation, which contains 100 parts by weight of a synthetic resin, 10 to 500 parts by weight of a carbon precursor having a volume resistivity of 102 to 1010 ?·cm, 0 to 60 parts by weight of a conductive filler having a volume resistivity lower than 102 ?·cm and 100 to 1,500 parts by weight of an other inorganic filler.

Abstract: Disclosed is a resin composition for encapsulating a semiconductor containing a curing agent, an epoxy resin (B) and an inorganic filler (C), wherein the curing agent is a phenol resin (A) having a predetermined structure. Also disclosed is a semiconductor device obtained by encapsulating a semiconductor element with a cured product of the resin composition for encapsulating a semiconductor.

Abstract: A conductive shield covering a semiconductor integrated circuit prevents electrostatic breakdown of the semiconductor integrated circuit (e.g., malfunction of a circuit and damage to a semiconductor element) due to electrostatic discharge. Further, with use of a pair of insulators between which the semiconductor integrated circuit is sandwiched, a highly reliable semiconductor having resistance can be provided while achieving reduction in the thickness and size. Moreover, also in the manufacturing process, external stress, or defective shapes or deterioration in characteristics resulted from electrostatic discharge are prevented, and thus the semiconductor device can be manufactured with high yield.

Abstract: Disclosed is a resin composition for encapsulating a semiconductor including a phenol resin (A) having one or more components containing a component (A1) composed of a polymer having a first structural unit and a second structural unit, an epoxy resin (B), and an inorganic filler (C). Also disclosed is a semiconductor device obtained by encapsulating a semiconductor element with a cured product of the resin composition for encapsulating a semiconductor.

Abstract: The invention is aimed at providing a liquid resin composition capable of densely containing a filler and of filling up a narrow gap in a flip-chip-bonded semiconductor device, and a highly-reliable semiconductor device using the same. The liquid resin composition of the present invention contains (A) an epoxy resin; (B) an epoxy resin curing agent; and (C) a filler, wherein content of (C) the filler is 60% by weight or more and 80% by weight or less of the whole liquid resin composition, and contact angle (?) of the liquid resin composition, measured at 110° C. in accordance with JIS R3257, is 30° or smaller.

Abstract: To provide a semiconductor device which can increase reliability with respect to external force, especially pressing force, while the circuit size or the capacity of memory is maintained. A pair of structure bodies each having a stack of fibrous bodies of an organic compound or an inorganic compound, which includes a plurality of layers, especially three or more layers, is impregnated with an organic resin, and an element layer provided between the pair of structure bodies are included. The element layer and the structure body can be fixed to each other by heating and pressure bonding. Further, a layer for fixing the element layer and the structure body may be provided. Alternatively, the structure body fixed to an element layer can be formed in such a way that after a plurality of fibrous bodies is stacked over the element layer, the fibrous bodies are impregnated with an organic resin.

Abstract: A method for manufacturing a semiconductor device is disclosed. As a part of the method, one surface of a substrate is molded with resin where the substrate and the resin are heated in a first heating process and maintained in a flat condition. The substrate and the resin are returned to room temperature while being maintained in the flat condition after the first heating process. The resin is cut after the substrate and the resin are returned to room temperature from a surface of the resin that is opposite the surface of the resin where the substrate contacts the resin. The substrate is left intact when the resin is cut. Thereafter, the substrate is separated.

Abstract: An exemplary light emitting diode (LED) includes an LED chip and a transparent sealant covering the LED chip. The sealant contains transparent filling particles and phosphor particles, wherein the filling particles are adjacent each other. Intervals are defined between the filling particles, and the phosphor particles are located in the intervals.

Abstract: Applications of smart polymer composites to integrated circuit packaging.

Abstract: A resin composition for semiconductor encapsulation having good moldability, of which the cured product has effective electromagnetic wave shieldability, is provided. A resin composition for semiconductor encapsulation, containing spherical sintered ferrite particles having the following properties (a) to (c) : (a) the soluble ion content of the particles is at most 5 ppm; (b) the mean particle size of the particles is from 10 to 50 ?m; (c) the crystal structure of the particles by X-ray diffractiometry is a spinel structure.

Abstract: This invention is a semiconductor wafer having an active side and a back side opposite the active side, which back side is coated with a filled, spin-coatable coating, wherein the coating comprises a resin and a spherical filler characterized by an average particle diameter of greater than 2 ?m and a single peak particle size distribution. In another embodiment the invention is a method for producing a spin-coatable, B-stageable coating with a thixotropic index of 1.2 or less. In a third embodiment the invention is a method for producing a coated semiconductor wafer.

Abstract: A flip-chip type semiconductor device includes a semiconductor substrate. A plurality of electrode terminals are provided and arranged on a top surface of the semiconductor substrate, a sealing resin layer is formed on the top surface of the semiconductor substrate such that the electrode terminals are completely covered with the sealing resin layer.

Abstract: A semiconductor device is made by forming solder bumps on a first side of a semiconductor wafer. A protective layer is formed on a second side of the semiconductor wafer opposite the first side. The protective layer can be adhesive paste, laminated film, spin-coated resin, epoxy based elastomer, organic rubbery material, polystyrene, polyethylene terephthalate, or other polymer material. The semiconductor wafer is singulated into semiconductor die. The semiconductor die is mounted to a carrier. A molding compound is formed around the semiconductor die. The protective layer provides stress relief for the semiconductor die. The protective layer is removed from the semiconductor die. The protective layer can provide a thermal dissipation, in which case it is made with metal or polymer-based material with a filler such as alumina, zinc oxide, silicon dioxide, silver, aluminum, and aluminum nitride.

Abstract: An ultra-thin semiconductor chip of an FeRAM, which is miniaturized and highly integrated with characteristic degradation of a ferroelectric capacitor suppressed though a thin package structure is applied to the FeRAM is realized. The semiconductor chip is molded up by using a sealing resin with a filler content set at a value in a range of 90 weight % to 93 weight % to produce a package structure.

Abstract: The wire bond structure of sophisticated metallization systems, for instance based on copper, may be provided without a terminal aluminum layer and without any passivation layers for exposed copper surfaces by providing a fill material after the wire bonding process in order to encapsulate at least the sensitive metal surfaces and a portion of the bond wire. Hence, significant cost reduction, reduced cycle times and a reduction of the required process steps may be accomplished independently from the wire bond materials used. Thus, integrated circuits requiring a sophisticated metallization system may be connected by wire bonding to the corresponding package or carrier substrate with a required degree of reliability based on a corresponding fill material for encapsulating at least the sensitive metal surfaces.

Abstract: A semiconductor component includes a semiconductor chip provided with a passivation layer that covers the topmost interconnect structure of the semiconductor chip whilst leaving contact areas free. The passivation layer is in direct adhesive contact with the plastic housing composition of the semiconductor component. The passivation layer includes a polymer with embedded mineral-ceramic nanoparticles.

Abstract: A high frequency IC package mainly includes a substrate, a bumped chip, and a plurality of conductive fillers where the substrate has a plurality of bump holes penetrating from the top surface to the bottom surface. The active surface of the chip is attached to the top surface of the substrate in a manner that the bumps are inserted into the bump holes respectively. The conductive fillers are formed in the bump holes to electrically connect the bumps to the circuit layer of the substrate. The high frequency IC package has a shorter electrical path and a thinner package thickness.

Abstract: A themosettable material having excellent processability, and which cures to form a thermoset composition having a low coefficient of thermal expansion and a high glass transition temperature includes functionalized nanoscopic silica particles dispersed in a curable resin comprising a polyepoxide having at least three epoxide groups per molecule. The composition is useful as an underfill for flip-chip circuit assemblies.

Abstract: The object of the present invention is to provide an epoxy resin composition which is excellent in flash characteristics and thermal conductivity, and gives an area mounting type semiconductor apparatus having little warpage and excellent temperature cycle properties. According to the present invention, there is provided an epoxy resin composition for semiconductor encapsulation which comprises, as essential components, (A) a spherical alumina, (B) an ultrafine silica having a specific surface area of 120-280 m2/g, (C) a silicone compound, (D) an epoxy resin, (E) a phenolic resin as a curing agent, and (F) a curing accelerator, in which said ultrafine silica is contained in an amount of 0.2-0.8% by weight based on the total weight of the resin composition, and said silicone compound is a polyorganosiloxane and is contained in an amount of 0.3-2.0% by weight based on the total weight of the resin composition.

Abstract: An embodiment of a semiconductor device includes a supporting member, a semiconductor die mounted on a portion of the supporting member, a buffer region, and a plastic encapsulation. The buffer region covers a portion of the die, and includes a resin and filler particles packed within the resin. The filler particles have a mix of filler sizes and are tightly packed within the resin. The buffer region has a first dielectric constant and a first loss tangent. The plastic encapsulation encloses at least part of the supporting member and the die. The plastic encapsulation includes a plastic material of a second dielectric constant and a second loss tangent, where the second dielectric constant is larger than the first dielectric constant and the second loss tangent is larger than the first loss tangent.

Abstract: To provide a semiconductor device which can increase reliability with respect to external force, especially pressing force, while the circuit size or the capacity of memory is maintained. A pair of structure bodies each having a stack of fibrous bodies of an organic compound or an inorganic compound, which includes a plurality of layers, especially three or more layers, is impregnated with an organic resin, and an element layer provided between the pair of structure bodies are included. The element layer and the structure body can be fixed to each other by heating and pressure bonding. Further, a layer for fixing the element layer and the structure body may be provided. Alternatively, the structure body fixed to an element layer can be formed in such a way that after a plurality of fibrous bodies is stacked over the element layer, the fibrous bodies are impregnated with an organic resin.

Abstract: A semiconductor device with a semiconductor chip and electrical connecting elements to a conductor structure and a method for producing the same is disclosed. In one embodiment, the conductor structure has a chip island and contact terminal areas. These are arranged in a coplanar manner in relation to each other. The semi-conductor structure is selectively coated by a filled plastic film. Both the semiconductor chip and the electrical connecting elements are mechanically fixed and electrically connected by means of the film-covered chip island and the film-covered contact terminal areas, respectively.

Abstract: In an epoxy resin composition comprising (A) an epoxy resin, (B) a curing agent, (C) an inorganic compound, and (D) an inorganic filler, the inorganic compound (C) is an oxide of metal elements at least one of which is a metal element of Group II in the Periodic Table having a second ionization potential of up to 20 eV, typically Zn2SiO4, ZnCrO4, ZnFeO4 or ZnMoO4. When used for semiconductor encapsulation, the epoxy resin composition is highly reliable and cures into a product which is effective for minimizing electrical failure such as defective insulation due to a copper migration phenomenon.

Abstract: An encapsulating epoxy resin molding material, comprising (A) an epoxy resin, (B) a curing agent, and (C) an inorganic filler, wherein the inorganic filler (C) has an average particle size of 12 ?m or less and a specific surface area of 3.0 m2/g or more.

Abstract: An epoxy resin composition for semiconductor encapsulation which does not contain conductive foreign metallic particles having such a size that they cannot be detected and eliminated by the conventional method for eliminating conductive foreign metallic particles. The epoxy resin composition for semiconductor encapsulation comprises the following components (A) to (D). Conductive foreign metallic particles having a size of 20 ?M or more are substantially not contained in the aforementioned epoxy resin composition. (A) An epoxy resin. (B) A phenol resin. (C) A hardening accelerator. (D) An inorganic filler.

Abstract: In one embodiment, a semiconductor package is formed by adding a layer of particles to desired portions of a packing substrate. The layer of particles forms a matrix of crevices that provides a micro-lock feature for mechanically locking or engaging encapsulating materials.

Abstract: An epoxy resin composition for encapsulating a semiconductor device is provided. This composition contains the following components (A), (C), (D), (E), (F) and (G) as critical components: (A) an epoxy resin; (C) an inorganic filler; (D) a curing accelerator of the general formula (1): (E) a radical initiator; (F) a compound having at least two maleimide group per molecule; and (G) a phenol compound having at least one alkenyl group per molecule.

Abstract: Improved encapsulated, overmolded and/or underfilled electrical components having a complete encapsulation, overmolding and/or underfilling with a coefficient of thermal expansion that is uniform and substantially free of gradients includes a polymeric matrix and an inorganic filler having a platelet geometric structure. The platelet structure of the filler allows a desirable coefficient of thermal expansion to be achieved using a very low level of filler material. This low level of filler material facilitates lower viscosity during forming of the encapsulation and/or overmolding, thereby facilitating complete filling of a mold cavity and underfilling of space between a circuit board and a semi-conductor chip electrically connected to the circuit board. In addition, the low viscosity has processing advantages that reduce the potential for damage to electrical components during encapsulation, overmolding and/or underfilling.

Abstract: A system for underfilling in a chip package includes an underfill mixture that ameliorates the CTE mismatch that typically exists between a packaged die and a resin-impregnated fiberglass mounting substrate. In one embodiment, the system includes an underfill mixture that comprises a principal underfill composition of a rigid octaaminophenyl silsesquioxane (OAPS) that is used as a curing agent for a tetrafunctional, low viscosity, and relatively rigid TGMX epoxy resin. An embodiment is also directed to the assembly of a flip chip package that uses the underfill mixture.