Abstract: A semiconductor packaging container allowing to use in millimeter band is provided at a low cost. The inner SIG pads and the inner GND pads, capable of a direct connection with a signal terminal of a semiconductor chip 10 are provided on the bottomed cylindrical dielectric case formed of the liquid crystal polymer. Further, the external SIG pads integrally formed with the inner SIG pads 201, 202 and the external GND pad 303 integrally formed with the inner GND pad are provided on the back of the bottom surface of the dielectric case as the external terminal. The inner GND pads and are to form the coplanar waveguide with the inner SIG pads and. Also, the inner GND pads and are to add capacitive reactance for canceling the inductance caused by the space at the semiconductor chip portion to the coplanar waveguide.

Abstract: Integrated circuit structures and methods are provided. According to an embodiment, a circuit structure includes a die and an anisotropic conducting film (ACF). The die comprises a through via, and the through via protrudes from a surface of the die. A cross-sectional area of the through via in the surface of the die is equal to a cross-sectional area of a protruding portion of the through via in a plane parallel to the surface of the die. The ACF adjoins the surface of the die, and the protruding portion of the through via penetrates the ACF.

Abstract: Various embodiments of the present invention relates to systems, devices and methods of detecting tampering and preventing unauthorized access by incorporating programmability and randomness into a process of coupling, driving and sensing conductive wires that are arranged above sensitive areas in a secured system. Such a tampering detection system comprises a security mesh network, a random number generator, a security controller and a security monitor. The security mesh network includes a plurality of security elements made from the conductive wires. The security controller selects a subset of security elements, forms a security array, and generates a driving stimulus. The security monitor selects a SENSE node, monitors an output at the SENSE node, and generates a flag signal indicating the presence of a tampering attempt. Programmability and randomness are introduced to at least one of the system parameters including array configuration, driving stimulus, SENSE node, and detection mode via random numbers.

Abstract: A power semiconductor arrangement includes a base plate having a molybdenum layer, and a power semiconductor device mounted to a top side of the base plate and electrically and thermally coupled thereto. The base plate includes a metallic mounting base, which is arranged between the semiconductor device and the molybdenum layer and prevents the molybdenum layer from forming highly resistive intermetallic phases with the semiconductor device. A semiconductor module, such as a power semiconductor module, includes multiple semiconductor arrangements, whereby the base plate of the semiconductor arrangements is a common base plate. A module assembly, such as a power semiconductor module assembly, includes multiple semiconductor modules, whereby the semiconductor modules are arranged side by side to each other with electric connections between adjacent semiconductor modules.

Abstract: A sample liquid supply container is disclosed. The sample liquid supply container includes a first region which is depressurized therein and is hermetically sealed, a second region which is able to receive a liquid therein, a first penetration portion, in which an interior of the first region is punctured by a hollow needle from outside, and a second penetration portion, in which an interior of the second region is punctured by the hollow needle inserted into the first penetration portion and reaches inside the first region.

Abstract: Methods for fabricating an alignment mark are disclosed. A method includes forming a base layer that includes a first material and forming an alignment mark layer above the base layer that includes a second material that is optically mismatched with the first material. The alignment mark is formed using both first and second layers.

Abstract: Packaged integrated devices and methods of forming the same are provided. In one embodiment, a packaged integrated device includes a package substrate, a package lid, and an integrated circuit or microelectromechanical systems (MEMS) device. The package lid is mounted to a first surface of the package substrate using an epoxy, and the package lid and the package substrate define a package interior. The package lid includes an interior coating suited to good adhesion with the epoxy, and an exterior coating suited to RF shielding, where the materials of the interior and exterior coatings are different. In one example, the interior lid coating is nickel whereas the exterior lid coating is tin.

Abstract: An electronic device according to the invention includes: a substrate; an MEMS structure formed above the substrate; and a covering structure defining a cavity in which the MEMS structure is arranged, wherein the covering structure has a first covering layer covering from above the cavity and having a through-hole in communication with the cavity and a second covering layer formed above the first covering layer and closing the through-hole, the first covering layer has a first region located above at least the MEMS structure and a second region located around the first region, the first covering layer is thinner in the first region than in the second region, and a distance between the substrate and the first covering layer in the first region is longer than a distance between the substrate and the first covering layer in the second region.

Abstract: A semiconductor substrate has a plurality of different size recesses formed in the substrate to provide a stepped interposer. A conductive via can be formed through the stepped interposer. An insulating layer follows a contour of the stepped interposer. A conductive layer is formed over the insulating layer following the contour of the stepped interposer. A first semiconductor die is partially disposed in a first recess and electrically connected to the conductive layer. A second semiconductor die is partially disposed in a second recess and electrically connected to the conductive layer. The first semiconductor die is electrically connected to the second semiconductor die through the conductive layer. The first and second semiconductor die can be flipchip type semiconductor die. An encapsulant is deposited over the first and second semiconductor die. A portion of the stepped interposer can be removed to reduce thickness.

Abstract: The waveform signals of ultrasonic waves reflected by a plurality of interfaces in a measurement object are received, the waveform signal of a reflected wave on a reference interface inside the measurement object is detected based on the amplitudes of the received waveform signals, and evaluation is made on the bonded condition of an interface to be measured based on the waveform signal of the reflected wave on the reference interface.

Abstract: With the use of a conductive shield formed on the top or bottom side of a semiconductor integrated circuit, an electrostatic breakdown (malfunctions of the circuit or damages of a semiconductor element) of the semiconductor integrated circuit due to electrostatic discharge is prevented, and sufficient communication capability is obtained. With the use of a pair of insulators which sandwiches the semiconductor integrated circuit, a highly reliable semiconductor device that is reduced in thickness and size and has resistance to an external stress can be provided. A semiconductor device can be manufactured with high yield while defects of shapes and characteristics due to an external stress or electrostatic discharge are prevented in the manufacturing process.

Abstract: A sample liquid supply container is disclosed. The sample liquid supply container includes a first region which is depressurized therein and is hermetically sealed, a second region which is able to receive a liquid therein, a first penetration portion, in which an interior of the first region is punctured by a hollow needle from outside, and a second penetration portion, in which an interior of the second region is punctured by the hollow needle inserted into the first penetration portion and reaches inside the first region.

Abstract: A microelectronic assembly and a method for forming a microelectronic assembly are provided. A semiconductor substrate (22) is provided. The semiconductor substrate (22) has first and second opposing sides (24, 26) and first and second portions (28, 30). A tuning depression (32) is formed on the second opposing side and the second portion of the semiconductor substrate. A radio frequency conductor (34) is formed on the first opposing side (24) of the first semiconductor substrate. The radio frequency conductor (34) has a first end (46) on the first portion (28) of the first semiconductor substrate (22) and a second end (48) on the second portion (30) of the first semiconductor substrate (22). A microelectronic die (78) having an integrated circuit formed therein is attached to the first opposing side (24) and the first portion (28) of the semiconductor substrate (22) such that the integrated circuit is electrically connected to the first end (46) of the radio frequency conductor (34).

Abstract: An integrated circuit includes a substrate including an active area and a gas phase deposited packaging material encapsulating the active area.

Abstract: In a semiconductor element, upper through-hole conductor portions and lower through-hole conductor portions are formed such that pore size A of the joint surface of the upper through-hole conductor portion and the lower through-hole conductor portion is smaller than pore size B of the upper through-hole conductor portion on the major surface of the semiconductor element and pore size C of the lower through-hole conductor portion on the other surface of the semiconductor element. Further, electrode portions are formed respectively on the top surfaces of the upper through-hole conductor portions and protrusions 4 are formed respectively on the top surfaces of the electrode portions. Moreover, an optical member pressed in contact with the protrusions is fixed on the semiconductor element with an adhesive.

Abstract: A method includes burying a conductive pattern in an insulating film made of SiOH, SiCOH or organic polymer, treating surfaces of the insulating film and the conductive pattern with plasma which includes a hydrocarbon gas as a treatment gas, and forming a diffusion barrier film, which is formed of an SiCH film, an SiCHN film, an SiCHO film or an SiCHON film, over the insulating film and the conductive pattern with performing a plasma CVD by adding an Si-containing gas to the treatment gas while increasing an addition amount gradually or in a step by step manner.

Abstract: A package includes: a package body including a substrate, an electronic component mounted on a first surface of the substrate, and a sealing resin layer for sealing the electronic component; and a shield case for covering the sealing resin layer, the shield case being made of metal and having an inverted U-shape in a cross-sectional view, wherein a bent part of the shield case is formed in such a manner that at least a part of an end of the shield case is bent toward a second surface of the substrate opposite to the first surface, and the bent part abuts on the second surface so that the shield case is attached to the substrate.

Abstract: A structure and a method for forming the same. The structure includes (i) a carrier substrate which includes substrate pads, (ii) a chip physically attached to the carrier substrate, and (iii) a first frame physically attached to the carrier substrate. A CTE (coefficient of thermal expansion) of the first frame is substantially lower than a CTE of the carrier substrate.

Abstract: A method of bonding two members includes forming a metal pad on a first member and a silicon pad on the second member, and coupling the pads at a temperature and pressure that will not damage features of the members, such as integrated circuitry or MEMS devices, but is sufficient to form a silicide bond. In various embodiments, the metal may be nickel and the silicon may be polysilicon.

Abstract: The power semiconductor module includes a module package housing power semiconductor devices therein and a magnetic core set around the module package, such that magnetic core surrounds the power semiconductor devices such as IGBTs. Alternatively, the magnetic core is built in the module package such that the outer circumference faces of magnetic core and the side faces of module package form side faces of the power semiconductor module. The power semiconductor module according to the invention facilitates replacing the magnetic core, setting the magnetic core around the module package thereof, reducing the size thereof, simplifying the structure thereof, and easy manufacture thereof.

Abstract: A semiconductor package includes a semiconductor chip having a first region and a second region. Bonding pads are formed and through-holes are defined in the first and second regions. Insulation layers are formed on sidewalls of the through-holes, and through-electrodes formed in the through-holes and connected with corresponding bonding pads. The insulation layers formed in the first and second regions have different thicknesses or dielectric constants.

Abstract: A MEMS device including a getter film formed inside a hermetic chamber provides stable performance of the MEMS device by electrically stabilizing the getter film. The MEMS device includes a movable portion and a fixed portion formed inside the hermetic chamber. The hermetic chamber is formed by a base material of the MEMS device and glass substrates and having a cavity and cavities made therein. A part of any continuous getter film formed inside the hermetic chamber connects to only one of any one or a plurality of predetermined electrical potentials of the fixed portion and a ground potential of the fixed portion through the base material of the MEMS device.

Abstract: A first container member (9, 109, 212) mounting an electronic device (71, 171, 261) thereon and a second container member (2, 102, 202) are bonded with an adhesive (3, 103) or a metal layer (103, 251). Thus an inner space (90, 190, 211) is formed and the electronic device can be closed in the inner space at a low temperature. In the case the adhesive is used, an exposed surface of the adhesive is coated with a metal film (4) to improve the closeness of the inner space. Further, an electronic device (261, 272) may be mounted on the second container member so as to increase the electronic device arrangement density in a packaged electronic device.

Abstract: Light-emitting devices, and related components, processes, systems and methods are disclosed.

Abstract: Apparatus for housing a micromechanical structure, and a method for producing the housing. The apparatus has a substrate having a main side on which the micromechanical structure is formed, a photo-resist material structure surrounding the micromechanical structure to form a cavity together with the substrate between the substrate and the photo-resist material structure, wherein the cavity separates the micromechanical structure and the photo-resist material structure and has an opening, and a closure for closing the opening to close the cavity.

Abstract: An object is to provide a thin and small semiconductor device that has high reliability and high resistance to external stress and electrostatic discharge. Another object is to manufacture a semiconductor device with high yield while shape defects and defective characteristics which are caused by external stress or electrostatic discharge are prevented in the manufacturing process. A conductive shield covering a semiconductor integrated circuit prevents electrostatic breakdown (malfunction of the circuit or damage to a semiconductor element) of the semiconductor integrated circuit due to electrostatic discharge. By providing an antenna on the external side of the conductive shield, a sufficient communication capability is secured. With the use of a pair of insulators which sandwich the semiconductor integrated circuit, a thin and small semiconductor device that has resistance properties and high reliability can be provided.

Abstract: A semiconductor device is disclosed which includes a metal base, a semiconductor chip, a lead, and a sealant. The semiconductor chip has an opposite pair of first and second electrode surfaces and a side surface. The semiconductor chip is fixed on the metal base with the first electrode surface solder-connected to the metal base. The lead is solder-connected to the second electrode surface of the semiconductor chip. The sealant seals, at least, the side surface of the semiconductor chip and solders connecting the metal base, the semiconductor chip, and the lead. Further, the lead has a small-cross-section portion which has a smaller cross-sectional area perpendicular to the longitudinal direction of the lead than other portions of the lead adjacent to the small-cross-section portion.

Abstract: With the use of a conductive shield formed on the top or bottom side of a semiconductor integrated circuit, an electrostatic breakdown (malfunctions of the circuit or damages of a semiconductor element) of the semiconductor integrated circuit due to electrostatic discharge is prevented, and sufficient communication capability is obtained. With the use of a pair of insulators which sandwiches the semiconductor integrated circuit, a highly reliable semiconductor device that is reduced in thickness and size and has resistance to an external stress can be provided. A semiconductor device can be manufactured with high yield while defects of shapes and characteristics due to an external stress or electrostatic discharge are prevented in the manufacturing process.

Abstract: To solve a problem in that an antenna or a circuit including a thin film transistor is damaged due to discharge of electric charge accumulated in an insulator (a problem of electrostatic discharge), a semiconductor device includes a first insulator, a circuit including a thin film transistor provided over the first insulator, an antenna which is provided over the circuit and is electrically connected to the circuit, and a second insulator provided over the antenna, a first conductive film provided between the first insulator and the circuit, and a second conductive film provided between the second insulator and the antenna.

Abstract: Provided is a semiconductor device including a substrate, an electrode pad disposed on the substrate, an external terminal disposed on the electrode pad, a container extended from the electrode pad into the external terminal, and a conductive liquid disposed inside the container. The conductive liquid solidifies when exposed to air. When a crack forms in the external terminal, the container suppresses propagation of the crack. Further, if the crack breaches the container, the conductive liquid fills the crack, thereby minimizing further crack propagation and recovering the resistance characteristics of the external terminal prior to the crack formation. A method of forming a semiconductor device including a container having a conductive liquid is also provided.

Abstract: The invention relates to a miniature microwave component having: a microwave chip (18, 60, 140) encapsulated in an individual package (61) for surface mounting. A metal base (80) mounts the chip in the package via its rear face. The base has an aperture (82). At least two access ports are provided for the communication of electrical signals between the inside and the outside of the package. A contactless microwave access port (62), by electromagnetic coupling at the aperture in the base, ensures transmission of coupling signals at a working frequency F0. A subharmonic access port (110) via a contact, inputs, into the integrated circuit, a subharmonic frequency F0/n of the working frequency F0. The chip includes, among its electrical conductors, a coupling electrical conductor (96) connected to the electronic elements of the chip. The coupling conductor is placed at the contactless microwave access port (62) in order to transmit microwave signals by electromagnetic coupling at the working frequency F0.

Abstract: A semiconductor chip includes a first integrated circuit chip and a depression substrate attached to the integrated circuit chip, wherein the integrated circuit chip and the depression substrate define a cavity therebetween. The semiconductor chip also includes a stress sensitive material located in the cavity and a chemical located in the cavity, wherein detection of tampering causes a reaction by the chemical such that the semiconductor chip is at least partially destroyed.

Abstract: An optical device with a CAN package is disclosed, where the cap is resistance-welded to the stem without causing failures due to fragments by the welding flying within the package. The cap of the invention has a flange portion to be welded to the stem. The flange portion provides a ringed groove in addition to the ringed projection for the welding. The fragment due to the welding may be captured in the ringed groove and is prevented from flying within the package. The ringed groove and the ringed projection are simultaneously formed in the stamping to form the body portion of the cap.

Abstract: In some embodiments, an injection molded metal IC package stiffener and package-to-package interconnect frame is presented. In this regard, an apparatus is introduced comprising a microelectronic device package substrate, a microelectronic device coupled with a top surface of the package substrate, and an injection-molded, metal stiffener coupled with the package substrate, wherein the stiffener includes a central opening and at least partially surrounds the microelectronic device, and wherein the stiffener includes a plurality of vias that each couple a contact on a bottom surface of the stiffener with a respective contact on a top surface of the stiffener. Other embodiments are also disclosed and claimed.

Abstract: The waveform signals of ultrasonic waves reflected by a plurality of interfaces in a measurement object are received, the waveform signal of a reflected wave on a reference interface inside the measurement object is detected based on the amplitudes of the received waveform signals, and evaluation is made on the bonded condition of an interface to be measured based on the waveform signal of the reflected wave on the reference interface.

Abstract: Disclosed are photosensitizers that include a polyol moiety covalently bonded to a fused aromatic moiety. Also disclosed is a method for improving UV laser ablation performance of a coating, such as a cationic UV curable coating, by incorporating an oxalyl-containing additive into the cationic UV curable or other coating. Oxalyl-containing sensitizers having the formula Q-O—C(O)—C(O)—O—R1, wherein Q represents a fused aromatic moiety and R1 is an alkyl or aryl group, are also disclosed, as are oxalyl-containing oxetane resins, oxalyl-containing polyester polyols, and cationic UV curable coating formulations that include oxalyl-containing additives.

Abstract: A metallic cover of a miniaturization module includes a substrate, a SMD chip unit and a metallic cover, the metallic cover embracing the SMD chip unit and having at least one sizing hole and a plurality of venting holes, the venting holes being disposed around the sizing hole, and the sizing hole and the venting holes being positioned above the SMD chip unit so that glue portions fill up slits between the metallic cover and the SMD chip unit. The venting holes stop the glue portion from running over the second chip unit. The glue-filled slits between the top lid and the SMD chip unit provides a strong support to prevent any deformation of the metallic cover when the metallic cover is tested and processed.

Abstract: The semiconductor module mounting structure includes a semiconductor module including therein a semiconductor device and electrodes exposed to both surfaces thereof, a wiring substrate having a mounting surface on which the semiconductor module is mounted, and a heat radiating body for dissipating heat from the semiconductor module. The wiring substrate is formed with a ground wiring such that at least a part of the ground wiring is exposed to a back surface thereof opposite to the mounting surface. The exposed surface of the ground wiring exposed to the back surface is in thermal contact with the heat radiating body. At least one of the electrodes exposed to one of the both surfaces opposed to the wiring substrate is in electrical contact with the ground wiring through a through hole formed in the wiring substrate.

Abstract: A method for making back-to-front electrical connections in a wafer level chip scale packaging process is disclosed. A wafer containing a plurality of semiconductor chips is mounted on a package substrate. Each semiconductor chip in the plurality includes one or more electrodes on an exposed back side. Scribe lines between two or more adjacent chips on the wafer are removed to form relatively wide gaps. A conductive material is applied to the back side of the semiconductor chips and in the gaps. The conductive material in the gaps between two or more of the chips is then cut through leaving conductive material on the back side and on side walls of the two or more chips. As a result, the conductive material provides an electrical connection from the electrode on the back side of the chip to the front side of the chip.

Abstract: Methods, systems, IC packages, and electrical devices for providing data security for ICs. A substrate-on-substrate connector grid array package with an electrical shield can protect sensitive information in a secure IC from being accessed by physical attacks. A current flow in the electrical shield can be monitored for disturbances which can indicate an attack on the IC package.

Abstract: Provided is a three-dimensional aluminum package module including: an aluminum substrate; an aluminum oxide layer formed on the aluminum substrate and having at least one first opening of which sidewalls are perpendicular to an upper surface of the aluminum substrate; a semiconductor device mounted in the first opening using an adhesive; an organic layer covering the aluminum oxide layer and the semiconductor device; and a first interconnection line and a passive device circuit formed on the organic layer and the aluminum oxide layer.

Abstract: A MEMS device including a getter film formed inside a hermetic chamber provides stable performance of the MEMS device by electrically stabilizing the getter film. The MEMS device includes a movable portion and a fixed portion formed inside the hermetic chamber. The hermetic chamber is formed by a base material of the MEMS device and glass substrates and 32 having a cavity and cavities made therein. A part of any continuous getter film formed inside the hermetic chamber connects to only one of any one or a plurality of predetermined electrical potentials of the fixed portion and a ground potential of the fixed portion through the base material of the MEMS device.

Abstract: Devices and methods for their formation, including electronic assemblies having a shape memory material structure, are described. In one embodiment, a device includes a package substrate and an electronic component coupled to the package substrate. The device also includes a shape memory material structure coupled to the package substrate. In one aspect of certain embodiments, the shape memory material structure is formed from a material selected to have a martensite to austenite transition temperature in the range of 50-300 degrees Celsius. In another aspect of certain embodiments, the shape memory material structure is positioned to extend around a periphery of the electronic component. Other embodiments are described and claimed.

Abstract: In order to reduce a thermal stress applied by a metal cap to a semiconductor chip: a semiconductor chip (2) is bonded to a flat portion (11) of a metal cap (1); side wall portions of the metal cap (1) serve as external connection terminals (13); and a slit (7) is formed in the metal cap (1) so as to cross the semiconductor chip (2), so a bonding region between the semiconductor chip (2) and the metal cap (1) is divided into small bonding regions to reduce thermal stresses applied to the respective bonding regions. Therefore, peeling can be prevented in respective bonding regions, whereby a small-size semiconductor device in which the semiconductor chip is bonded to the metal cap with improved bonding reliability is obtained.

Abstract: An integrated circuit includes a substrate including an active area and a gas phase deposited packaging material encapsulating the active area.

Abstract: Electronic devices and methods for fabricating electronic devices are described. One method includes providing a substrate with a die attach area, and forming a layer on the substrate outside of the die attach area. The layer may be formed from a fluoropolymer material. The method also includes coupling a die to the substrate in the die attach area, wherein a gap remains between the die and the die attach area. The method also includes placing an underfill material in the gap and adjacent to the layer on the substrate. Examples of fluoropolymer materials which may be used include polytetrafluoroethylene (PTFE) and perfluoroalkoxy polymer resin (PFA). Other embodiments are described and claimed.

Abstract: A semiconductor device having a CSP packaging structure, which exhibits a reduced thermal stress exerted on a semiconductor chip without deteriorating electrical characteristics, is provided. A semiconductor device comprises an electroconductive cap, functioning as an external coupling terminal and including a metallic member and a composite material; and a semiconductor chip, having a circuit surface constituting an external electrode and a metallized surface opposite to the circuit surface, wherein the metallic member of the electroconductive cap is electrically connected to the metallized surface of the semiconductor chip via an electroconductive junction material, without a presence of the composite material therebetween.

Abstract: A semiconductor package that includes a conductive clip having an interior surface that includes a plurality of spaced raised portions, a semiconductor device having a first major surface that includes a plurality of spaced depressions each receiving one of the raised portions in the interior thereof, and a conductive adhesive disposed between each raised portion and a respective interior surface of a depression.

Abstract: A semiconductor device includes a semiconductor element including a semiconductor substrate having an element region, a laminated film formed on the semiconductor substrate and including a low dielectric constant insulating film, and a laser-machined groove provided to cut at least the low dielectric constant insulating film. The semiconductor element is connected to a wiring substrate via a bump electrode. An underfill material is filled between the semiconductor element and the wiring substrate. The fillet length Y (mm) of the underfill material satisfies a condition of Y>?0.233X+3.5 (where X>0, and Y>0) with respect to the width X (?m) of the laser-machined groove.

Abstract: Paper embedded with a semiconductor device capable of communicating wirelessly is realized, whose unevenness of a portion including the semiconductor device does not stand out and the paper is thin with a thickness of less than or equal to 130 ?m. A semiconductor device is provided with a circuit portion and an antenna, and the circuit portion includes a thin film transistor. The circuit portion and the antenna are separated from a substrate used during manufacturing, and are interposed between a flexible base and a sealing layer and protected. The semiconductor device can be bent, and the thickness of the semiconductor device itself is less than or equal to 30 ?m. The semiconductor device is embedded in a paper in a papermaking process.