Abstract: A readout device includes a plurality of detecting circuits arranged in rows and columns to form a detecting array, and an output module. Each of the detecting circuits includes two transistors for generating a detection signal associated with impedance at a target site. Through selection of the rows and the columns of the detecting circuits, the output module outputs an output voltage signal having a magnitude positively correlated with magnitude of a selected one of the detection signals received from the detecting circuits.
Type:
Grant
Filed:
April 22, 2014
Date of Patent:
November 29, 2016
Assignee:
NATIONAL CHI NAN UNIVERSITY
Inventors:
Tai-Ping Sun, Yi-Chuan Lu, Tsung-Shuo Kao
Abstract: A structural configuration of a failsafe OLED chain with multiple OLED lighting components in series connection is described. During the manufacture of the lighting component a weak spot is specifically installed at an appropriate location of the structure in the form of a break-through layer, which in the event of a failure of the lighting component breaks down and bypasses the component with a bypass layer.
Abstract: A bipolar high voltage/power semiconductor device has a drift region having adjacent its ends regions of different conductivity types respectively. High and low voltage terminals are provided. A first insulated gate terminal and a second insulated gate terminal are also provided. One or more drive circuits provide appropriate voltages to the first and second insulated gate terminals so as to allow current conduction in a first direction or in a second direction that is opposite the first direction.
Type:
Grant
Filed:
July 14, 2006
Date of Patent:
October 20, 2009
Assignee:
Cambridge Semiconductor Limited
Inventors:
Florin Udrea, Nishad Udugampola, Gehan A. J. Amaratunga
Abstract: In one embodiment of the present invention, a semiconductor device has a photodiode over a P-type substrate, an NPN transistor formed over the P-type substrate, an N?-type buried region provided right under the NPN transistor as being buried in the P-type substrate, and a P+-type buried region formed in the N+-type buried region.
Abstract: A matrix of detection pixels and a photoelectric detector that includes a matrix of detection pixels and a reading circuit of loads detected by the detection pixels of the matrix. A detection pixel includes a photosensitive semi-conductor area with a first face covered with a first electrode and a second face located opposite the first face and covered with a second electrode. The first electrode includes a metal pattern that can collect the electrical loads generated by the detection pixel. The matrix can be applied, for example, to the creation of sensors used in scanners and photographic apparatuses or digital cameras or biosensors.