Imager Including Structural Or Functional Details Of The Device (epo) Patents (Class 257/E27.13)

  • Patent number: 9806113
    Abstract: Provided is a complementary metal-oxide-semiconductor (CMOS) image sensor. The CMOS image sensor can include a substrate having a first device isolation layer defining and dividing a first active region and a second active region, a photodiode disposed in the substrate and can be configured to vertically overlap the first device isolation layer, a transfer gate electrode can be disposed in the first active region and can be configured to vertically overlap the photodiode, and a floating diffusion region can be in the first active region. The transfer gate electrode can be buried in the substrate.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: October 31, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Sun Oh, Kyung-Ho Lee, Jung-Chak Ahn, Hee-Geun Jeong
  • Patent number: 9647016
    Abstract: Provided is a complementary metal-oxide-semiconductor (CMOS) image sensor. The CMOS image sensor can include a substrate having a first device isolation layer defining and dividing a first active region and a second active region, a photodiode disposed in the substrate and can be configured to vertically overlap the first device isolation layer, a transfer gate electrode can be disposed in the first active region and can be configured to vertically overlap the photodiode, and a floating diffusion region can be in the first active region. The transfer gate electrode can be buried in the substrate.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: May 9, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Sun Oh, Kyung-Ho Lee, Jung-Chak Ahn, Hee-Geun Jeong
  • Patent number: 9478676
    Abstract: A light sensing device includes a substrate, a plurality of light sensing elements and a cover. The plurality of light sensing elements are disposed on the substrate for sensing light. The cover is utilized for sheltering the plurality of light sensing elements, wherein the cover includes a hole for passing the light. A set of the plurality of light sensing elements is selected to be enabled according to a location of the hole relative to the plurality of light sensing elements.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: October 25, 2016
    Assignee: SensorTek technology Corp.
    Inventors: Meng-Yong Lin, Feng-Jung Hsu, Ming-Huang Liu
  • Patent number: 9041133
    Abstract: A microelectronic image sensor assembly for backside illumination and method of making same are provided. The assembly includes a microelectronic element having contacts exposed at a front face and light sensing elements arranged to receive light of different wavelengths through a rear face. A semiconductor region has an opening overlying at least one of first and second light sensing elements, the semiconductor region having a first thickness between the first light sensing element and the rear face and a second thickness between the second light sensing element and the rear face. A light-absorbing material overlies the semiconductor region within the opening above at least one of the light sensing elements such that the first and second light sensing elements receive light of substantially the same intensity.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: May 26, 2015
    Assignee: NAN CHANG O-FILM OPTOELECTRONICS TECHNOLOGY LTD
    Inventors: Vage Oganesian, Belgacem Haba, Ilyas Mohammed, Piyush Savalia, Craig Mitchell
  • Patent number: 9024401
    Abstract: The finding that with a reasonable effort a layer thickness and/or refractive index variation may be acquired which realizes different internal optical path lengths for impinging radiation whereby fluctuation of spectral sensitivity of the photodetector is reduced is used to provide image sensors with a less fluctuating spectral sensitivity with respect to different wavelengths, or photodetectors with a small fluctuation of the spectral sensitivity from photodetector to photodetector with respect to defined wavelengths, with a reasonable effort.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: May 5, 2015
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Frank Hochschulz, Stefan Dreiner, Uwe Paschen, Holger Vogt
  • Patent number: 9006852
    Abstract: Disclosed herein is a solid-state imaging element including: a transfer section configured to transfer charge generated simultaneously by a photoelectric conversion section in all pixels to a memory section and have a metal gate; and a light-shielding section formed by filling a metal into a groove portion formed by digging an interlayer insulating film around the transfer section.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: April 14, 2015
    Assignee: Sony Corporation
    Inventor: Shinichi Arakawa
  • Patent number: 8987751
    Abstract: According to example embodiments, a photodiode system may include a substrate, and at least one photodiode in the substrate, and a wideband gap material layer on a first surface of the substrate. The at least one photodiode may be between an insulating material in a horizontal plane. According to example embodiments, a back-side-illumination (BSI) CMOS image sensor and/or a solar cell may include a photodiode device. The photodiode device may include a substrate, at least one photodiode in the substrate, a wide bandgap material layer on a first surface of the substrate, and an anti-reflective layer (ARL) on the wide bandgap material layer.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: March 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hisanori Ihara
  • Patent number: 8975756
    Abstract: An electric terminal device is provided with glass substrate 11, glass-substrate-side electric terminals 15 formed on glass substrate 11, tape carrier packages 16a and 16b which are larger in thermal expansion rate than glass substrate 11, and tape-side electric terminals 21 provided to correspond to glass-substrate-side electric terminals 15. Tape-side electric terminals 21 include alignment terminals 25 to align with terminals at the outer most edges of glass-substrate-side electric terminals 15, and connecting terminals 26 electrically and mechanically connected to glass-substrate-side electric terminals 15 due to thermal expansion of tape carrier packages 16a and 16b by thermo-compression bonding on a condition that alignment terminals 25 of tape-side electric terminals 21 are aligned with the terminals of glass-substrate-side electric terminals 15.
    Type: Grant
    Filed: April 13, 2007
    Date of Patent: March 10, 2015
    Assignee: Japan Display Central Inc.
    Inventor: Iwane Ichiyama
  • Patent number: 8975709
    Abstract: An object is to prevent an operation defect and to reduce an influence of fluctuation in threshold voltage of a field-effect transistor. A field-effect transistor, a switch, and a capacitor are provided. The field-effect transistor includes a first gate and a second gate which overlap with each other with a channel formation region therebetween, and the threshold voltage of the field-effect transistor varies depending on the potential of the second gate. The switch has a function of determining whether electrical connection between one of a source and a drain of the field-effect transistor and the second gate of the field-effect transistor is established. The capacitor has a function of holding a voltage between the second gate of the field-effect transistor and the other of the source and the drain of the field-effect transistor.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: March 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hiroyuki Miyake
  • Patent number: 8952474
    Abstract: Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: February 10, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Chieh Huang, Dun-Nian Yaung, Chih-Jen Wu, Chen-Ming Huang
  • Patent number: 8933527
    Abstract: A device includes a plurality of isolation spacers, and a plurality of bottom electrodes, wherein adjacent ones of the plurality of bottom electrodes are insulated from each other by respective ones of the plurality of isolation spacers. A plurality of photoelectrical conversion regions overlaps the plurality of bottom electrodes, wherein adjacent ones of the plurality of photoelectrical conversion regions are insulated from each other by respective ones of the plurality of isolation spacers. A top electrode overlies the plurality of photoelectrical conversion regions and the plurality of isolation spacers.
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: January 13, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Shin Chu, Cheng-Tao Lin, Meng-Hsun Wan, Szu-Ying Chen, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 8921966
    Abstract: An image sensor includes: a photoelectric conversion pixel having a photoelectric conversion element that performs photoelectric conversion, and a light guide formed of a first material in an interlayer insulation film above the photoelectric conversion element; and a light-shielded pixel having a photoelectric conversion element that performs photoelectric conversion, a light guide formed of a second material that is different from the first material in an interlayer insulation film above the photoelectric conversion element, and a light-shielding layer formed above the light guide.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: December 30, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takafumi Kishi
  • Patent number: 8916869
    Abstract: A solid-state image sensor which holds a potential for a long time and includes a thin film transistor with stable electrical characteristics is provided. When the off-state current of a thin film transistor including an oxide semiconductor layer is set to 1×10?13 A or less and the thin film transistor is used as a reset transistor and a transfer transistor of the solid-state image sensor, the potential of the signal charge storage portion is kept constant, so that a dynamic range can be improved. When a silicon semiconductor which can be used for a complementary metal oxide semiconductor is used for a peripheral circuit, a high-speed semiconductor device with low power consumption can be manufactured.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: December 23, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Shunpei Yamazaki
  • Patent number: 8916917
    Abstract: According to one embodiment, a solid-state imaging device includes a first element formation region surrounded by an element isolation region in a semiconductor substrate having a first and a second surface, an upper element isolation layer on the first surface in the element formation region, a lower element isolation layer between the second surface and the upper element isolation layer, a first photodiode in the element formation region, a floating diffusion in the element formation region, and a first transistor disposed between the first photodiode and the floating diffusion. A side surface of the lower element isolation layer protrudes closer to the transistor than a side surface of the upper element isolation layer.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: December 23, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shogo Furuya, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Patent number: 8889460
    Abstract: The present disclosure provides an image sensor device and a method for manufacturing the image sensor device. An exemplary image sensor device includes a substrate having a front surface and a back surface; a plurality of sensor elements disposed at the front surface of the substrate, each of the plurality of sensor elements being operable to sense radiation projected towards the back surface of the substrate; a radiation-shielding feature disposed over the back surface of the substrate and horizontally disposed between each of the plurality of sensor elements; a dielectric feature disposed between the back surface of the substrate and the radiation-shielding feature; and a metal layer disposed along sidewalls of the dielectric feature.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: November 18, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Wen Hsu, Shih-Chang Liu, Yeur-Luen Tu
  • Patent number: 8883526
    Abstract: An image pickup device, wherein a part of the carriers overflowing from the photoelectric conversion unit for a period of photoelectrically generating and accumulating the carriers may be flowed into the floating diffusion region, and a pixel signal generating unit generating a pixel signal according to the carriers stored in the photoelectric conversion unit and the carriers having overflowed into the floating diffusion region, is provided. The expansion of a dynamic range and the improvement of an image quality can be provided by controlling a ratio of the carriers flowing into the floating diffusion region to the carriers overflowing from such a photoelectric conversion unit at high accuracy.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: November 11, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akira Okita, Toru Koizumi, Isamu Ueno, Katsuhito Sakurai
  • Patent number: 8878267
    Abstract: A purpose of the present invention is to provide a preferable separation structure of wells when a photoelectric conversion unit and a part of a peripheral circuit unit or a pixel circuit are separately formed on separate substrates and electrically connected to each other. To this end, a solid-state imaging device includes a plurality of pixels including a photoelectric conversion unit and a amplification transistor configured to amplify a signal generated by the photoelectric conversion unit; a first substrate on which a plurality of the photoelectric conversion units are disposed; and a second substrate on which a plurality of the amplification transistors are disposed. A well of a first conductivity type provided with a source region and a drain region of the amplification transistor is separated from a well, which is disposed adjacent to the well in at least one direction, of the first conductivity type provided with the source region and the drain region of the amplification transistor.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: November 4, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Fumihiro Inui
  • Patent number: 8878264
    Abstract: A global shutter pixel cell includes a serially connected anti-blooming (AB) transistor, storage gate (SG) transistor and transfer (TX) transistor. The serially connected transistors are coupled between a voltage supply and a floating diffusion (FD) region. A terminal of a photodiode (PD) is connected between respective terminals of the AB and the SG transistors; and a terminal of a storage node (SN) diode is connected between respective terminals of the SG and the TX transistors. A portion of the PD region is extended under the SN region, so that the PD region shields the SN region from stray photons. Furthermore, a metallic layer, disposed above the SN region, is extended downwardly toward the SN region, so that the metallic layer shields the SN region from stray photons. Moreover, a top surface of the metallic layer is coated with an anti-reflective layer.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: November 4, 2014
    Assignee: Aptina Imaging Corporation
    Inventors: Sergey Velichko, Jingyi Bai
  • Patent number: 8878265
    Abstract: According to one embodiment, a solid-state imaging device includes a first element formation region surrounded by an element isolation region in a semiconductor substrate having a first and a second surface, an upper element isolation layer on the first surface in the element formation region, a lower element isolation layer between the second surface and the upper element isolation layer, a first photodiode in the element formation region, a floating diffusion in the element formation region, and a first transistor disposed between the first photodiode and the floating diffusion. A side surface of the lower element isolation layer protrudes closer to the transistor than a side surface of the upper element isolation layer.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: November 4, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shogo Furuya, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Patent number: 8859353
    Abstract: A p channel TFT of a driving circuit has a single drain structure and its n channel TFT, an LDD structure. A pixel TFT has the LDD structure. A pixel electrode disposed in a pixel unit is connected to the pixel TFT through a hole bored in at least a protective insulation film formed of an inorganic insulating material and formed above a gate electrode of the pixel TFT, and in an inter-layer insulation film disposed on the insulation film in close contact therewith. These process steps use 6 to 8 photo-masks.
    Type: Grant
    Filed: September 9, 2013
    Date of Patent: October 14, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Jun Koyama
  • Patent number: 8853852
    Abstract: A method for manufacturing the semiconductor apparatus includes an anchor process of forming a barrier metal film and carrying out physical etching making use of sputter gas. The anchor process is carried out at the same time on a wire connected to the lower portion of a first aperture serving as a penetration connection hole and a wire connected to the lower portion of a second aperture serving as a connection hole having an aspect ratio different from the aspect ratio of the penetration connection hole. The first and second apertures are apertures created on a semiconductor substrate obtained by bonding first and second semiconductor substrates to each other. The present technology can be applied to the semiconductor apparatus such as a solid-state imaging apparatus.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: October 7, 2014
    Assignee: Sony Corporation
    Inventor: Toshihiko Hayashi
  • Patent number: 8823123
    Abstract: According to one embodiment, there is provided a solid-state image sensor including a photoelectric conversion layer, and a multilayer interference filter. The multilayer interference filter is arranged to conduct light of a particular color, of incident light, selectively to the photoelectric conversion layer. The multilayer interference filter has a laminate structure in which a first layer having a first refraction index and a second layer having a second refraction index are repeatedly laminated, and a third layer which is in contact with a lower surface of the laminate structure and has a third refraction index. A lowermost layer of the laminate structure is the second layer. The third refraction index is not equal to the first refraction index and is higher than the second refraction index.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: September 2, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Kokubun, Yusaku Konno
  • Patent number: 8816412
    Abstract: An image sensor having a light receiving region and an optical black region includes a semiconductor substrate, an interconnection disposed on the semiconductor substrate and extending along an interface between the light receiving region and the optical black region, and via plugs disposed between the interconnection and the semiconductor substrate and serving as light shielding members at the interface. The via plugs are arranged in a zigzagging pattern along the interface.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: August 26, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Keon Yong Cheon, Jong-Won Choi, Sung-Hyun Yoon
  • Patent number: 8810765
    Abstract: An electroluminescence element includes an electroluminescence substrate including a thin film transistor substrate, and a light-emitting layer provided over the thin film transistor substrate and divided by picture-element separating portions so as to correspond to unit picture elements; and a sealing substrate arranged to hermetically seal the light-emitting layer of the electroluminescence substrate. At least one of the electroluminescence substrate and the sealing substrate is a flexible substrate. Spacers are provided between the electroluminescence substrate and the sealing substrate.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: August 19, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tohru Okabe, Hirohiko Nishiki
  • Patent number: 8796803
    Abstract: The inventive concept provides image sensors and methods of forming the same. In the image sensor, a surface trap region may be disposed to be adjacent to a surface of a substrate lens component. Thus, a dark current characteristic may be improved.
    Type: Grant
    Filed: February 14, 2013
    Date of Patent: August 5, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: YunKi Lee, Seunghoon Kim, Yongsick Kim, Changrok Moon
  • Patent number: 8796799
    Abstract: An image sensor includes: a substrate having a plurality of unit pixel region; a light receiving element formed in the substrate at the unit pixel region; an interlayer dielectric layer formed over the substrate; a lightguide formed in the interlayer dielectric layer for the light receiving element; a light focusing pattern formed over the interlayer dielectric layer at the pixel region; a planarization layer formed over the substrate and covering the light focusing pattern; and a lens formed over the planarization layer at the pixel region.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: August 5, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Youn-Sub Lim
  • Patent number: 8791542
    Abstract: According to an embodiment, a solid-state imaging device includes a photoelectric, conversion element. The photoelectric conversion element includes a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer. In the solid-state imaging device, D2m3/L2m3×ni32/N2<D1M2/L1M2×ni22/N2 and D1m1/L1m1×ni12/N1<D1m2/L1m2×ni22/N1 are established.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: July 29, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shuichi Toriyama, Koichi Kokubun, Hiroki Sasaki
  • Patent number: 8791541
    Abstract: Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor.
    Type: Grant
    Filed: July 5, 2012
    Date of Patent: July 29, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Chieh Huang, Dun-Nian Yaung, Chih-Jen Wu, Chen-Ming Huang
  • Patent number: 8785984
    Abstract: A method of making a backside illuminated sensor is provided. A substrate is provided and a high energy ion implantation is performed over the substrate to implant a first doped region. A layer is formed over the substrate and a self-align high energy ion implantation is performed over the substrate to implant a second doped region over the first doped region. The combined thickness of the first and second doped region is greater than 50 percent of thickness of the substrate and the distance between back surface of the substrate and the first and second doped regions is less than 50 percent of thickness of the substrate. In this way, an enlarged light sensing region is formed through which electrons generated from back surface of the surface may easily reach the pixel.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: July 22, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Hsuan Hsu, Dun-Nian Yaung
  • Patent number: 8786041
    Abstract: A solid-state imaging apparatus includes: a solid-state imaging device photoelectrically converting light taken by a lens; and a light shielding member shielding part of light incident on the solid-state imaging device from the lens, wherein an angle made between an edge surface of the light shielding member and an optical axis direction of the lens is larger than an incident angle of light to be incident on an edge portion of the light shielding member.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: July 22, 2014
    Assignee: Sony Corporation
    Inventors: Toshiaki Iwafuchi, Masahiko Shimizu, Hirotaka Kobayashi
  • Patent number: 8778778
    Abstract: According to an embodiment, an active layer is formed on a first surface of a semiconductor substrate, a wiring layer is formed on the active layer, and an insulating layer is formed covering the wiring layer. The first surface of the semiconductor substrate is bonded to a support substrate via the insulating layer, and the semiconductor substrate bonded to the support substrate is thinned leaving the semiconductor substrate having a predetermined thickness which covers the active layer from a second surface. At least a part of area of the thinned semiconductor substrate is removed to expose the active layer.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: July 15, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazumasa Tanida, Masahiro Sekiguchi, Masayuki Dohi, Tsuyoshi Matsumura, Hideo Numata, Mari Otsuka, Naoko Yamaguchi, Takashi Shirono, Satoshi Hongo
  • Patent number: 8772898
    Abstract: A backside illuminated image sensor includes a semiconductor layer and a trench disposed in the semiconductor layer. The semiconductor layer has a frontside surface and a backside surface. The semiconductor layer includes a light sensing element of a pixel array disposed in a sensor array region of the semiconductor layer. The pixel array is positioned to receive external incoming light through the backside surface of the semiconductor layer. The semiconductor layer also includes a light emitting element disposed in a periphery circuit region of the semiconductor layer external to the sensor array region. The trench is disposed in the semiconductor layer between the light sensing element and the light emitting element. The trench is positioned to impede a light path between the light emitting element and the light sensing element when the light path is internal to the semiconductor layer.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: July 8, 2014
    Assignee: OmniVision Technologies, Inc.
    Inventors: Duli Mao, Hsin-Chih Tai, Vincent Venezia, Yin Qian, Gang Chen, Howard E. Rhodes
  • Patent number: 8759934
    Abstract: An image sensor includes a photosensitive region disposed within a semiconductor layer and a stress adjusting layer. The photosensitive region is sensitive to light incident through a first side of the image sensor to collect an image charge. The stress adjusting layer is disposed over the first side of the semiconductor layer to establish a stress characteristic that encourages photo-generated charge carriers to migrate towards the photosensitive region.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: June 24, 2014
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hsin-Chih Tai, Howard E. Rhodes, Wei Zheng, Vincent Venezia, Yin Qian, Duli Mao
  • Patent number: 8742524
    Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: June 3, 2014
    Assignee: Sony Corporation
    Inventors: Kazuichiroh Itonaga, Machiko Horiike
  • Patent number: 8735939
    Abstract: According to one embodiment, a solid state imaging device includes a photoelectric converting portion including a semiconductor region and a semiconductor film. The semiconductor region has a first region and a second region. The first region is of a second conductivity type. The first region is provided in a semiconductor substrate. The second region is of a first conductivity type. The first conductivity type is a different conductivity type from the second conductivity type. The second region is provided on the first region. The semiconductor film is of the second conductivity type. The semiconductor film is provided on the semiconductor region. An absorption coefficient of a material of the semiconductor film to a visible light is higher than an absorption coefficient of a material of the semiconductor substrate to the visible light. A thickness of the semiconductor film is smaller than a thickness of the semiconductor region.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: May 27, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Koichi Kokubun
  • Patent number: 8729548
    Abstract: The present invention supplies a manufacturing method of a semiconductor device, which includes a non-contact inspection process capable of confirming if a circuit or circuit element formed on an array substrate is normally performed and can decrease a manufacturing cost by eliminating wastes to keep a defective product forming. An electromotive force generated by electromagnetic induction is rectified and shaped by using primary coils formed on a check substrate and secondary coils formed on an array substrate, whereby a power source voltage and a driving signal are supplied to circuits or circuit elements on a TFT substrate so as to be driven.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: May 20, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masaaki Hiroki, Shunpei Yamazaki
  • Publication number: 20140124889
    Abstract: An integrated circuit system includes a first device wafer bonded to a second device wafer at a bonding interface of dielectrics. Each wafer includes a plurality of dies, where each die includes a device, a metal stack, and a seal ring that is formed at an edge region of the die. Seal rings included in dies of the second device wafer each include a first conductive path provided with metal formed in a first opening that extends from a backside of the second device wafer, through the second device wafer, and through the bonding interface to the seal ring of a corresponding die in the first device wafer.
    Type: Application
    Filed: November 5, 2012
    Publication date: May 8, 2014
    Applicant: OmniVision Technologies, Inc.
    Inventors: Yin Qian, Hsin-Chih Tai, Tiejun Dai, Duli Mao, Cunyu Yang, Howard E. Rhodes
  • Patent number: 8716761
    Abstract: An image sensor for a semiconductor light-sensitive device including a semiconductor substrate and a light receiving device configured to receive light and generate a signal from the light. The image sensor may include an electron collecting device formed in the semiconductor substrate to receive at least a portion of the electrons generated by the light in the light receiving device. The image sensor may include a first type device isolation film configured to isolate the light receiving device from the electron collecting device. The image sensor may include a shielding film formed over the semiconductor substrate and configured to shield the first electron collecting device from the light.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: May 6, 2014
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Hoon Jang
  • Patent number: 8704276
    Abstract: A solid-state imaging device includes a semiconductor substrate; a first conductive region of the semiconductor substrate; a first conductive region on an upper surface side of the first conductive region of the semiconductor substrate; a second conductive region below the first conductive region on the upper surface side of the first conductive region of the semiconductor substrate. The solid-state imaging device further includes a photoelectric conversion region including the first conductive region located on the upper surface side of the first conductive region of the semiconductor substrate and the second conductive region and a transfer transistor transferring charges accumulated in the photoelectric conversion region to a readout region; and a pixel including the photoelectric conversion region and the transfer transistor. The first conductive region, which is included in the photoelectric conversion region, extends to the lower side of a sidewall of a gate electrode of the transfer transistor.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: April 22, 2014
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8692253
    Abstract: According to one embodiment, a flat panel display includes a first mounting portion including a first input pad and a first output pad, a second mounting portion including a second input pad and a second output pad, a first common terminal and a second common terminal, which have a common potential, and a guard ring wiring which is formed in a manner to extend from the first common terminal, to pass between the first input pad and the first output pad of the first mounting portion, to pass between the second input pad and the second output pad of the second mounting portion, and to reach the second common terminal, the guard ring wiring including a first resistor element of a first resistance value and a second resistor element of a second resistance value which is higher than the first resistance value.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: April 8, 2014
    Assignee: Japan Display Inc.
    Inventor: Akira Yokogawa
  • Patent number: 8686408
    Abstract: A photoelectric conversion device is provided and includes: a first electrode, a second electrode, and a photoelectric conversion layer between the first and second electrodes, the photoelectric conversion layer containing a mixture of an organic photoelectric conversion dye, a fullerene or a fullerene derivative, and a fullerene polymer; various embodiments of the device, a photosensor, an imaging device, and production methods for these devices.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: April 1, 2014
    Assignee: FUJIFILM Corporation
    Inventors: Katsuyuki Yofu, Daigo Sawaki
  • Publication number: 20140077320
    Abstract: A wafer includes a plurality of chips arranged as rows and columns. A first plurality of scribe lines is between the rows of the plurality of chips. Each of the first plurality of scribe lines includes a metal-feature containing scribe line comprising metal features therein, and a metal-feature free scribe line parallel to, and adjoining, the metal-feature containing scribe line. A second plurality of scribe lines is between the columns of the plurality of chips.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: U-Ting Chen, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Jeng-Shyan Lin, Shuang-Ji Tsai
  • Patent number: 8674417
    Abstract: A solid-state imaging device including: a substrate; a light-receiving part; a second-conductivity-type isolation layer; a detection transistor; and a reset transistor.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: March 18, 2014
    Assignee: Sony Corporation
    Inventor: Isao Hirota
  • Publication number: 20140061737
    Abstract: A system and method for isolating semiconductor devices is provided. An embodiment comprises an isolation region that is laterally removed from source/drain regions of semiconductor devices and has a dielectric material extending over the isolation implant between the source/drain regions. The isolation region may be formed by forming an opening through a layer over the substrate, depositing a dielectric material along the sidewalls of the opening, implanting ions into the substrate after the deposition, and filling the opening with another dielectric material.
    Type: Application
    Filed: August 29, 2012
    Publication date: March 6, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-I Hsu, Min-Feng Kao, Jen-Cheng Liu, Dun-Nian Yaung, Tzu-Hsuan Hsu, Wen-De Wang
  • Publication number: 20140061842
    Abstract: A method includes forming an opening extending from a back surface of a semiconductor substrate to a metal pad on a front side of the semiconductor substrate, and forming a first conductive layer including a first portion overlapping active image sensors in the semiconductor substrate, a second portion overlapping black reference image sensors in the semiconductor substrate, and a third portion in the opening to contact the metal pad. A second conductive layer is formed over and contacting the first conductive layer. A first patterning step is performed to remove the first and the second portions of the second conductive layer, wherein the first conductive layer is used as an etch stop layer. A second patterning step is performed to remove a portion of the first portion of the first conductive layer. The second and the third portions of the first conductive layer remain after the second patterning step.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 6, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shyh-Fann Ting, Jiech-Fun Lu, Ming-I Wang, Yeur-Luen Tu, Ching-Chun Wang
  • Patent number: 8664736
    Abstract: A semiconductor device including a device substrate having a front side and a back side. The semiconductor device further includes an interconnect structure disposed on the front side of the device substrate, the interconnect structure having a n-number of metal layers. The semiconductor device also includes a bonding pad disposed on the back side of the device substrate, the bonding pad extending through the interconnect structure and directly contacting the nth metal layer of the n-number of metal layers.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: March 4, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shuang-Ji Tsai, Dun-Nian Yaung, Jen-Cheng Liu, Jeng-Shyan Lin, Wen-De Wang, Yueh-Chiou Lin
  • Patent number: 8653526
    Abstract: A display panel having a display area and a gate driving area includes a gate line and plural pixel units in the display area, and a gate driver circuit in the gate driving area. The gate line connects to the pixel units. The gate driver circuit connects to the gate line. The gate driver includes a driving transistor and a driving storage capacitor stacked to each other to form a stack structure, which includes a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, a first semiconductor layer, a drain electrode, and a source electrode, which is connected to the gate line. The driving storage capacitor is formed by the first electrode, the first dielectric layer, and the second electrode. The driving transistor is formed by the second electrode, the second dielectric layer, the first semiconductor layer, the source electrode, and the drain electrode.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 18, 2014
    Assignee: AU Optronics Corporation
    Inventors: Chen-Yuan Lei, Meng-Chieh Tsai
  • Publication number: 20140035080
    Abstract: The present invention provides a wafer level camera module structure comprising a chip with a sensing area. A TSV structure is formed by passing through from the top surface to the bottom surface of the chip. A transparent material is disposed on the chip, with at least one conductive via structure formed therein and a trace form thereon. A lens holder is disposed on the transparent material, and a lens is located on the top of the lens holder. The lens is substantially aligning to the transparent material and the sensing area.
    Type: Application
    Filed: August 2, 2012
    Publication date: February 6, 2014
    Applicant: LARVIEW TECHNOLOGIES CORPORATION
    Inventor: Chi-Kuei Lee
  • Patent number: 8643017
    Abstract: An active device array substrate including a first patterned conductive layer, a dielectric layer, a second patterned conductive layer, a passivation layer and pixel electrodes is provided. The first patterned conductive layer includes scan lines, common lines, gates and strip floating shielding patterns. The dielectric layer covering the first patterned conductive layer has first contact holes which expose a portion of the common lines, respectively. The second patterned conductive layer includes data lines, sources, drains and strip capacitance electrodes. Each strip capacitance electrode is electrically connected to one of the common lines through one of the first contact holes. A gap is formed between each data line and one strip capacitance electrode, and the strip floating shielding patterns are disposed under the data lines, the gap and the strip capacitance electrodes. Each pixel electrode is electrically connected to one of the drains through one of the second contact holes.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: February 4, 2014
    Assignee: Au Optronics Corporation
    Inventors: Chu-Yu Liu, Ming-Hung Shih, Chou-Chin Wu, I-Chun Chen
  • Publication number: 20130341692
    Abstract: A semiconductor device including first and second isolation regions supported by a substrate, a first array well supported by the first isolation region, the first array well having a first field implant layer embedded therein, the first field implant layer surrounding a first shallow trench isolation region, a second array well supported by the second isolation region, the second array well supporting a doped region and a drain and having a second field implant layer embedded therein, the second field implant layer surrounding a second shallow trench isolation region, a stack of photodiodes disposed in the substrate between the first and second isolation regions, and a gate oxide formed over an uppermost photodiode of the stack of the photodiodes, the gate oxide and a silicon of the uppermost photodiode forming an interface, a nitrogen concentration at the interface offset from a peak nitrogen concentration.
    Type: Application
    Filed: August 31, 2012
    Publication date: December 26, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiao-Hui Tseng, Jen-Cheng Liu, Dun-Nian Yaung, Tzu-Hsuan Hsu