Controllable By Variation Of Magnetic Field Applied To Device (epo) Patents (Class 257/E29.323)
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Publication number: 20120061784Abstract: An example magnetic recording device includes a laminated body. The laminated body includes a first ferromagnetic layer with a magnetization substantially fixed in a first direction; a second ferromagnetic layer with a variable magnetization direction; a first nonmagnetic layer disposed between the first ferromagnetic layer and the second ferromagnetic layer; a third ferromagnetic layer with a variable magnetization direction; and a fourth ferromagnetic layer with a magnetization substantially fixed in a second direction, wherein at least one of the first and second direction is generally perpendicular to the film plane. The magnetization direction of the second ferromagnetic layer is determinable in response to the orientation of a current, by passing the current in a direction generally perpendicular to the film plane of the layers of the laminated body and the magnetization of the third ferromagnetic layer is able to undergo precession by passing the current.Type: ApplicationFiled: November 17, 2011Publication date: March 15, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Shiho NAKAMURA, Hirofumi MORISE, Satoshi YANAGI, Daisuke SAIDA, Akira KIKITSU
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Publication number: 20120063218Abstract: A spin-torque transfer memory random access memory (STTMRAM) element includes a composite fixed layer formed on top of a substrate and a tunnel layer formed upon the fixed layer and a composite free layer formed upon the tunnel barrier layer, the magnetization direction of each of the composite free layer and fixed layer being substantially perpendicular to the plane of the substrate. The composite layers are made of multiple repeats of a bi-layer unit which consists of a non-magnetic insulating layer and magnetic layer with thicknesses adjusted in a range that makes the magnetization have a preferred direction perpendicular to film plane.Type: ApplicationFiled: September 2, 2011Publication date: March 15, 2012Applicant: Avalanche Technology, Inc.Inventors: Yiming Huai, Jing Zhang, Rajiv Yadav Ranjan, Yuchen Zhou, Roger Klas Malmhall, Ioan Tudosa
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Publication number: 20120063217Abstract: There is disclosed a memory element including a memory layer that has a magnetization perpendicular to a film face and a magnetization direction thereof varies corresponding to information; a magnetization-fixed layer that has a magnetization that is perpendicular to the film face; and an insulating layer that is provided between the memory layer and the magnetization-fixed layer, wherein the memory layer has a lamination structure of a Co—Fe—B layer and an element belonging to any one of 1A group, 2A group, 3A group, 5A group, or 6A group, an electron that is spin-polarized is injected in a lamination direction of a layered structure, and thereby the magnetization direction of the memory layer varies and a recording of information is performed with respect to the memory layer, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer.Type: ApplicationFiled: September 7, 2011Publication date: March 15, 2012Applicant: SONY CORPORATIONInventors: Masanori Hosomi, Kazuhiro Bessho, Hiroyuki Ohmori, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida
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Publication number: 20120061779Abstract: There is provided a memory element including a magnetic layer that includes at least one kind of element selected from a group consisting of Fe, Co, and Ni, and carbon, has a content of carbon that is equal to or greater than 3 atomic % and less than 70 atomic % with respect to a total content of Fe, Co, and Ni, and has magnetic anisotropy in a direction perpendicular to a film face; and an oxide layer that is formed of an oxide having a sodium chloride structure or a spinel structure and that comes into contact with the magnetic layer.Type: ApplicationFiled: August 30, 2011Publication date: March 15, 2012Applicant: SONY CORPORATIONInventors: Hiroyuki Ohmori, Masanori Hosomi, Kazuhiro Bessho, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida
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Publication number: 20120056286Abstract: There is disclosed a memory element including a layered structure including a memory layer that has magnetization perpendicular to a film face and a magnetization direction thereof varies corresponding to information; a magnetization-fixed layer that has magnetization that is perpendicular to the film face; and an insulating layer that is provided between the memory layer. An electron that is spin-polarized is injected in a lamination direction of the layered structure, and thereby the magnetization direction of the memory layer varies and a recording of information is performed with respect to the memory layer, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer, and the memory layer and the magnetization-fixed layer have a film thickness in such a manner that an interface magnetic anisotropy energy becomes larger than a diamagnetic energy.Type: ApplicationFiled: August 24, 2011Publication date: March 8, 2012Applicant: SONY CORPORATIONInventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Kazutaka Yamane, Hiroyuki Uchida
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Publication number: 20120056254Abstract: The present invention provides a spin injection electrode structure, a spin transport element, and a spin transport device which enable effective spin injection in a silicon channel layer at room temperature. A spin injection electrode structure IE comprises a silicon channel layer 12, a first magnesium oxide film 13A disposed on a first part of the silicon channel layer 12, and a first ferromagnetic layer 14A disposed on the first magnesium oxide film 13A. The first magnesium oxide film 13A partly includes a first lattice-matched part P lattice-matched with both of the silicon channel layer 12 and the first ferromagnetic layer 14A.Type: ApplicationFiled: August 24, 2011Publication date: March 8, 2012Applicants: AKITA PREFECTURE, TDK CORPORATIONInventors: Tomoyuki SASAKI, Tohru OIKAWA, Kiyoshi NOGUCHI, Toshio SUZUKI
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Publication number: 20120056284Abstract: There is disclosed a memory element which includes a layered structure. The layered structure includes a memory layer that has a magnetization perpendicular to a film face; a magnetization-fixed layer having magnetization perpendicular to the film face; an insulating layer provided between the memory layer and the magnetization-fixed layer; and a cap layer provided at a face side, which is opposite to the insulating layer-side face, of the memory layer, in which an electron that is spin-polarized is injected in a lamination direction of the layered structure, and thereby the magnetization direction of the memory layer varies and a recording of information is performed, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer, and at least a face, which comes into contact with the memory layer, of the cap layer is formed of a Ta film.Type: ApplicationFiled: August 24, 2011Publication date: March 8, 2012Applicant: SONY CORPORATIONInventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Kazutaka Yamane, Hiroyuki Uchida
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Publication number: 20120056285Abstract: There is provided a memory element including a memory layer that has magnetization perpendicular to a film face; a magnetization-fixed layer that has magnetization that is perpendicular to the film face; and an insulating layer that is provided between the memory layer and the magnetization-fixed layer, wherein an electron that is spin-polarized is injected in a lamination direction of a layered structure, and thereby the magnetization direction of the memory layer varies and a recording of information is performed, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer, the insulating layer is formed of an oxide film, and the memory layer is formed of Co—Fe—B, a concentration of B is low in the vicinity of an interface with the insulating layer, and the concentration of B increases as it recedes from the insulating layer.Type: ApplicationFiled: August 24, 2011Publication date: March 8, 2012Applicant: SONY CORPORATIONInventors: Kazuhiro Bessho, Masanori Hosomi, Hiroyuki Ohmori, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida
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Publication number: 20120056283Abstract: There is disclosed a memory element including a memory layer that has a magnetization perpendicular to a film face and a magnetization direction thereof varies corresponding to information; a magnetization-fixed layer that has a magnetization that is perpendicular to the film face and becomes a reference for the information stored in the memory layer; and an insulating layer that is provided between the memory layer and the magnetization-fixed layer and is formed of a non-magnetic layer, wherein an electron that is spin-polarized is injected in a lamination direction of a layered structure having the memory layer, the insulating layer, and the magnetization-fixed layer, and thereby the magnetization direction varies and a recording of information is performed with respect to the memory layer, and a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer.Type: ApplicationFiled: August 23, 2011Publication date: March 8, 2012Applicant: SONY CORPORATIONInventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Hiroyuki Uchida
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Publication number: 20120049304Abstract: Embodiments relate to IC current sensors fabricated using thin-wafer manufacturing technologies. Such technologies can include processing in which dicing before grinding (DBG) is utilized, which can improve reliability and minimize stress effects. While embodiments utilize face-up mounting, face-down mounting is made possible in other embodiments by via through-contacts. IC current sensor embodiments can present many advantages while minimizing drawbacks often associated with conventional IC current sensors.Type: ApplicationFiled: August 31, 2010Publication date: March 1, 2012Inventors: Mario Motz, Udo Ausserlechner
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Patent number: 8125011Abstract: Magnetoelectronic devices are fabricated by joining the edge of one ferromagnetic thin film element with the top, or bottom, portion of a second ferromagnetic, or nonmagnetic, thin film element. The devices also employ a new operational geometry in which the transport of bias current is in the film plane of at least one of the thin film elements, but is substantially perpendicular to the film plane of at least one of the thin film elements. Additionally, any of the variety magnetoelectronic devices (e.g., current-in-plane spin valves, current-perpendicular-to-the-plane spin valves, magnetic tunnel junctions, and lateral spin valves can be fabricated using these features.Type: GrantFiled: November 19, 2009Date of Patent: February 28, 2012Assignee: The United States of America as represented by the Secretary of the NavyInventor: Mark B Johnson
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Patent number: 8125040Abstract: A method for forming a magnetic tunnel junction (MTJ) for magnetic random access memory (MRAM) using two masks includes depositing over an interlevel dielectric layer containing an exposed first interconnect metallization, a first electrode, a fixed magnetization layer, a tunneling barrier layer, a free magnetization layer and a second electrode. An MTJ structure including the tunnel barrier layer, free layer and second electrode is defined above the first interconnect metallization by a first mask. A first passivation layer encapsulates the MTJ structure, leaving the second electrode exposed. A third electrode is deposited in contact with the second electrode. A second mask is used to pattern a larger structure including the third electrode, the first passivation layer, the fixed magnetization layer and the first electrode. A second dielectric passivation layer covers the etched plurality of layers, the first interlevel dielectric layer and the first interconnect metallization.Type: GrantFiled: March 17, 2009Date of Patent: February 28, 2012Assignee: QUALCOMM IncorporatedInventors: Seung H. Kang, Xia Li, Shiqun Gu, Matthew Nowak
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Patent number: 8124425Abstract: A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 ?m or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.Type: GrantFiled: February 21, 2008Date of Patent: February 28, 2012Assignee: Renesas Electronics CorporationInventors: Kazuyuki Misumi, Masahiro Shimizu, Tsuyoshi Koga, Tatsuhiko Akiyama, Tomohiro Murakami
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Publication number: 20120043630Abstract: In MRAM, a write wiring clad in a ferromagnetic film has been used to reduce a write current or avoid disturbances. Besides, a CuAl wiring obtained by adding a trace of Al to a Cu wiring has been used widely to secure reliability of a high reliability product. There is a high possibility of MRAM being mounted in high reliability products so that reliability is important. Clad wiring however increases the resistance of the CuAl wiring, which is originally high, so that using both may fail to satisfy the specification of the wiring resistance. In the semiconductor device of the invention having plural copper-embedded wiring layers, copper wiring films of plural copper-embedded clad wirings configuring a memory cell matrix region of MRAM are made of relatively pure copper, while a CuAl wiring film is used as copper wiring films of copper-embedded non-clad wirings below these wiring layers.Type: ApplicationFiled: July 13, 2011Publication date: February 23, 2012Inventors: Kazuyuki OMORI, Kenichi Mori, Naohito Suzumura
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Publication number: 20120043631Abstract: A magnetic memory element includes a memory layer, a reference layer, and a spin-injection layer provided between the memory layer and the reference layer. The reference layer has a structure in which at least two CoPt layers containing 20 atomic % or more and 50 atomic % or less of Pt and having a thickness of 1 nm or more and 5 nm or less are stacked with a Ru layer provided therebetween. The thickness of the Ru layer is 0.45±0.05 nm or 0.9±0.1 nm. In addition, the axis of 3-fold crystal symmetry of the CoPt layers is oriented perpendicularly to the film surface. The reference layer includes a high spin polarization layer of 1.5 nm or less containing Co or Fe as a main component at an interface with the spin-injection layer.Type: ApplicationFiled: July 29, 2011Publication date: February 23, 2012Applicant: SONY CORPORATIONInventors: Hiroyuki Ohmori, Masanori Hosomi, Kazuhiro Bessho, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida
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Patent number: 8120126Abstract: A magnetic tunneling junction device and fabrication method is disclosed. In a particular embodiment, the method includes depositing a capping material on a free layer of a magnetic tunneling junction structure to form the capping layer and oxidizing a portion of the capping material to form a layer of oxidized material.Type: GrantFiled: March 2, 2009Date of Patent: February 21, 2012Assignee: QUALCOMM IncorporatedInventors: Kangho Lee, Xiaochun Zhu, Xia Li, Seung H. Kang
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Patent number: 8120127Abstract: A domain wall motion type MRAM 100 has: a magnetic recording layer 10 that is a ferromagnetic layer; and a magnetic coupling layer 20 that is a ferromagnetic layer whose magnetization direction is fixed. The magnetic recording layer 10 has: a first region 10-1; a second region 10-2; and a magnetization switching region 10-3 connecting between the first region 10-1 and the second region 10-2. The first region 10-1 is magnetically coupled to the magnetic coupling layer 20 and its magnetization direction is fixed in a first direction by the magnetic coupling layer 20. The second region 10-2 is not magnetically coupled to the magnetic coupling layer 20 and its magnetization direction is a second direction that is opposite to the first direction.Type: GrantFiled: July 7, 2008Date of Patent: February 21, 2012Assignee: NEC CorporationInventors: Kiyokazu Nagahara, Shunsuke Fukami, Tetsuhiro Suzuki, Norikazu Ohshima, Nobuyuki Ishiwata
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Publication number: 20120038012Abstract: A composite free layer having a FL1/insertion/FL2 configuration is disclosed for achieving high dR/R, low RA, and low ? in TMR or GMR sensors. Ferromagnetic FL1 and FL2 layers have (+) ? and (?) ? values, respectively. FL1 may be CoFe, CoFeB, or alloys thereof with Ni, Ta, Mn, Ti, W, Zr, Hf, Tb, or Nb. FL2 may be CoFe, NiFe, or alloys thereof with Ni, Ta, Mn, Ti, W, Zr, Hf, Tb, Nb, or B. The thin insertion layer includes at least one magnetic element such as Co, Fe, and Ni, and at least one non-magnetic element selected from Ta, Ti, W, Zr, Hf, Nb, Mo, V, Cr, or B. In a TMR stack with a MgO tunnel barrier, dR/R>60%, ?˜1+10?6, and RA=1.2 ohm-um2 when FL1 is CoFe/CoFeB/CoFe, FL2 is CoFe/NiFe/CoFe, and the insertion layer is CoTa or CoFeBTa.Type: ApplicationFiled: October 19, 2011Publication date: February 16, 2012Inventors: Tong Zhao, Hui-Chuan Wang, Min Li, Kunliang Zhang
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Publication number: 20120039119Abstract: A method and system for providing a magnetic junction usable in a magnetic device are described. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, and a free layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The free layer has a magnetic anisotropy, at least a portion of which is a biaxial anisotropy. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction.Type: ApplicationFiled: August 11, 2010Publication date: February 16, 2012Applicant: GRANDIS, INC.Inventor: Dmytro Apalkov
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Publication number: 20120038011Abstract: A magnetic pinned layer is formed over a substrate. An insulating film is formed over the magnetic pinned layer. A recess is formed in and through the insulating film. A tunneling insulating film is formed over a bottom of the recess. A first magnetic free layer is formed over the bottom of the recess via the tunneling insulating film. A second magnetic free layer is formed over the insulating film and made of a same material as the first magnetic free layer. A non-magnetic film is formed on sidewalls of the recess, extending from the first magnetic free layer to the second magnetic free layer and made of oxide of the material of the first magnetic free layer. An upper electrode is disposed over the first magnetic free layer, non-magnetic film and second magnetic free layer, and electrically connected to the first magnetic free layer and second magnetic free layer.Type: ApplicationFiled: April 19, 2011Publication date: February 16, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventor: Yoshihisa Iba
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Publication number: 20120032283Abstract: A sensor module includes a substrate system which has multiple substrates situated one on top of the other and connected in each case via a wafer bond connection. The substrate system includes at least one first sensor substrate and at least one second sensor substrate, the first sensor substrate having a first sensor structure and the second sensor substrate having a second sensor structure. The first and second sensor structures are designed for detecting different characteristics. At least the first sensor structure includes a micromechanical functional structure. Moreover, a method for manufacturing such a sensor module is disclosed.Type: ApplicationFiled: August 9, 2011Publication date: February 9, 2012Inventors: Jens FREY, Heribert WEBER, Eckhard GRAF
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Publication number: 20120032289Abstract: A magnetic memory device including a memory layer having a vertical magnetization on the layer surface, of which the direction of magnetization is changed according to information; and a reference layer provided against the memory layer, and being a basis of information while having a vertical magnetization on the layer surface, wherein the memory device memorizes the information by reversing the magnetization of the memory layer by a spin torque generated when a current flows between layers made from the memory layer, the nonmagnetization layer and the reference layer, and a coercive force of the memory layer at a memorization temperature is 0.7 times or less than a coercive force at room temperature, and a heat conductivity of a center portion of an electrode formed on one side of the memory layer in the direction of the layer surface is lower than a heat conductivity of surroundings thereof.Type: ApplicationFiled: July 28, 2011Publication date: February 9, 2012Applicant: SONY CORPORATIONInventors: Hiroyuki Ohmori, Masanori Hosomi, Kazuhiro Bessho, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida
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Publication number: 20120032288Abstract: According to one embodiment, a magnetoresistive element comprises a multilayered structure and insulating film. The multilayered structure is formed on a substrate, and includes a fixed layer which has the invariable magnetization direction, a free layer which contains cobalt or iron and has the variable magnetization direction, and a nonmagnetic layer sandwiched between the fixed layer and free layer. The insulating film is formed on the side surface of the free layer, and contains boron and nitrogen.Type: ApplicationFiled: March 18, 2011Publication date: February 9, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Kazuhiro TOMIOKA
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Patent number: 8110881Abstract: A MRAM cell structure includes a bottom electrode; a magnetic tunnel junction unit disposed on the bottom electrode; a top electrode disposed on the magnetic tunnel junction unit; and a blocking layer disposed on the top electrode, wherein the blocking layer is wider than the magnetic tunnel junction unit for preventing against formation of a short circuit between a contact and the magnetic tunnel junction unit.Type: GrantFiled: September 27, 2007Date of Patent: February 7, 2012Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ya-Chen Kao, Chun-Jung Lin, Yu-Jen Wang, Hsu-Chen Cheng, Feng-Jia Shiu, Yung-Tao Lin
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Publication number: 20120025338Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.Type: ApplicationFiled: October 5, 2011Publication date: February 2, 2012Applicant: AVALANCHE TECHNOLOGY, INC.Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
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Publication number: 20120025339Abstract: A magnetic tunnel junction cell having a free layer and first pinned layer with perpendicular anisotropy, the cell including a coupling layer between the free layer and a second pinned layer, the coupling layer comprising a phase change material switchable from an antiferromagnetic state to a ferromagnetic state. In some embodiments, at least one actuator electrode proximate the coupling layer transfers a strain from the electrode to the coupling layer to switch the coupling layer from the antiferromagnetic state to the ferromagnetic state. Memory devices and methods are also described.Type: ApplicationFiled: October 12, 2011Publication date: February 2, 2012Applicant: SEAGATE TECHNOLOGY LLCInventor: Jianxin Zhu
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Publication number: 20120026785Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.Type: ApplicationFiled: October 5, 2011Publication date: February 2, 2012Applicant: AVALANCHE TECHNOLOGY, INC.Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
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Publication number: 20120020152Abstract: The invention relates to a writable magnetic element comprising a stack of layers presenting a write magnetic layer, wherein the stack has a central layer of at least one magnetic material presenting a direction of magnetization that is parallel or perpendicular to the plane of the central layer, said central layer being sandwiched between first and second outer layers of non-magnetic materials, the first outer layer comprising a first non-magnetic material and the second outer layer comprising a second non-magnetic material that is different from the first non-magnetic material, at least the second non-magnetic material being electrically conductive, wherein it includes a device for causing current to flow through the second outer layer and the central layer in a current flow direction parallel to the plane of the central layer, and a device for applying a magnetic field having a component along a magnetic field direction that is either parallel or perpendicular to the plane of the central layer and the currType: ApplicationFiled: October 6, 2010Publication date: January 26, 2012Inventors: Gilles Gaudin, Ioan Mihai Miron, Pietro Gambardella, Alain Schuhl
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Publication number: 20120018823Abstract: A spin transfer torque memory random access memory (STTMRAM) element is capable of switching states when electrical current is applied thereto for storing data and includes the following layers. An anti-ferromagnetic layer, a fixed layer formed on top of the anti-ferromagnetic layer, a barrier layer formed on top of the second magnetic layer of the fixed layer, and a free layer including a first magnetic layer formed on top of the barrier layer, a second magnetic layer formed on top of the first magnetic layer, a non-magnetic insulating layer formed on top of the second magnetic layer and a third magnetic layer formed on top of the non-magnetic insulating layer. A capping layer is formed on top of the non-magnetic insulating layer.Type: ApplicationFiled: May 2, 2011Publication date: January 26, 2012Applicant: AVALANCHE TECHNOLOGY, INC.Inventors: Yiming Huai, Rajiv Yadav Ranjan, Ioan Tudosa, Roger Klas Malmhall, Yuchen Zhou
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Publication number: 20120023386Abstract: Provided are magnetic memory devices, electronic systems and memory cards including the same, methods of manufacturing the same, and methods of controlling a magnetization direction of a magnetic pattern. In a magnetic memory device, atomic-magnetic moments non-parallel to one surface of a free pattern increase in the free pattern. Therefore, critical current density of the magnetic memory device may be reduced, such that power consumption of the magnetic memory device is reduced or minimized and/or the magnetic memory device is improved or optimized for a higher degree of integration.Type: ApplicationFiled: July 13, 2011Publication date: January 26, 2012Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sechung Oh, Jangeun Lee, Woojin Kim, Heeju Shin
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Publication number: 20120018827Abstract: A multiple sensor-types integrated circuit device includes a semiconductor die including a first sensor type and a second sensor type formed thereon, an electrically insulating package enclosing the semiconductor die and a plurality of electrically conductive leads coupled to the semiconductor die and extending from the package. By way of example and not limitation, a multiple sensor-types integrated circuit die includes a semiconductor substrate of a first polarity, a plurality of regions of the first polarity formed in the substrate, where the plurality of regions are relatively more heavily doped than the substrate, multiple wells formed in the substrate, and a covering layer formed over the substrate.Type: ApplicationFiled: July 20, 2011Publication date: January 26, 2012Applicant: MAXIM INTEGRATED PRODUCTS, INC.Inventors: Nevzat Akin Kestelli, David Skurnik
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Publication number: 20120018826Abstract: A method for manufacturing a semiconductor memory device includes sequentially depositing a bottom electrode layer, a magnetic tunnel junction (MTJ) layer, a first top electrode layer, a second top electrode layer and a mask layer, etching the mask layer and forming a mask pattern, etching the second top electrode layer and the first top electrode layer by using the mask pattern as an etch barrier, etching the MTJ layer by using the mask layer and the second top electrode layer as an etch barrier, and etching the bottom electrode layer by using the first top electrode layer as an etch barrier.Type: ApplicationFiled: July 21, 2011Publication date: January 26, 2012Applicant: Hynix Semiconductor Inc.Inventors: Min Suk LEE, Byung Gu Gyun, Bo Kyoung Jung, Chang Hyup Shin
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Publication number: 20120018825Abstract: Magnetic memory devices, electronic systems and memory cards including the same, methods of manufacturing the same, and methods of forming perpendicular magnetic films are provided. The magnetic memory device may include a seed pattern on a substrate having a first crystal structure, a perpendicular magnetic pattern on the seed pattern having a second crystal structure, and an interlayer pattern between the seed pattern and the perpendicular magnetic pattern. The interlayer pattern may reduce a stress caused by a difference between horizontal lattice constants of the first and the second crystal structures.Type: ApplicationFiled: July 6, 2011Publication date: January 26, 2012Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Woo Chang Lim, Jangeun Lee, SeChung Oh, Woojin Kim
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Publication number: 20120018824Abstract: A magnetic memory layer and a magnetic memory device including the same, the magnetic memory layer including a first seed layer; a second seed layer on the first seed layer, the second seed layer grown according to a <002> crystal direction with respect to a surface of the first seed layer; and a main magnetic layer on the second seed layer, the main magnetic layer grown according to the <002> crystal direction with respect to a surface of the second seed layer.Type: ApplicationFiled: June 28, 2011Publication date: January 26, 2012Inventors: Woo-chang LIM, Young-hyun Kim, Jun-ho Jeong, Hee-ju Shin
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Publication number: 20120019283Abstract: A spin MOSFET includes: a first ferromagnetic layer provided on a semiconductor substrate, and having a fixed magnetization direction perpendicular to a film plane; a semiconductor layer provided on the first ferromagnetic layer, including a lower face opposed to the upper face of the first ferromagnetic layer, an upper face opposed to the lower face, and side faces different from the lower and upper faces; a second ferromagnetic layer provided on the upper face of the semiconductor layer, and having a variable magnetization direction perpendicular to a film plane; a first tunnel barrier provided on the second ferromagnetic layer; a third ferromagnetic layer provided on the first tunnel barrier; a gate insulating film provided on the side faces of the semiconductor layer; and a gate electrode provided on the side faces of the semiconductor layer with the gate insulating film being interposed therebetween.Type: ApplicationFiled: September 9, 2011Publication date: January 26, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Yoshiaki SAITO, Hideyuki Sugiyama, Tomoaki Inokuchi, Takao Marukame, Mizue Ishikawa
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Publication number: 20120018788Abstract: A magnetic stack with a multilayer free layer having a switchable magnetization orientation, the free layer comprising a first ferromagnetic portion and a second ferromagnetic portion with an electrically conducting non-magnetic intermediate layer between the first portion and the second portion. The magnetic stack also includes a first ferromagnetic reference layer having a pinned magnetization orientation, a first non-magnetic spacer layer between the free layer and the first reference layer, a second ferromagnetic reference layer having a pinned magnetization orientation, and a second non-magnetic spacer layer between the free layer and the second reference layer.Type: ApplicationFiled: September 29, 2011Publication date: January 26, 2012Applicant: SEAGATE TECHNOLOGY LLCInventors: Yuankai Zheng, Xuebing Feng, Zheng Gao
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Publication number: 20120018822Abstract: The invention relates to a writable magnetic element comprising a stack of layers presenting a write magnetic layer, wherein the stack has a central layer of at least one magnetic material presenting a direction of magnetization that is perpendicular to the plane of the central layer, said central layer being sandwiched between first and second outer layers of non-magnetic materials, the first outer layer comprising a first non-magnetic material and the second outer layer comprising a second non-magnetic material that is different from the first non-magnetic material, at least the second non-magnetic material being electrically conductive, and wherein it includes a device for causing current to flow through the second outer layer in a current flow direction parallel to the plane of the central layer, and a device for applying a magnetic field along a magnetic field direction that is perpendicular to the plane of the central layer.Type: ApplicationFiled: October 6, 2010Publication date: January 26, 2012Inventors: Gilles Gaudin, Ioan Mihai Miron, Pietro Gambardella, Alain Schuhl
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Publication number: 20120012953Abstract: A method and system for providing a magnetic substructure usable in a magnetic device, as well as a magnetic element and memory using the substructure are described. The magnetic substructure includes a plurality of ferromagnetic layers and a plurality of nonmagnetic layers. The plurality of ferromagnetic layers are interleaved with the plurality of nonmagnetic layers. The plurality of ferromagnetic layers are immiscible with and chemically stable with respect to the plurality of nonmagnetic layers. The plurality of ferromagnetic layers are substantially free of a magnetically dead layer-producing interaction with the plurality of nonmagnetic layers. Further, the plurality of nonmagnetic layers induce a perpendicular anisotropy in the plurality of ferromagnetic layers. The magnetic substructure is configured to be switchable between a plurality of stable magnetic states when a write current is passed through the magnetic substructure.Type: ApplicationFiled: November 6, 2010Publication date: January 19, 2012Applicant: GRANDIS, INC.Inventors: Daniel Lottis, Eugene Youjun Chen, Xueti Tang, Steven M. Watts
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Publication number: 20120012952Abstract: A magnetic tunnel junction (MTJ) storage element may comprise a pinned layer stack and a first functional layer. The pinned layer stack is formed of a plurality of layers comprising a bottom pinned layer, a coupling layer, and a top pinned layer. The first functional layer is disposed in the bottom pinned layer or the top pinned layer.Type: ApplicationFiled: July 16, 2010Publication date: January 19, 2012Applicant: QUALCOMM IncorporatedInventors: Wei-Chuan Chen, Seung H. Kang, Xiaochun Zhu, Xia Li
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Publication number: 20120012955Abstract: Provided is a magnetic random access memory to which spin torque magnetization reversal is applied, the magnetic random access memory being thermal stable in a reading operation and also being capable of reducing a current in a wiring operation. A magnetoresistive effect element formed by sequentially stacking a fixed layer, a nonmagnetic barrier layer, and a recording layer is used as a memory element. The recording layer adopts a laminated ferrimagnetic structure.Type: ApplicationFiled: March 4, 2009Publication date: January 19, 2012Applicant: HITACHI, LTD.Inventors: Kenchi Ito, Jun Hayakawa, Katsuya Miura, Hiroyuki Yamamoto
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Publication number: 20120012954Abstract: An object of the invention is to ensure the thermal stability of magnetization even when a magnetic memory element is miniaturized. A magnetic memory element includes a first magnetic layer (22), an insulating layer (21) that is formed on the first magnetic layer (22), and a second magnetic layer (20) that is formed on the insulating layer (21). At least one of the first magnetic layer (22) and the second magnetic layer (20) is strained and deformed so as to be elongated in an easy magnetization axis direction of the magnetic layer (22) or (20) or compressive strain (101) remains in any direction in the plane of at least one of the first magnetic layer and the second magnetic layer.Type: ApplicationFiled: July 8, 2009Publication date: January 19, 2012Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.Inventors: Michiya Yamada, Yasushi Ogimoto
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Publication number: 20120014176Abstract: A structure includes an electrically conductive material possessing spontaneous magnetization (“free magnet”) not in contact with an electrically resistive material possessing spontaneous magnetization (“pinned magnet”), and a spacer having free electrons to transfer spin between the electrically resistive material and the electrically conductive material. During operation, an existing direction of magnetization of the free magnet is changed to a new direction of magnetization, by a spin current generated by transfer of heat between at least the spacer and the pinned magnet. Thereafter, the new direction of magnetization of the free magnet is sensed. Many such structures are fabricated to have an easy axis of magnetic anisotropy in the free magnet, to implement memories that write data by transferring heat. Several such structures are fabricated to have an easy plane of magnetic anisotropy in the free magnet, to implement oscillators that generate an oscillating signal, on transfer of heat.Type: ApplicationFiled: September 23, 2011Publication date: January 19, 2012Inventor: John Casimir Slonczewski
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Publication number: 20120008381Abstract: A magnetoresistive element which records information by supplying spin-polarized electrons to a magnetic material, includes a first pinned layer which is made of a magnetic material and has a first magnetization directed in a direction perpendicular to a film surface, a free layer which is made of a magnetic material and has a second magnetization directed in the direction perpendicular to the film surface, the direction of the second magnetization reversing by the spin-polarized electrons, and a first nonmagnetic layer which is provided between the first pinned layer and the free layer. A saturation magnetization Ms of the free layer satisfies a relationship 0?Ms<?{square root over ( )}{Jw/(6?At)}. Jw is a write current density, t is a thickness of the free layer, A is a constant.Type: ApplicationFiled: September 15, 2011Publication date: January 12, 2012Inventors: Toshihiko NAGASE, Masatoshi Yoshikawa, Eiji Kitagawa, Masahiko Nakayama, Tadashi Kai, Tatsuya Kishi, Hiroaki Yoda
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Publication number: 20120007196Abstract: According to one embodiment, a magnetoresistive random access memory includes a magnetoresistive element in a memory cell, the magnetoresistive element including a first metal magnetic layer, a second metal magnetic layer, and an insulation layer interposed between the first and second metal magnetic layers. An area of each of the first and second metal magnetic layers is smaller than an area of the insulation layer.Type: ApplicationFiled: March 18, 2011Publication date: January 12, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Katsuaki NATORI, Koji YAMAKAWA, Daisuke IKENO
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Publication number: 20120001279Abstract: Provided is a highly-sensitive Hall element capable of eliminating an offset voltage without increasing the chip size. At the four vertices of a square Hall sensing portion, Hall voltage output terminals and control current input terminals are respectively arranged independently from each other. The Hall voltage output terminals all have the same shape. The control current input terminals are arranged on both sides of the Hall voltage output terminals, respectively, to be spaced apart from the Hall voltage output terminals so as to prevent electrical connection to the Hall voltage output terminals, and have the same shape at the four vertices.Type: ApplicationFiled: June 30, 2011Publication date: January 5, 2012Inventors: Takaaki Hioka, Toshihiko Omi
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Publication number: 20120002330Abstract: An MR element includes a first ferromagnetic layer, a second ferromagnetic layer, and a spacer layer disposed between the first and second ferromagnetic layers. The spacer layer includes a nonmagnetic metal layer, a first oxide semiconductor layer, and a second oxide semiconductor layer that are stacked in this order. The nonmagnetic metal layer is made of Cu, and has a thickness in the range of 0.3 to 1.5 nm. The first oxide semiconductor layer is made of a Ga oxide semiconductor, and has a thickness in the range of 0.5 to 2.0 nm. The second oxide semiconductor layer is made of a Zn oxide semiconductor, and has a thickness in the range of 0.1 to 1.0 nm.Type: ApplicationFiled: June 30, 2010Publication date: January 5, 2012Applicant: TDK CORPORATIONInventors: Hironobu MATSUZAWA, Yoshihiro Tsuchiya
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Publication number: 20120001281Abstract: Disclosed herein is a magnetic storage element including: a reference layer configured to have a magnetization direction fixed to a predetermined direction; a recording layer configured to have a magnetization direction that changes due to spin injection in a direction corresponding to recording information; an intermediate layer configured to separate the recording layer from the reference layer; and a heat generator configured to heat the recording layer. A material of the recording layer is such a magnetic material that magnetization at 150° C. is at least 50% of magnetization at a room temperature and magnetization at a temperature in a range from 150° C. to 200° C. is in a range from 10% to 80% of magnetization at a room temperature.Type: ApplicationFiled: June 1, 2011Publication date: January 5, 2012Applicant: SONY CORPORATIONInventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Hiroyuki Uchida
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Publication number: 20120001280Abstract: Provided is a highly-sensitive Hall element capable of eliminating an offset voltage without increasing the chip size. The Hall element includes: a Hall sensing portion having a shape of a cross and four convex portions; Hall voltage output terminals which are arranged at the centers of the front edges of the four convex portions, respectively; and control current input terminals which are arranged on side surfaces of each of the convex portions independently of the Hall voltage output terminals. In this case, the Hall voltage output terminal has a small width and the control current input terminal has a large width.Type: ApplicationFiled: June 30, 2011Publication date: January 5, 2012Inventors: Takaaki Hioka, Toshihiko Omi
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Patent number: 8089112Abstract: The present invention makes it possible to obtain: a semiconductor device capable of forming a highly reliable upper wire without a harmful influence on the properties of the magnetic material for an MTJ device; and the manufacturing method thereof. Plasma treatment is applied with reducible NH3 or H2 as pretreatment. Thereafter, a tensile stress silicon nitride film to impose tensile stress on an MTJ device is formed over a clad layer and over an interlayer dielectric film where the clad layer is not formed. Successively, a compressive stress silicon nitride film to impose compressive stress on the MTJ device is formed over the tensile stress silicon nitride film. The conditions for forming the tensile stress silicon nitride film and the compressive stress silicon nitride film are as follows: a parallel plate type plasma CVD apparatus is used; the RF power is set in the range of 0.03 to 0.4 W/cm2; and the film forming temperature is set in the range of 200° C. to 350° C.Type: GrantFiled: March 22, 2011Date of Patent: January 3, 2012Assignee: Renesas Electronics CorporationInventors: Tatsunori Murata, Mikio Tsujiuchi
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Publication number: 20110316103Abstract: Disclosed herein is a storage element, including: a storage layer configured to retain information based on a magnetization state of a magnetic material; and a magnetization pinned layer configured to be provided for the storage layer with intermediary of a tunnel barrier layer, wherein the tunnel barrier layer has a thickness not less than or equal to 0.1 nm to not more than or equal to 0.6 nm and interface roughness less than 0.5 nm, and information is stored in the storage layer through change in direction of magnetization of the storage layer by applying a current in a stacking direction and injecting a spin-polarized electron.Type: ApplicationFiled: June 17, 2011Publication date: December 29, 2011Applicant: SONY CORPORATIONInventors: Hiroyuki Uchida, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Kazutaka Yamane