Abstract: A magnetoresistive device having a magnetic junction including a first fixed magnetic layer structure, a second fixed magnetic layer structure, and a free magnetic layer structure, wherein the first second and free magnetic layer structures are arranged one over the other. The first second and free magnetic layer structures have respective magnetization orientations configured to orient in a direction at least substantially perpendicular to a plane defined by an interface between the free magnetic layer structure and either one of the first fixed magnetic layer structure or the second fixed magnetic layer structure. The respective magnetization orientations of the first and the second fixed magnetic layer structures are oriented anti-parallel to each other, and the first fixed magnetic layer structure is a static fixed magnetic layer structure having a switching field that is larger than a switching field of the free magnetic layer structure.

Abstract: A magnetic device includes a magnetic layer having a variable direction of magnetisation, and a first antiferromagnetic layer in contact with the magnetic layer, the first antiferromagnetic layer being able to trap the direction of magnetisation of the magnetic layer. The magnetic device also includes a layer made of a ferromagnetic material in contact with the first antiferromagnetic layer through its face opposite to the magnetic layer, the directions of magnetisation of the magnetic and ferromagnetic layers being substantially perpendicular. A first layer among the magnetic and ferromagnetic layers has a magnetisation, the direction of which is oriented in the plane of the first layer whereas the second of the two layers among the magnetic and ferromagnetic layers has a magnetisation, the direction of which is oriented outside of the plane of the second layer.

Abstract: Disclosed is a method for bonding semiconductor substrates, wherein an eutectic alloy does run off the bonding surfaces during the eutectic bonding. Also disclosed is an MEMS device which is obtained by bonding semiconductor substrates by this method. Specifically, a substrate (11) and a substrate (21) are eutectically bonded with each other by pressing and heating the substrate (11) and the substrate (21), while interposing an aluminum-containing layer (31) and a germanium layer (32) between a bonding part (30a) of the substrate (11) and a bonding part (30b) of the substrate (21) in such a manner that the aluminum-containing layer (31) and the germanium layer (32) overlap each other, with an outer edge (32a) of the germanium layer (32) being inwardly set back from the an outer edge (31a) of the aluminum-containing layer (31).

Abstract: A STT-MRAM integration scheme is disclosed wherein the connection between a MTJ and CMOS metal is simplified by forming an intermediate via contact (VAC) on a CMOS landing pad, a metal (VAM) pad that contacts and covers the VAC, and a MTJ on the VAM. A dual damascene process is performed to connect BIT line metal to CMOS landing pads through VAC/VAM/MTJ stacks in a device region, and to connect BIT line connection pads to CMOS connection pads through BIT connection vias outside the device region. The VAM pad is a single layer or composite made of Ta, TaN, or other conductors which serves as a diffusion barrier, has a highly smooth surface for MTJ formation, and provides excellent selectivity with refill dielectric materials during a chemical mechanical polish process. Each VAC is from 500 to 3000 Angstroms thick to minimize additional circuit resistance and minimize etch burden.

Abstract: Provided are an ultrafast magnetic recording element and a nonvolatile magnetic random access memory using the same. The magnetic recording element includes a read electrode, a magnetic pinned layer formed on the read electrode, and an insulating layer or a conductive layer formed on the magnetic pinned layer. The magnetic recording element includes a magnetic free layer formed on the insulating layer or the conductive layer, in which a magnetic vortex is formed, and a plurality of drive electrodes applying a current or magnetic field to the magnetic free layer. According to the magnetic recording elements, the magnetic recording element with a simple structure can be realized using a magnetic layer with a magnetic vortex formed, and the magnetic recording element can be accurately driven with low power using a plurality of drive electrodes.

Abstract: Magnetic devices and methods of fabricating the same are provided. According to the magnetic device, a tunnel barrier pattern is interposed between a first magnetic pattern and a second magnetic pattern. An edge portion of the tunnel barrier pattern is thicker than a central portion of the tunnel barrier pattern. The central portion of the tunnel barrier pattern has a substantially uniform thickness.

Abstract: A MTJ for a spintronic device is disclosed and includes a thin seed layer that enhances perpendicular magnetic anisotropy (PMA) in an overlying laminated layer with a (Co/X)n or (CoX)n composition where n is from 2 to 30, X is one of V, Rh, Ir, Os, Ru, Au, Cr, Mo, Cu, Ti, Re, Mg, or Si, and CoX is a disordered alloy. A CoFeB layer may be formed between the laminated layer and a tunnel barrier layer to serve as a transitional layer between a (111) laminate and (100) MgO tunnel barrier. The laminated layer may be used as a reference layer, dipole layer, or free layer in a MTJ. Annealing between 300° C. and 400° C. may be used to further enhance PMA in the laminated layer.

Abstract: An apparatus that includes a magnetic structure including a reference layer; and a free layer; an exchange coupling spacer layer; and a stabilizing layer, wherein the exchange coupling spacer layer is between the magnetic structure and the stabilizing layer and exchange couples the free layer of the magnetic structure to the stabilizing layer.

Abstract: The invention provides a TMR read sensor with low-contact-resistance metal/metal, metal/oxide and oxide/metal interfaces. The low-contact-resistance metal/metal interfaces in a reference or sense layer structure are in-situ formed in a high-vacuum deposition module of a sputtering system, without exposures to low vacuum in a transfer module and damages caused by a plasma treatment conducted in an etching module. The low-contact-resistance metal/oxide interface is formed by utilizing a thin Co—Fe—B reference layer and a thick Co—Fe reference layer to reduce boron diffusion and segregation caused by annealing. The low-contact-resistance oxide/metal interface is formed by replacing a Co—Fe—B sense layer with a Co-rich Co—Fe sense layer to eliminate boron diffusion and segregation caused by annealing. With the low-contact-resistance metal/metal, metal/oxide and oxide/metal interfaces, the TMR read sensor exhibits a junction resistance-area product of below 0.

Abstract: A magnetic layer that includes a seed layer comprising at least tantalum and a free magnetic layer comprising at least iron. The free magnetic layer is grown on top of the seed layer and the free magnetic layer is perpendicularly magnetized. The magnetic layer may be included in a magnetic tunnel junction (MTJ) stack.

Abstract: A semiconductor device includes a substrate including an M2 patterned area. A VA pillar structure is formed over the M2 patterned area. The VA pillar structure includes a substractively patterned metal layer. The VA pillar structure is a sub-lithographic contact. An MTJ stack is formed over the oxide layer and the metal layer of the VA pillar. A size of the MTJ stack and a shape anisotropy of the MTJ stack are independent of a size and a shape anisotropy of the sub-lithographic contact.

Abstract: A memory cell including magnetic materials and heating materials, and methods of programming the memory cell are provided. The memory cell includes a free region, a pinned region, and a heating region configured to generate and transfer heat to the free region when a programming current is directed to the cell. The heat transferred from the heating region increases the temperature of the free region, which decreases the magnetization and the critical switching current density of the free region. In some embodiments, the heating region may also provide a current path to the free region, and the magnetization of the free region may be switched according to the spin polarity of the programming current, programming the memory cell to a high resistance state or a low resistance state.

Abstract: Disclosed is a magnetic tunnel junction structure having perpendicular anisotropic free layers, and it could be accomplished to reduce a critical current value required for switching and maintain thermal stability even if a device is fabricated small in size, by maintaining the magnetization directions of the free magnetic layer and the fixed magnetic layer constituting the magnetic tunnel junction structure perpendicular to each other.

Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared by the following steps. A single-crystalline MgO (001) substrate 11 is prepared. An epitaxial Fe(001) lower electrode (a first electrode) 17 with the thickness of 50 nm is grown on a MgO(001) seed layer 15 at room temperature, followed by annealing under ultrahigh vacuum (2×10?8 Pa) and at 350° C. A MgO(001) barrier layer 21 with the thickness of 2 nm is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) with the thickness of 10 nm is then formed on the MgO(001) barrier layer 21 at room temperature. This is successively followed by the deposition of a Co layer 21 with the thickness of 10 nm on the Fe(001) upper electrode (the second electrode) 23.

Abstract: A magnetoresistive device having a magnetic junction is provided.

Abstract: Spin Torque Transfer (STT) memory cell structures and methods are described herein. One or more STT memory cell structures comprise an annular STT stack including a nonmagnetic material between a first ferromagnetic material and a second ferromagnetic material and a soft magnetic material surrounding at least a portion of the annular STT stack.

Abstract: A magnetic tunnel junction element is provided. The magnetic tunnel junction element has first magnetic layer and second magnetic layer formed adjacent, e.g., on lower and upper portions of an insulating layer, respectively and each having a perpendicular magnetic anisotropy, a magnetic field adjustment layer formed on the second magnetic layer and having a perpendicular magnetic anisotropy, and a bather layer formed between the magnetic field adjustment layer and the second magnetic layer. The second magnetic layer and the magnetic field adjustment layer are magnetically decoupled from each other.

Abstract: A MTJ for a spintronic device is disclosed and includes a thin seed layer that enhances perpendicular magnetic anisotropy (PMA) in an overlying laminated layer with a (Co/Ni)n composition or the like where n is from 2 to 30. The seed layer is preferably NiCr, NiFeCr, Hf, or a composite thereof with a thickness from 10 to 100 Angstroms. Furthermore, a magnetic layer such as CoFeB may be formed between the laminated layer and a tunnel barrier layer to serve as a transitional layer between a (111) laminate and (100) MgO tunnel barrier. There may be a Ta insertion layer between the CoFeB layer and laminated layer to promote (100) crystallization in the CoFeB layer. The laminated layer may be used as a reference layer, dipole layer, or free layer in a MTJ. Annealing between 300° C. and 400° C. may be used to further enhance PMA in the laminated layer.

Abstract: A semiconductor memory device includes an isolation layer formed in a substrate and defining an active region, a trench formed in the substrate and defining a part of the active region as an active pillar; a word line formed inside the trench, a sub-source line formed under the trench and crossing the word line, a main source line formed over the substrate, coupled to the sub-source line, and crossing the word line, a variable resistor pattern formed over the active pillar, and a bit line contacting the variable resistor pattern and crossing the word line.

Abstract: A memory includes a semiconductor substrate. Magnetic tunnel junction elements are provided above the semiconductor substrate. Each of the magnetic tunnel junction elements stores data by a change in a resistance state, and the data is rewritable by a current. Cell transistors are provided on the semiconductor substrate. Each of the cell transistors is in a conductive state when the current is applied to the corresponding magnetic tunnel junction element. Gate electrodes are included in the respective cell transistors. Each of the gate electrodes controls the conductive state of the corresponding cell transistor. In active areas, the cell transistors are provided, and the active areas extend in an extending direction of intersecting the gate electrodes at an angle of (90-a tan(?)) degrees.

Abstract: A spintronic device and a method for making said spintronic device. The spintronic device includes an epitaxial crystalline ferromagnetic oxide formed directly on the semiconductor material thereby allowing spin-polarized current to be efficiently injected from the ferromagnetic oxide into the semiconductor material. A host crystal lattice includes multiple sets of stacked oxide layers of material A and B of a perovskite structure with a formula of ABO3. After an oxide layer of B is grown, magnetic ions are introduced to intermix with the B material, which may replace some of the ions of the B material. The process of growing additional stacked oxide layers of material A and B and introducing further magnetic ions after the deposition of the oxide layer of B continues until enough magnetic ions are sufficiently close to one another that they align in the same direction thereby forming a ferromagnetic oxide on the semiconductor material.

Abstract: An integrated passive component having a semiconductor body, arranged on a metal substrate and having a first surface, and a plurality of metal surfaces formed on the surface, a passivation layer formed on the surface, an integrated circuit formed near the surface of the semiconductor body, whereby the integrated circuit is connected to metal surfaces via traces formed below the passivation layer, a part of the metal surfaces is connected to pins via bonding wires, a first part of a first coil, the part formed in part above the semiconductor body, whereby the first coil with a plurality of turns has a longitudinal axis formed substantially parallel to the surface of the semiconductor body, and a second part of the first coil is formed below the semiconductor body.

Abstract: A magnetoresistive effect element includes: a magnetization free layer having an invertible magnetization; an insulating layer being adjacent to the magnetization free layer; and a magnetization fixed layer being adjacent to the insulation layer and in an opposite side of the insulation layer to the magnetization free layer. The magnetization free layer includes: a first magnetization free layer being adjacent to the insulating layer and comprising Fe or Co; and a second magnetization free layer being adjacent to the first magnetization layer and comprising NiFeB.

Abstract: A magnetic element is disclosed that has a composite free layer with a FM1/moment diluting/FM2 configuration wherein FM1 and FM2 are magnetic layers made of one or more of Co, Fe, Ni, and B and the moment diluting layer is used to reduce the perpendicular demagnetizing field. As a result, lower resistance x area product and higher thermal stability are realized when perpendicular surface anisotropy dominates shape anisotropy to give a magnetization perpendicular to the planes of the FM1, FM2 layers. The moment diluting layer may be a non-magnetic metal like Ta or a CoFe alloy with a doped non-magnetic metal. A perpendicular Hk enhancing layer interfaces with the FM2 layer and may be an oxide to increase the perpendicular anisotropy field in the FM2 layer. The magnetic element may be part of a spintronic device or serve as a propagation medium in a domain wall motion device.

Abstract: A MTJ in an MRAM array is disclosed with a composite free layer having a FL1/FL2/FL3 configuration where FL1 and FL2 are crystalline magnetic layers and FL3 is an amorphous NiFeX layer for improved bit switching performance. FL1 layer is CoFe which affords a high magnetoresistive (MR) ratio when forming an interface with a MgO tunnel barrier. FL2 is Fe to improve switching performance. NiFeX thickness where X is Hf is preferably between 20 to 40 Angstroms to substantially reduce bit line switching current and number of shorted bits. Annealing at 330° C. to 360° C. provides a high MR ratio of 190%. Furthermore, low Hc and Hk are simultaneously achieved with improved bit switching performance and fewer shorts without compromising other MTJ properties such as MR ratio. As a result of high MR ratio and lower bit-to-bit resistance variation, higher reading margin is realized.

Abstract: An integrated passive component having a semiconductor body, arranged on a metal substrate and having a first surface, and a plurality of metal surfaces formed on the surface, a passivation layer formed on the surface, an integrated circuit formed near the surface of the semiconductor body, whereby the integrated circuit is connected to metal surfaces via traces formed below the passivation layer, a part of the metal surfaces is connected to pins via bonding wires, and a first coil formed above the passivation layer, whereby the first coil with a plurality of turns has a longitudinal axis formed substantially parallel to the surface of the semiconductor body, and in a lower part of the first coil, said part which is formed substantially parallel to the longitudinal axis of the coil on the surface of the semiconductor body, parts of a plurality of turns are formed as sections of traces.

Abstract: An apparatus is provided for bidirectional writing. A stack includes a reference layer on a tunnel barrier, the tunnel barrier on a free layer, and the free layer on a metal spacer. The apparatus includes an insulating magnet. A Peltier material is thermally coupled to the insulating magnet and the stack. When the Peltier/insulating magnet interface is cooled, the insulating magnet is configured to transfer a spin torque to rotate a magnetization of the free layer in a first direction. When the Peltier/insulating magnet interface is heated, the insulating magnet is configured to transfer the spin torque to rotate the magnetization of the free layer in a second direction.

Abstract: A memory device includes a lower electrode formed on a substrate, and an information storage unit formed on the lower electrode. The information storage unit includes a plurality of information storage layers spaced apart from one another. Each of the plurality of information storage layers is an information unit. A method of manufacturing a memory device uses a porous film to form the plurality of information storage layers.

Abstract: A STTMRAM element includes a magnetic tunnel junction (MTJ) having a perpendicular magnetic orientation. The MTJ includes a barrier layer, a free layer formed on top of the barrier layer and having a magnetic orientation that is perpendicular and switchable relative to the magnetic orientation of the fixed layer. The magnetic orientation of the free layer switches when electrical current flows through the STTMRAM element. A switching-enhancing layer (SEL), separated from the free layer by a spacer layer, is formed on top of the free layer and has an in-plane magnetic orientation and generates magneto-static fields onto the free layer causing the magnetic moments of the outer edges of the free layer to tilt with an in-plane component while minimally disturbing the magnetic moment at the center of the free layer to ease the switching of the free layer and to reduce the threshold voltage/current.

Abstract: According to one embodiment, a magnetic random access memory includes a first gate electrode and a second gate electrode arranged at a predetermined pitch in a first direction, and extending in a second direction perpendicular to the first direction, a first magnetoresistive element formed above a portion between the first gate electrode and the second gate electrode, an electrode layer formed in a position higher than the first magnetoresistive element, and formed to have a distance which is a half of the pitch from the first magnetoresistive element in the first direction, an interconnection formed in a position higher than the electrode layer, and extending in the first direction, and a first via which connects the first magnetoresistive element and the interconnection, and the electrode layer and the interconnection, by using one conductive layer.

Abstract: A magnetic memory element includes: a first magnetization free layer; a non-magnetic layer; a reference layer; a first magnetization fixed layer group; and a first blocking layer. The first magnetization free layer is composed of ferromagnetic material with perpendicular magnetic anisotropy and includes a first magnetization fixed region, a second magnetization fixed region and a magnetization free region. The non-magnetic layer is provided near the first magnetization free layer. The reference layer is composed of ferromagnetic material and provided on the non-magnetic layer. The first magnetization fixed layer group is provided near the first magnetization fixed region. The first blocking layer is provided being sandwiched between the first magnetization fixed layer group and the first magnetization fixed region or in the first magnetization fixed layer group.

Abstract: A magnetoresistive effect element includes a first ferromagnetic layer, Cr layer, Heusler alloy layer, barrier layer, and second ferromagnetic layer. The first ferromagnetic layer has the body-centered cubic lattice structure. The Cr layer is formed on the first ferromagnetic layer and has the body-centered cubic lattice structure. The Heusler alloy layer is formed on the Cr layer. The barrier layer is formed on the Heusler alloy layer. The second ferromagnetic layer is formed on the barrier layer.

Abstract: A magnetoresistive element includes a first underlying layer having an NaCl structure and containing a nitride orienting in a (001) plane, a first magnetic layer provided on the first underlying layer, having magnetic anisotropy perpendicular to a film surface, having an L10 structure, and containing a ferromagnetic alloy orienting in a (001) plane, a first nonmagnetic layer provided on the first magnetic layer, and a second magnetic layer provided on the first nonmagnetic layer and having magnetic anisotropy perpendicular to a film surface.

Abstract: An MRAM has a pinned layer and a magnetic recording layer connected to the pinned layer through a tunnel barrier layer. The magnetic recording layer has a first free layer, a second free layer being in contact with the tunnel barrier layer, and an intermediate layer provided between the first free layer and the second free layer. The first free layer includes a magnetization switching region whose magnetization direction can be switched by domain wall motion method. The second free layer has no domain wall. The intermediate layer is formed to cover at least the magnetization switching region. The magnetization switching region and the second free layer are magnetically coupled to each other through the intermediate layer.

Abstract: A magnetostrictive-piezoelectric multiferroic single- or multi-domain nanomagnet whose magnetization can be rotated through application of an electric field across the piezoelectric layer has a structure that can include either a shape-anisotropic mangnetostrictive nanomagnet with no magnetocrystalline anisotropy or a circular nanomagnet with biaxial magnetocrystalline anisotropy with dimensions of nominal diameter and thickness. This structure can be used to write and store binary bits encoded in the magnetization orientation, thereby functioning as a memory element, or perform both Boolean and non-Boolean computation, or be integrated with existing magnetic tunneling junction (MTJ) technology to perform a read operation by adding a barrier layer for the MTJ having a high coercivity to serve as the hard magnetic layer of the MTJ, and electrical contact layers of a soft material with small Young's modulus.

Abstract: A magnetic junction usable in a magnetic memory and a method for providing the magnetic memory are described. The method includes providing a pinned layer, providing an engineered nonmagnetic tunneling barrier layer, and providing a free layer. The pinned layer and the free layer each include at least one ferromagnetic layer. The engineered nonmagnetic tunneling barrier layer has a tuned resistance area product. In some aspects, the step of providing the engineered nonmagnetic tunneling barrier layer further includes radio-frequency depositing a first oxide layer, depositing a metal layer, and oxidizing the metal layer to provide a second oxide.

Abstract: A magnetic tunnel junction (MTJ) includes a magnetic free layer, having a variable magnetization direction; an insulating tunnel barrier located adjacent to the free layer; a magnetic fixed layer having an invariable magnetization direction, the fixed layer disposed adjacent the tunnel barrier such that the tunnel barrier is located between the free layer and the fixed layer, wherein the free layer and the fixed layer have perpendicular magnetic anisotropy; and one or more of: a composite fixed layer, the composite fixed layer comprising a dusting layer, a spacer layer, and a reference layer; a synthetic antiferromagnetic (SAF) fixed layer structure, the SAF fixed layer structure comprising a SAF spacer located between the fixed layer and a second fixed magnetic layer; and a dipole layer, wherein the free layer is located between the dipole layer and the tunnel barrier.

Abstract: A magnetoresistive read sensor is described. The sensor is a magnetically responsive stack positioned between top and bottom electrodes on an air bearing surface. Current in the sensor is confined to regions close to the air bearing surface by a first multilayer insulator structure between the stack and at least one electrode to enhance reader sensitivity.

Abstract: A spin transport device includes a semiconductor layer 3, a first ferromagnetic layer 1 provided on the semiconductor layer 3 via a first tunnel barrier layer 5A, and a second ferromagnetic layer 2 provided on the semiconductor layer 3 via a second tunnel barrier layer 5B to be spaced from the first ferromagnetic layer 1, and the semiconductor layer 3 includes a first region RI broadening in a direction away from the first ferromagnetic layer 1 along a direction orthogonal to a thickness direction from the first ferromagnetic layer 1, and a second region R12 extending in a direction toward the second ferromagnetic layer 2 along the direction orthogonal to the thickness direction from the first ferromagnetic layer 1. The second region R12 has a relatively higher impurity concentration than the first region R1.

Abstract: A magnetic cell includes a ferromagnetic free layer having a free magnetization orientation direction and a first ferromagnetic pinned reference layer having a first reference magnetization orientation direction that is parallel or anti-parallel to the free magnetization orientation direction. A first oxide barrier layer is between the ferromagnetic free layer and the first ferromagnetic pinned reference layer. The magnetic cell further includes a second ferromagnetic pinned reference layer having a second reference magnetization orientation direction that is orthogonal to the first reference magnetization orientation direction. The ferromagnetic free layer is between the first ferromagnetic pinned reference layer and the second ferromagnetic pinned reference layer.

Abstract: A magnetic tunnel junction includes an amorphous ferromagnetic reference layer having a first reference layer side and an opposing second reference layer side. The first reference layer side has a greater concentration of boron than the second reference layer side. A magnesium oxide tunnel barrier layer is disposed on the second side of the amorphous ferromagnetic reference layer. The magnesium oxide tunnel barrier layer has a crystal structure. An amorphous ferromagnetic free layer is disposed on the magnesium oxide tunnel barrier layer.

Abstract: A magnetoresistive element (and method of fabricating the magnetoresistive element) that includes a free ferromagnetic layer comprising a first reversible magnetization direction directed substantially perpendicular to a film surface, a pinned ferromagnetic layer comprising a second fixed magnetization direction directed substantially perpendicular to the film surface, and a nonmagnetic insulating tunnel barrier layer disposed between the free ferromagnetic layer and the pinned ferromagnetic layer, wherein the free ferromagnetic layer, the tunnel barrier layer, and the pinned ferromagnetic layer have a coherent body-centered cubic (bcc) structure with a (001) plane oriented, and a bidirectional spin-polarized current passing through the coherent structure in a direction perpendicular to the film surface reverses the magnetization direction of the free ferromagnetic layer.

Abstract: A method and system provide a magnetic junction usable in a magnetic device. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, a free layer, and at least one damping reduction layer. The free layer has an intrinsic damping constant. The nonmagnetic spacer layer is between the pinned layer and the free layer. The at least one damping reduction layer is adjacent to at least a portion of the free layer and configured to reduce the intrinsic damping constant of the free layer. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction.

Abstract: Spin torque magnetic memory elements that have a pinned layer, two free layers, and a current-blocking insulating layer proximate to at least one of the free layers. The resistive state (e.g., low resistance or high resistance) of the memory elements is altered by passing electric current through the element in one direction. In other words, to change from a low resistance to a high resistance, the direction of electric current is the same as to change from a high resistance to a low resistance. The elements have a unidirectional write scheme.

Abstract: A magnetic tunnel junction cell having a free layer, a ferromagnetic pinned layer, and a barrier layer therebetween. The free layer has a central ferromagnetic portion and a stabilizing portion radially proximate the central ferromagnetic portion. The construction can be used for both in-plane magnetic memory cells where the magnetization orientation of the magnetic layer is in the stack film plane and out-of-plane magnetic memory cells where the magnetization orientation of the magnetic layer is out of the stack film plane, e.g., perpendicular to the stack plane.

Abstract: A device (20, 90) includes sensors (28, 30) that sense different physical stimuli. A pressure sensor (28) includes a reference element (44) and a sense element (52), and an inertial sensor (30) includes a movable element (54). Fabrication (110) entails forming (112) a first substrate structure (22, 92) having a cavity (36, 100), forming a second substrate structure (24) to include the sensors (28, 30), and coupling (128) the substrate structures so that the first sensor (28) is aligned with the cavity (36, 100) and the second sensor (30) is laterally spaced apart from the first sensor (28). Forming the second structure (24) includes forming (118) the sense element (52) from a material layer (124) of the second structure (24) and following coupling (128) of the substrate structures, concurrently forming (132) the reference element (44) and the movable element (54) in a wafer substrate (122) of the second structure (24).

Abstract: Embodiments relate to IC current sensors fabricated using thin-wafer manufacturing technologies. Such technologies can include processing in which dicing before grinding (DBG) is utilized, which can improve reliability and minimize stress effects. While embodiments utilize face-up mounting, face-down mounting is made possible in other embodiments by via through -contacts. IC current sensor embodiments can present many advantages while minimizing drawbacks often associated with conventional IC current sensors.

Abstract: Techniques for reducing damage in memory cells are provided. Memory cell structures are typically formed using dry etch and/or planarization processes which damage certain regions of the memory cell structure. In one or more embodiments, certain regions of the cell structure may be sensitive to damage. For example, the free magnetic region in magnetic memory cell structures may be susceptible to demagnetization. Such regions may be substantially confined by barrier materials during the formation of the memory cell structure, such that the edges of such regions are protected from damaging processes. Furthermore, in some embodiments, a memory cell structure is formed and confined within a recess in dielectric material.

Abstract: A magnetic memory device comprises a first electrode, a second electrode, a laminated structure comprising plural first magnetic layers being provided between the first electrode and the second electrode, a second magnetic layer comprising different composition elements from that of the first magnetic layer and being provided between plural first magnetic layers, a piezoelectric body provided on a opposite side to a side where the first electrode is provided in the laminated structure, and a third electrode applying voltage to the piezoelectric body and provided on a different position from a position where the first electrode is provided in the piezoelectric body.

Abstract: A spin-transfer torque memory unit includes a free magnetic layer having a magnetic easy axis; a reference magnetic element having a magnetization orientation that is pinned in a reference direction; an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the magnetic reference element; and a compensation element adjacent to the free magnetic layer. The compensation element applies a bias field on the magnetization orientation of the free magnetic layer. The bias field is formed of a first vector component parallel to the easy axis of the free magnetic layer and a second vector component orthogonal to the easy axis of the free magnetic layer. The bias field reduces a write current magnitude required to switch the direction of the magnetization orientation of the free magnetic layer.