Doping Superlattice (e.g., Nipi Superlattice) (epo) Patents (Class 257/E31.036)
  • Patent number: 9029832
    Abstract: The invention provides a Group III nitride semiconductor light-emitting device in which the strain in the light-emitting layer is relaxed, thereby attaining high light emission efficiency, and a method for producing the device. The light-emitting device of the present invention has a substrate, a low-temperature buffer layer, an n-type contact layer, a first ESD layer, a second ESD layer, an n-side superlattice layer, a light-emitting layer, a p-side superlattice layer, a p-type contact layer, an n-type electrode N1, a p-type electrode P1, and a passivation film F1. The second ESD layer has pits X having a mean pit diameter D. The mean pit diameter D is 500 ? to 3,000 ?. An InGaN layer included in the n-side superlattice layer has a thickness Y satisfying the following condition: ?0.029×D+82.8?Y??0.029×D+102.8.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: May 12, 2015
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Koji Okuno, Atsushi Miyazaki
  • Patent number: 8987757
    Abstract: Disclosed are a light emitting device and a lighting system having the same. The light emitting device includes a first conductivity-type semiconductor layer, an interfacial layer including at least two superlattice structures adjacent to the first conductivity-type semiconductor layer, an active layer adjacent to the interfacial layer, and a second conductivity-type semiconductor layer adjacent to the active layer. The first conductivity-type semiconductor layer, interfacial layer, active layer, and second conductivity-type semiconductor layer are stacked in a same direction, the first and second semiconductor layer are of different conductivity types, an energy band gap of the superlattice structure adjacent to the active layer is smaller than an energy band gap of the superlattice structure adjacent to the first conductivity-type semiconductor layer.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: March 24, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventors: Yong Tae Moon, Dae Seob Han, Jeong Sik Lee
  • Patent number: 8841741
    Abstract: A high breakdown voltage diode of the present embodiment includes a first conductive semiconductor substrate, a drift layer formed on the first conductive semiconductor substrate and formed of a first conductive semiconductor, a buffer layer formed on the drift layer and formed of a second conductive semiconductor, a second conductive high concentration semiconductor region formed at an upper portion of the buffer layer, a mesa termination unit formed on an end region of a semiconductor apparatus to relax an electric field of the end region when reverse bias is applied between the semiconductor substrate and the buffer layer, and an electric field relaxation region formed at the mesa termination unit and formed of a second conductive semiconductor. A breakdown voltage of a high breakdown voltage diode, in which a pn junction is provided to a semiconductor layer, is increased, and a process yield is improved.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: September 23, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masamu Kamaga, Makoto Mizukami, Takashi Shinohe
  • Patent number: 8803128
    Abstract: A composite material is described. The composite material comprises semiconductor nanocrystals, and organic molecules that passivate the surfaces of the semiconductor nanocrystals. One or more properties of the organic molecules facilitate the transfer of charge between the semiconductor nanocrystals. A semiconductor material is described that comprises p-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of electrons in the semiconductor material being greater than or equal to a mobility of holes. A semiconductor material is described that comprises n-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of holes in the semiconductor material being greater than or equal to a mobility of electrons.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: August 12, 2014
    Assignee: InVisage Technologies, Inc.
    Inventors: Edward Hartley Sargent, Ghada Koleilat, Larissa Levina
  • Patent number: 8759816
    Abstract: A composite material is described. The composite material comprises semiconductor nanocrystals, and organic molecules that passivate the surfaces of the semiconductor nanocrystals. One or more properties of the organic molecules facilitate the transfer of charge between the semiconductor nanocrystals. A semiconductor material is described that comprises p-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of electrons in the semiconductor material being greater than or equal to a mobility of holes. A semiconductor material is described that comprises n-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of holes in the semiconductor material being greater than or equal to a mobility of electrons.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: June 24, 2014
    Assignee: InVisage Technologies, Inc.
    Inventors: Edward Hartley Sargent, Keith William Johnston, Andras Geza Pattantyus-Abraham, Jason Paul Clifford
  • Patent number: 8642434
    Abstract: While embedded silicon germanium alloy and silicon carbon alloy provide many useful applications, especially for enhancing the mobility of MOSFETs through stress engineering, formation of alloyed silicide on these surfaces degrades device performance. The present invention provides structures and methods for providing unalloyed silicide on such silicon alloy surfaces placed on semiconductor substrates. This enables the formation of low resistance contacts for both mobility enhanced PFETs with embedded SiGe and mobility enhanced NFETs with embedded Si:C on the same semiconductor substrate. Furthermore, this invention provides methods for thick epitaxial silicon alloy, especially thick epitaxial Si:C alloy, above the level of the gate dielectric to increase the stress on the channel on the transistor devices.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: February 4, 2014
    Assignee: International Business Machines Corporation
    Inventors: Yaocheng Liu, Dureseti Chidambarrao, Oleg Gluschenkov, Judson R. Holt, Renee T. Mo, Kern Rim
  • Patent number: 8492746
    Abstract: A light emitting diode (LED) die includes a wavelength conversion layer having a base material, and a plurality of particles embedded in the base material including wavelength conversion particles, and reflective particles. A method for fabricating light emitting diode (LED) dice includes the steps of mixing the wavelength conversion particles in the base material to a first weight percentage, mixing the reflective particles in the base material to a second weight percentage, curing the base material to form a wavelength conversion layer having a selected thickness, and attaching the wavelength conversion layer to a die.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: July 23, 2013
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventor: Jui-Kang Yen
  • Patent number: 8476616
    Abstract: A composite material is described. The composite material comprises semiconductor nanocrystals, and organic molecules that passivate the surfaces of the semiconductor nanocrystals. One or more properties of the organic molecules facilitate the transfer of charge between the semiconductor nanocrystals. A semiconductor material is described that comprises p-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of electrons in the semiconductor material being greater than or equal to a mobility of holes. A semiconductor material is described that comprises n-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of holes in the semiconductor material being greater than or equal to a mobility of electrons.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: July 2, 2013
    Assignee: InVisage Technologies, Inc.
    Inventors: Edward Hartley Sargent, Ghada Koleilat, Larissa Levina
  • Patent number: 8421058
    Abstract: A light emitting diode structure and a method of forming a light emitting diode structure are provided. The structure includes a superlattice comprising, a first barrier layer; a first quantum well layer comprising a first metal-nitride based material formed on the first barrier layer; a second barrier layer formed on the first quantum well layer; and a second quantum well layer including the first metal-nitride based material formed on the second barrier layer; and wherein a difference between conduction band energy of the first quantum well layer and conduction band energy of the second quantum well layer is matched to a single or multiple longitudinal optical phonon energy for reducing electron kinetic energy in the superlattice.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: April 16, 2013
    Assignee: Agency for Science, Technology and Research
    Inventors: Wei Liu, Chew Beng Soh, Soo Jin Chua, Jing Hua Teng
  • Patent number: 8415192
    Abstract: A composite material is described. The composite material comprises semiconductor nanocrystals, and organic molecules that passivate the surfaces of the semiconductor nanocrystals. One or more properties of the organic molecules facilitate the transfer of charge between the semiconductor nanocrystals. A semiconductor material is described that comprises p-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of electrons in the semiconductor material being greater than or equal to a mobility of holes. A semiconductor material is described that comprises n-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of holes in the semiconductor material being greater than or equal to a mobility of electrons.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: April 9, 2013
    Assignee: InVisage Technologies, Inc.
    Inventors: Edward Hartley Sargent, Jiang Tang
  • Patent number: 8247793
    Abstract: Provided are a ZnO-based thin film and a ZnO-based semiconductor device which allow: reduction in a burden on a manufacturing apparatus; improvement of controllability and reproducibility of doping; and obtaining p-type conduction without changing a crystalline structure. In order to be formed into a p-type ZnO-based thin film, a ZnO-based thin film is formed by employing as a basic structure a superlattice structure of a MgZnO/ZnO super lattice layer 3. This superlattice component is formed with a laminated structure which includes acceptor-doped MgZnO layers 3b and acceptor-doped ZnO layers 3a. Hence, it is possible to improve controllability and reproducibility of the doping, and to prevent a change in a crystalline structure due to a doping material.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: August 21, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Ken Nakahara, Shunsuke Akasaka, Masashi Kawasaki, Akira Ohtomo, Atsushi Tsukazaki
  • Publication number: 20120145996
    Abstract: A superlattice-based infrared absorber and the matching electron-blocking and hole-blocking unipolar barriers, absorbers and barriers with graded band gaps, high-performance infrared detectors, and methods of manufacturing such devices are provided herein. The infrared absorber material is made from a superlattice (periodic structure) where each period consists of two or more layers of InAs, InSb, InSbAs, or InGaAs. The layer widths and alloy compositions are chosen to yield the desired energy band gap, absorption strength, and strain balance for the particular application. Furthermore, the periodicity of the superlattice can be “chirped” (varied) to create a material with a graded or varying energy band gap.
    Type: Application
    Filed: August 3, 2011
    Publication date: June 14, 2012
    Applicant: California Institute of Technology
    Inventors: David Z. Ting, Arezou Khoshakhlagh, Alexander Soibel, Cory J. Hill, Sarath D. Gunapala
  • Publication number: 20110294252
    Abstract: Lateral collection architecture for a photodetector is achieved by depositing electrically conducting SLS layers onto a planar substrate and diffusing dopants of a carrier type opposite that of the layers through the layers at selected regions to disorder the superlattice and create diode junctions oriented transversely to the naturally enhanced lateral mobility of photogenerated charge carriers within the superlattice. The diode junctions are terminated at a top surface of the photodetector within an SLS layer of wide bandgap material to minimize unwanted currents. A related architecture disorders the superlattice of topmost SLS layers by diffusing therethrough a dopant configured as a grid and penetrating to a lower SLS layer having the same carrier type as the dopant and opposite that of the topmost layers to isolate pixels within the topmost layers. Ohmic contacts may be deposited on doped regions, pixels, and substrate to provide desired external connections.
    Type: Application
    Filed: August 8, 2011
    Publication date: December 1, 2011
    Inventors: William E. Tennant, Gerard J. Sullivan, Mark Field
  • Patent number: 8022391
    Abstract: A composite material is described. The composite material comprises semiconductor nanocrystals, and organic molecules that passivate the surfaces of the semiconductor nanocrystals. One or more properties of the organic molecules facilitate the transfer of charge between the semiconductor nanocrystals. A semiconductor material is described that comprises p-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of electrons in the semiconductor material being greater than or equal to a mobility of holes. A semiconductor material is described that comprises n-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of holes in the semiconductor material being greater than or equal to a mobility of electrons.
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: September 20, 2011
    Assignee: InVisage Technologies, Inc.
    Inventors: Edward Hartley Sargent, Ghada Koleilat, Jiang Tang, Keith William Johnston, Andras Geza Pattantyus-Abraham, Gerasimos Konstantatos, Ethan Jacob Dukenfield Klem, Stefan Myrskog, Dean Delehanty MacNeil, Jason Paul Clifford, Larissa Levina
  • Patent number: 8022390
    Abstract: A photodetector for detecting infrared light in a wavelength range of 3-25 ?m is disclosed. The photodetector has a mesa structure formed from semiconductor layers which include a type-II superlattice formed of alternating layers of InAs and InxGa1-xSb with 0?x?0.5. Impurity doped regions are formed on sidewalls of the mesa structure to provide for a lateral conduction of photo-generated carriers which can provide an increased carrier mobility and a reduced surface recombination. An optional bias electrode can be used in the photodetector to control and vary a cut-off wavelength or a depletion width therein. The photodetector can be formed as a single-color or multi-color device, and can also be used to form a focal plane array which is compatible with conventional read-out integrated circuits.
    Type: Grant
    Filed: August 17, 2007
    Date of Patent: September 20, 2011
    Assignee: Sandia Corporation
    Inventors: Jin K. Kim, Malcolm S. Carroll
  • Patent number: 7786468
    Abstract: A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) or a SiGe on Si heterostructure is described incorporating growing epitaxial Si1-yGey layers on a semiconductor substrate, smoothing surfaces by Chemo-Mechanical Polishing, bonding two substrates together via thermal treatments and transferring the SiGe layer from one substrate to the other via highly selective etching using SiGe itself as the etch-stop. The transferred SiGe layer may have its upper surface smoothed by CMP for epitaxial deposition of relaxed Si1-yGey, and strained Si1-yGey depending upon composition, strained Si, strained SiC, strained Ge, strained GeC, and strained Si1-yGeyC or a heavily doped layer to make electrical contacts for the SiGe/Si heterojunction diodes.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: August 31, 2010
    Assignee: International Business Machines Corporation
    Inventors: Jack O. Chu, David R. DiMilia, Lijuan Huang
  • Publication number: 20090224227
    Abstract: A type-II InAs/GaSb superlattice photodiode for optimizing quantum efficiency without reducing the differential resistance area product at zero bias. The photodiode features a GaSb: Be buffer, a In/GaSb: Be superlattice, a p-type doped ? region, a InAs: Si/GaSb doped region, and a InAs: Si doped contact layer. The In/GaSb: Be superlattice and InAs: Si/GaSb doped region each having a thickness about two times greater than the thickness of the GaSb: Be buffer. The photodiode in one embodiment featuring a composition of InAs and GaSb with InSb forced interfaces, the composition suitable for being grown on GaSb wafers with a molecular beam epitaxy reactor. A method of optimizing quantum efficiency in a type-II InAs/GaSb superlattice photodiode having a 100% cutoff wavelength around 12 ?m is further provided herewith.
    Type: Application
    Filed: March 6, 2008
    Publication date: September 10, 2009
    Inventor: Manijeh Razeghi
  • Patent number: 7427773
    Abstract: A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) or a SiGe on Si heterostructure is described incorporating growing epitaxial Si1?yGey layers on a semiconductor substrate, smoothing surfaces by Chemo-Mechanical Polishing, bonding two substrates together via thermal treatments and transferring the SiGe layer from one substrate to the other via highly selective etching using SiGe itself as the etch-stop. The transferred SiGe layer may have its upper surface smoothed by CMP for epitaxial deposition of relaxed Si1?yGey, and strained Si1?yGey depending upon composition, strained Si, strained SiC, strained Ge, strained GeC, and strained Si1?yGeyC or a heavily doped layer to make electrical contacts for the SiGe/Si heterojunction diodes.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: September 23, 2008
    Assignee: International Business Machines Corporation
    Inventors: Jack Oon Chu, David R. DiMilia, Lijuan Huang