Characterized By Semiconductor Body Shape, Relative Size, Or Disposition Of Semiconductor Regions (epo) Patents (Class 257/E31.032)
  • Patent number: 11799040
    Abstract: A solar cell including: a substrate having front and back surfaces, the back surface includes first, second and gap regions, the first and second regions are staggered and spaced from each other in a first direction, and each gap region is provided between one first region and one second region adjacent thereto by recessing toward interior of the substrate; a first conductive layer formed over the first region; a second conductive layer formed over the second region, the second conductive layer has a conductivity type opposite to the first conductive layer; a first electrode forming electrical contact with the first conductive layer; a second electrode forming electrical contact with the second conductive layer; and a boundary region between the gap region and the first and/or second conductive layer adjacent thereto, and a line-pattern concave and convex texture structure is formed on the back surface corresponding to the boundary region.
    Type: Grant
    Filed: August 2, 2022
    Date of Patent: October 24, 2023
    Assignees: Zhejiang Jinko Solar Co., Ltd., Jinko Solar Co., Ltd.
    Inventors: Xiu Feng, Menglei Xu, Jie Yang, Xinyu Zhang
  • Patent number: 10830952
    Abstract: A photonic structure can include in one aspect one or more waveguides formed by patterning of waveguiding material adapted to propagate light energy. Such waveguiding material may include one or more of silicon (single-, poly-, or non-crystalline) and silicon nitride.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: November 10, 2020
    Assignee: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK
    Inventors: Douglas Coolbaugh, Thomas Adam, Gerald L. Leake
  • Patent number: 9729246
    Abstract: An optical functional device equivalent to a 2×2 Mach-Zehnder optical switch is produced by forming two 3 dB couplers and input/output waveguides on a substrate. Two optical phase modulation paths are formed on corresponding waveguides between 3 dB couplers. A channel region having an opposite electric polarity is formed between source and drain regions, having the predetermined electric polarity, formed on the substrate. The optical phase modulation path is insulated from the surrounding area and disposed above the channel region. Additionally, a control electrode (i.e. a gate region) subjected to high-density doping is formed above the optical phase modulation path. By applying an electric voltage having the predetermined polarity to the control electrode, the source region, and the drain region, it is possible to generate hot carriers, in proximity to the optical phase modulation path, so as to accumulate charges and change a refractive index, thus setting a desired light-wave input/output path.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: August 8, 2017
    Assignee: NEC CORPORATION
    Inventor: Masashige Ishizaka
  • Patent number: 9372307
    Abstract: A method of forming monolithically integrated III-V optoelectronics with a silicon complementary metal-oxide-semiconductor (CMOS) device. The method may include; forming a buried waveguide in a buried oxide (BOX) layer of a semiconductor-on-insulator (SOI) substrate; forming a first optoelectronic device and a second optoelectronic device adjacent to the buried waveguide; and forming a CMOS device on a semiconductor layer above the BOX layer.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: June 21, 2016
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana
  • Patent number: 9040428
    Abstract: Hemispheres and spheres are formed and employed for a plurality of applications. Hemispheres are employed to form a substrate having an upper surface and a lower surface. The upper surface includes peaks of pillars which have a base attached to the lower surface. The peaks have a density defined at the upper surface by an array of hemispherical metal structures that act as a mask during an etch to remove substrate material down to the lower surface during formation of the pillars. The pillars are dense and uniform and include a microscale average diameter. The spheres are formed as independent metal spheres or nanoparticles for other applications.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: May 26, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Augustin J. Hong, Woo-Shik Jung, Jeehwan Kim, Jae-Woong Nahum, Devendra K. Sadana
  • Patent number: 9041047
    Abstract: An exemplary embodiment described technology relates generally to an organic light emitting diode (OLED) display and a manufacturing method thereof. The organic light emitting diode (OLED) display according to an exemplary embodiment includes: a substrate; an encapsulation member; an organic light emitting element between the substrate and the encapsulation member; a middle sealing member including one side disposed between the substrate and the encapsulation member and another side extended from the one side to be bent and enclosing an edge of the encapsulation member; a first sealant sealing and combining the one side of the middle sealing member and the substrate to each other; a second sealant sealing and combining the other side of the middle sealing member and the encapsulation member to each other; and a getter at the one side of the middle sealing member and the encapsulation member.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: May 26, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Valeriy Prushinskiy, Won-Sik Hyun, Heung-Yeol Na, Min-Soo Kim, Beohm-Rock Choi
  • Patent number: 9035410
    Abstract: An avalanche photodiode detector is provided. The avalanche photodiode detector comprises an absorber region having an absorption layer for receiving incident photons and generating charged carriers; and a multiplier region having a multiplication layer; wherein the multiplier region is on a mesa structure separate from the absorber region and is coupled to the absorber region by a bridge for transferring charged carriers between the absorber region and multiplier region.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: May 19, 2015
    Assignee: THE BOEING COMPANY
    Inventors: Ping Yuan, Joseph C. Boisvert, Dmitri D. Krut, Rengarajan Sudharsanan
  • Patent number: 9029688
    Abstract: Disclosed is a photovoltaic device. The photovoltaic device includes: a substrate; a first electrode placed on the substrate; a second electrode which is placed opposite to the first electrode and which light is incident on; a first unit cell being placed between the first electrode and the second electrode, and including an intrinsic semiconductor layer including crystalline silicon grains making the surface of the intrinsic semiconductor layer toward the second electrode textured; and a second unit cell placed between the first unit cell and the second electrode.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: May 12, 2015
    Assignee: Intellectual Discovery Co., Ltd.
    Inventor: Seung-Yeop Myong
  • Patent number: 9029179
    Abstract: A method for producing a MEMS device having improved charge elimination characteristics includes providing a substrate having one or more layers, and applying a first charge elimination layer onto at least one portion of one given layer of the substrate. The method may then (1) apply a sacrificial layer onto the first charge elimination layer, (2) apply a second charge elimination layer onto at least a portion of the sacrificial layer, and (3) deposit a movable layer onto at least a portion of the second charge elimination layer. To form a structure within the movable layer the method may etch the movable layer. The method may then etch the sacrificial layer to release the structure.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: May 12, 2015
    Assignee: Analog Devices, Inc.
    Inventors: Fang Liu, Kuang L. Yang
  • Patent number: 8946545
    Abstract: Disclosed is a photovoltaic device. The photovoltaic device includes: a substrate; a first electrode placed on the substrate; a second electrode which is placed opposite to the first electrode and which light is incident on; a first unit cell being placed between the first electrode and the second electrode, and including an intrinsic semiconductor layer including crystalline silicon grains making the surface of the intrinsic semiconductor layer toward the second electrode textured; and a second unit cell placed between the first unit cell and the second electrode.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: February 3, 2015
    Assignee: Intellectual Discovery Co., Ltd.
    Inventor: Seung-Yeop Myong
  • Patent number: 8941145
    Abstract: Systems and methods for dry eteching a photodetector array based on InAsSb are provided. A method for fabricating an array of photodetectors includes receiving a pattern of an array of photodetectors formed from InAsSb, the pattern including at least one trench defined between adjacent photodetectors, and dry etching the at least one trench with a plasma including BrCl3 and Ar.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: January 27, 2015
    Assignee: The Boeing Company
    Inventor: Pierre-Yves Delaunay
  • Patent number: 8921968
    Abstract: Solar cells and methods for their manufacture are disclosed. An example solar cell may comprise a substrate comprising a p-type base layer and an n-type selective emitter layer formed over the p-type base layer. The n-type selective emitter layer may comprise one or more first doped regions comprising implanted dopant and one or more second doped regions comprising diffused dopant. The one or more first doped regions may be more heavily doped than the one or more second doped regions. A p-n junction may be formed at the interface of the base layer and the selective emitter layer, such that the p-n junction and the selective emitter layer are both formed during a single anneal cycle.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: December 30, 2014
    Assignee: Suniva, Inc.
    Inventors: Ajeet Rohatgi, Vijay Yelundur, Preston Davis, Vinodh Chandrasekaran, Ben Damiani
  • Patent number: 8889463
    Abstract: A method for manufacturing a sloped structure is disclosed. The method includes the steps of: (a) forming a sacrificial film above a substrate; (b) forming a first film above the sacrificial film, the first film having a first portion connected to the substrate, a second portion located above the sacrificial film, a third portion located between the first portion and the second portion, and a thin region in a portion of the third portion or in a boundary section between the second portion and the third portion and having a thickness smaller than the first portion; (c) removing the sacrificial film; and (d) bending the first film in the thin region, after the step (c), thereby sloping the second portion of the first film with respect to the substrate.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: November 18, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Takahiko Yoshizawa
  • Patent number: 8877543
    Abstract: A method for fabricating a dye-sensitized solar cell is provided. The dye-sensitized solar cell includes a photo electrode including (a) mixing a TiO2 powder, a Zn-containing compound and an alkaline aqueous solution to form a mixture and performing a thermal process on the mixture to form a Zn-doped TiO2 powder; (b) mixing a binder solution with the Zn-doped TiO2 powder to form a paste; (c) coating the paste on a first electrode, and the paste is sintered to form a Zn-doped TiO2 porous layer, wherein the Zn-doped TiO2 porous layer and the first electrode construct a photo electrode; (d) disposing a second electrode opposite to the photo electrode after a dye is absorbed by the Zn-doped TiO2 porous layer; and (e) disposing an electrolyte between the photo electrode and the second electrode.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: November 4, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-De Lu, Yung-Liang Tung, Kai-Ping Wang, Hsisheng Teng, Po-Tsung Hsiao
  • Patent number: 8860164
    Abstract: A light receiving element includes a core configured to propagate a signal light, a first semiconductor layer having a first conductivity type, the first semiconductor layer being configured to receive the signal light from the core along a first direction in which the core extends, an absorbing layer configured to absorb the signal light received by the first semiconductor layer, and a second semiconductor layer having a second conductivity type opposite to the first conductivity type.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: October 14, 2014
    Assignee: Fujitsu Limited
    Inventor: Kazumasa Takabayashi
  • Patent number: 8829337
    Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The cells are based on nanometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications in space, commercial, residential, and industrial applications.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: September 9, 2014
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut Kumar Dutta
  • Patent number: 8829634
    Abstract: The invention is an optoelectronic device comprising an active portion which converts light to electricity or converts electricity to light, the active portion having a front side for the transmittal of the light and a back side opposite from the front side, at least two electrical leads to the active portion to convey electricity to or from the active portion, an enclosure surrounding the active portion and through which the at least two electrical leads pass wherein the hermetically sealed enclosure comprises at the front side of the active portion a barrier material which allows for transmittal of light, one or more getter materials disposed so as to not impede the transmission of light to or from the active portion, and a contiguous gap pathway to the getter material which pathway is disposed between the active portion and the barrier material.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: September 9, 2014
    Assignee: Dow Global Technologies LLC
    Inventors: Jeffrey E. Bonekamp, Michelle L. Boven, Ryan S. Gaston
  • Patent number: 8822255
    Abstract: A method of manufacturing a solar cell, which includes an edge deletion step using a laser beam, and a manufacturing apparatus which is used in such a method, the method and the apparatus being capable of preventing a shunt and cracks from being generated are provided. By radiating a first laser beam to a multilayer body, which includes a transparent electrode layer, a photoelectric conversion layer, and a back electrode layer sequentially formed on a transparent substrate, from a side of the transparent substrate, the photoelectric conversion layer and the back electrode layer in a first region are removed, and by radiating a second laser beam into the region such that the second laser beam is spaced from a peripheral rim of the region, the transparent electrode layer in a second region is removed.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: September 2, 2014
    Assignee: Ulvac, Inc.
    Inventors: Yoshiaki Yamamoto, Hitoshi Ikeda, Tomoki Ohnishi, Kouichi Tamagawa
  • Patent number: 8816457
    Abstract: The present disclosure provides various embodiments of an image sensor device. An exemplary image sensor device includes an image sensing region disposed in a substrate; a multilayer interconnection structure disposed over the substrate; and a color filter formed in the multilayer interconnection structure and aligned with the image sensing region. The color filter has a length and a width, where the length is greater than the width.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: August 26, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jyh-Ming Hung, Jen-Cheng Liu, Dun-Nian Yaung, Chun-Chieh Chuang
  • Patent number: 8803272
    Abstract: A semiconductor device includes: a P-type semiconductor substrate; a first P-type semiconductor layer formed on the P-type semiconductor substrate; a second P-type semiconductor layer formed on the first P-type semiconductor layer and having a lower P-type impurity concentration than the first P-type semiconductor layer; an N-type semiconductor layer, which will form a cathode region, formed on the second P-type semiconductor layer; a first P-type diffusion layer formed by diffusing a P-type impurity in a partial region of the second P-type semiconductor layer; a second P-type diffusion layer formed by diffusing a P-type impurity in the second P-type semiconductor layer so as to be present adjacently beneath the first P-type diffusion layer at a lower P-type impurity concentration than the first P-type diffusion layer; and a photodiode formed in such a manner that the N-type semiconductor layer and the first P-type diffusion layer are isolated from each other.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: August 12, 2014
    Assignee: Sony Corporation
    Inventors: Hiroshi Yumoto, Shuji Yoneda, Tomokazu Mukai, Katsuhiko Takeuchi
  • Patent number: 8791359
    Abstract: Novel structures of photovoltaic cells (also called as solar cells) are provided. The cells are based on nanoparticles or nanometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators, and may be metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications such as in space, commercial, residential and industrial applications.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: July 29, 2014
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut Kumar Dutta
  • Patent number: 8790949
    Abstract: A solid state imaging device includes: a substrate; a photoelectric conversion unit that is formed on the substrate to generate and accumulate signal charges according to light quantity of incident light; a vertical transmission gate electrode that is formed to be embedded in a groove portion formed in a depth direction from one side face of the substrate according to a depth of the photoelectric conversion unit; and an overflow path that is formed on a bottom portion of the transmission gate to overflow the signal charges accumulated in the photoelectric conversion unit.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: July 29, 2014
    Assignee: Sony Corporation
    Inventor: Ryosuke Nakamura
  • Patent number: 8785908
    Abstract: Optically sensitive devices include a device comprising a first contact and a second contact, each having a work function, and an optically sensitive material between the first contact and the second contact. The optically sensitive material comprises a p-type semiconductor, and the optically sensitive material has a work function. Circuitry applies a bias voltage between the first contact and the second contact. The optically sensitive material has an electron lifetime that is greater than the electron transit time from the first contact to the second contact when the bias is applied between the first contact and the second contact. The first contact provides injection of electrons and blocking the extraction of holes. The interface between the first contact and the optically sensitive material provides a surface recombination velocity less than 1 cm/s.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: July 22, 2014
    Assignee: InVisage Technologies, Inc.
    Inventors: Igor Constantin Ivanov, Edward Hartley Sargent, Hui Tian
  • Patent number: 8785926
    Abstract: The semiconductor conductor device includes a gate electrode 106, an oxide semiconductor film 110, a source electrode 114a and a drain electrode 114b, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface 214a of the source electrode and a second side surface 214b of the drain electrode opposite to the first side surface 214a. The oxide semiconductor film has a side surface which overlaps with the gate electrode, which has a first high resistance region positioned between a first region 206a that is the nearest to one end 314a of the first side surface 214a and a second region 206b that is the nearest to one end 314b of the second side surface 214b. The first high resistance region has a corrugated side surface or the like.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: July 22, 2014
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Masatoshi Yokoyama, Tsutomu Murakawa, Kenichi Okazaki, Masayuki Sakakura, Takuya Matsuo, Yosuke Kanzaki, Hiroshi Matsukizono, Yoshitaka Yamamoto
  • Patent number: 8778719
    Abstract: The linear semiconductor substrate 1 or 2 of the present invention comprises at least one desired thin film 4 formed on a linear substrate 3 having a length ten or more times greater than a width, thickness, or diameter of the linear substrate itself. Adopting semiconductor as the thin film 4 forms a linear semiconductor thin film. The linear semiconductor substrate 1 or 2 of the present invention is produced by utilizing a fiber-drawing technique which is a fabricating technique of optical fibers.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: July 15, 2014
    Assignee: Furukawa Electric Co., Ltd.
    Inventors: Toshihiro Nakamura, Nobuaki Orita, Hisashi Koaizawa, Kenkichi Suzuki, Hiroshi Kuraseko, Michio Kondo
  • Patent number: 8766393
    Abstract: A photodetector is formed from a body of semiconductor material substantially surrounded by dielectric surfaces. A passivation process is applied to at least one surface to reduce the rate of carrier generation and recombination on that surface. Photocurrent is read out from at least one electrical contact, which is formed on a doped region whose surface lies entirely on a passivated surface. Unwanted leakage current from un-passivated surfaces is reduced through one of the following methods: (a) The un-passivated surface is separated from the photo-collecting contact by at least two junctions; (b) The un-passivated surface is doped to a very high level, at least equal to the conduction band or valence band density of states of the semiconductor; (c) An accumulation or inversion layer is formed on the un-passivated surface by the application of an electric field.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: July 1, 2014
    Assignee: Infrared Newco, Inc.
    Inventors: Conor S. Rafferty, Clifford A. King
  • Patent number: 8759873
    Abstract: A bispectral detector comprising upper and lower semiconductor layers of a first conductivity type in order to absorb a first and a second electromagnetic spectrum, separated by an intermediate layer that forms a barrier; semiconductor zones of a second conductivity type implanted in upper layer and lower layer and each implanted at least partially in the bottom of an opening that passes through upper layer and intermediate layer; and conductor elements connected to semiconductor zones. At least that part of each opening that passes through upper layer is separated from the latter by a semiconductor cap layer: whereof the concentration of dopants of the second conductivity type is greater than 1017 cm?3; and whereof the thickness is chosen as a function of said concentration so that it exceeds the minority carrier diffusion length in the cap layer.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: June 24, 2014
    Assignee: Commissariat a l'Energie Atomique et Aux Energies Alternatives
    Inventors: Olivier Gravrand, Jacques Baylet
  • Patent number: 8741684
    Abstract: Disclosed are methods for co-integration of active and passive photonic devices on a planarized silicon-based photonics substrate. In one aspect, a method is disclosed that includes providing a planarized silicon-based photonics substrate comprising a silicon waveguide structure, depositing a dielectric layer over the planarized silicon-based photonics substrate, selectively etching the dielectric layer, thereby exposing at least a portion of the silicon waveguide structure, selectively etching the exposed portion of the silicon waveguide structure to form a template, using the silicon waveguide structure as a seed layer to selectively grow in the template a germanium layer that extends above the dielectric layer, and planarizing the germanium layer to form a planarized germanium layer, wherein the planarized germanium layer does not extend above the dielectric layer.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: June 3, 2014
    Assignees: IMEC, Universiteit Gent
    Inventors: Wim Bogaerts, Joris Van Campenhout, Peter Verheyen, Philippe Absil
  • Patent number: 8742413
    Abstract: In a photosensor and a method of manufacturing the same, the photosensor comprises: an intrinsic silicon layer formed on a substrate; a P-type doped region formed in a same plane with the intrinsic silicon layer; and an oxide semiconductor layer formed on or under the intrinsic silicon layer, and overlapping an entire region of the intrinsic silicon layer.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: June 3, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae-Hwan Oh, Won-Kyu Lee, Seong-Hyun Jin, Young-Jin Chang, Jae-Beom Choi
  • Patent number: 8710488
    Abstract: A first exemplary device has a substrate, a nanowire and a doped epitaxial layer surrounding the nanowire. The nanowire is configured to be both a channel to transmit wavelengths up to a selective wavelength. The first exemplary device may further have an active element to detect the wavelengths up to the selective wavelength transmitted through the nanowire. A second exemplary device has a substrate, a nanowire and one or more photogates surrounding the nanowire. The nanowire is configured to be both a channel to transmit wavelengths up to a selective wavelength. The second exemplary device may have an active element to detect the wavelengths up to the selective wavelength transmitted through the nanowire. The one or more photogates comprise an epitaxial layer.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: April 29, 2014
    Assignee: Zena Technologies, Inc.
    Inventors: Young-June Yu, Munib Wober
  • Patent number: 8698208
    Abstract: A manufacturing method of a photoelectric conversion device comprises a first step of forming a gate electrode, a second step of forming a semiconductor region of a first conductivity type, a third step of forming an insulation film, and a fourth step of forming a protection region of a second conductivity type, which is the opposite conductivity type to the first conductivity type, by implanting ions in the semiconductor region using the gate electrode of the transfer transistor and a portion covering a side face of the gate electrode of the transfer transistor of the insulation film as a mask in a state in which the semiconductor substrate and the gate electrode of the transfer transistor are covered by the insulation film, and causing a portion of the semiconductor region of the first conductivity type from which the protection region is removed to be the charge accumulation region.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: April 15, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryuichi Mishima, Mineo Shimotsusa, Hiroaki Naruse
  • Patent number: 8697500
    Abstract: A method for manufacturing a solid-state image sensor includes forming a gate electrode structure including a gate electrode on a gate insulating film formed on a semiconductor substrate, and implanting ions into a first region and simultaneously implanting the ions into a second region of the semiconductor substrate via the gate electrode structure and the gate insulating film, wherein the first region is a region where a charge accumulation region is to be formed, and the second region is a region where an extended region that extends from the charge accumulation region to a portion below the gate electrode is to be formed, and a mean projected range of the ions in the step of simultaneous implanting of the ions into the first region and the second region is larger than a sum total of thicknesses of the gate electrode and the gate insulating film.
    Type: Grant
    Filed: October 19, 2011
    Date of Patent: April 15, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Junji Iwata
  • Patent number: 8692347
    Abstract: A solid-state imaging device includes: a gate electrode arranged over an upper surface of a semiconductor substrate; a photoelectric conversion portion formed over the semiconductor substrate to position under the gate electrode; an overflow barrier formed over the semiconductor substrate to position in a portion other than a position facing the gate electrode in a planar direction and adjoin a side face of the photoelectric conversion portion; and a drain formed over the semiconductor substrate to adjoin a side face of the overflow barrier opposite to a side face adjoining the photoelectric conversion portion.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: April 8, 2014
    Assignee: Sony Corporation
    Inventor: Sosuke Narisawa
  • Patent number: 8685858
    Abstract: Hemispheres and spheres are formed and employed for a plurality of applications. Hemispheres are employed to form a substrate having an upper surface and a lower surface. The upper surface includes peaks of pillars which have a base attached to the lower surface. The peaks have a density defined at the upper surface by an array of hemispherical metal structures that act as a mask during an etch to remove substrate material down to the lower surface during formation of the pillars. The pillars are dense and uniform and include a microscale average diameter. The spheres are formed as independent metal spheres or nanoparticles for other applications.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: April 1, 2014
    Assignee: International Business Machines Corporation
    Inventors: Augustin J. Hong, Woo-Shik Jung, Jeehwan Kim, Jae-Woong Nah, Devendra K. Sadana
  • Patent number: 8686529
    Abstract: The present invention is directed toward a dual junction photodiode semiconductor devices with improved wavelength sensitivity. The photodiode employs a high quality n-type layer with relatively lower doping concentration and enables high minority carrier lifetime and high quantum efficiency with improved responsivity at multiple wavelengths. In one embodiment, the photodiode comprises a semiconductor substrate of a first conductivity type, a first impurity region of a second conductivity type formed epitaxially in the semiconductor substrate, a second impurity region of the first conductivity type shallowly formed in the epitaxially formed first impurity region, a first PN junction formed between the epitaxially formed first impurity region and the second impurity region, a second PN junction formed between the semiconductor substrate and the epitaxially formed first impurity region, and at least one passivated V-groove etched into the epitaxially formed first impurity region and the semiconductor substrate.
    Type: Grant
    Filed: January 19, 2010
    Date of Patent: April 1, 2014
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja, Manoocher Mansouri Aliabadi
  • Patent number: 8674358
    Abstract: There has been such a problem that radiation detecting elements using semiconductor elements have a low radiation detection efficiency, since the radiation detecting elements easily transmit radiation, even though the radiation detecting elements have merits, such as small dimensions and light weight. Disclosed are a radiation detecting element and a radiation detecting device, wherein a film formed of a metal, such as tungsten, is formed on the radiation incident surface of the radiation detecting element, and the incident energy of the radiation is attenuated. The efficiency of generating carriers by way of radiation incidence is improved by attenuating the incident energy, the thickness of the metal film is optimized, and the radiation detection efficiency is improved.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: March 18, 2014
    Inventor: Takehisa Sasaki
  • Patent number: 8664734
    Abstract: A hole-based ultra-deep photodiode in a CMOS image sensor and an associated process are disclosed. A p-type substrate is grounded or connected to a negative power supply. An n-type epitaxial layer is grown on the p-type substrate, and is connected to a positive power supply. An ultra-deep p-type photodiode implant region is formed in the n-type epitaxial layer. Thermal steps are added to insure a smooth and deep doping profile.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: March 4, 2014
    Assignee: Himax Imaging, Inc.
    Inventors: Yang Wu, Feixia Yu
  • Patent number: 8664523
    Abstract: A solar cell employs an optical fiber and semiconductor nanowires grown around the fiber. A p-n junction based design, organic-inorganic heterojunction, or a dye-sensitized structure is built at the surfaces of the nanowires. Light entering the fiber from a tip propagates through the fiber until it enters a nanowire where it reaches a photovoltaic element. Light entering the fiber cannot escape until it interacts with a photovoltaic element, thereby increasing the solar conversion efficiency. The fiber can transmit light, while the nanowires around the fibers increase the surface area of light exposure.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: March 4, 2014
    Assignee: Georgia Tech Research Corporation
    Inventors: Zhong L. Wang, Benjamin Weintraub, Yaguang Wei
  • Patent number: 8647915
    Abstract: A hetero-junction device and fabrication method in which phase-separated n-type and p-type semiconductor pillars define vertically-oriented p-n junctions extending above a substrate. Semiconductor materials are selected for the p-type and n-type pillars that are thermodynamically stable and substantially insoluble in one another. An epitaxial deposition process is employed to form the pillars on a nucleation layer and the mutual insolubility drives phase separation of the materials. During the epitaxial deposition process, the orientation is such that the nucleation layer initiates propagation of vertical columns resulting in a substantially ordered, three-dimensional structure throughout the deposited material.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: February 11, 2014
    Assignees: UT-Battelle, LLC, University of Tennessee Research Foundation
    Inventors: Tolga Aytug, David K. Christen, Mariappan Parans Paranthaman, Özgur Polat
  • Patent number: 8642373
    Abstract: Disclosed is a method for manufacturing a photovoltaic device that includes: providing a substrate having a first electrode formed thereon; forming a first unit cell, the first unit cell including a first conductive silicon layer, an intrinsic silicon layer and a second conductive silicon layer, which are sequentially stacked from the first electrode; exposing to the air either a portion of an intermediate reflector formed on the first unit cell or the second conductive silicon layer of the first unit cell; forming the rest of the intermediate reflector or the entire intermediate reflector on the second conductive silicon layer of the first unit cell in a second manufacturing system; and forming a second unit cell on the intermediate reflector in the second manufacturing system, the second unit cell including a first conductive silicon layer, an intrinsic silicon layer and a second conductive silicon layer, sequentially stacked.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: February 4, 2014
    Assignee: Intellectual Discovery Co., Ltd.
    Inventor: Seung-Yeop Myong
  • Patent number: 8637951
    Abstract: A semiconductor light receiving element comprises: a substrate, a semiconductor layer of a first conductivity type formed on the substrate, a non-doped semiconductor light absorbing layer formed on the semiconductor layer of the first conductivity type, a semiconductor layer of a second conductivity type formed on the non-doped semiconductor light absorbing layer, and an electro-conductive layer formed on the semiconductor layer of the second conductivity type. A plurality of openings, periodically arrayed, are formed in a laminated body composed of the electro-conductive layer, the semiconductor layer of the second conductivity type, and the non-doped semiconductor light absorbing layer. The widths of the openings are less than or equal to the wavelength of incident light, and the openings pass through the electro-conductive layer and the semiconductor layer of the second conductivity type to reach the non-doped semiconductor light absorbing layer.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: January 28, 2014
    Assignee: NEC Corporation
    Inventors: Daisuke Okamoto, Junichi Fujikata, Kenichi Nishi
  • Patent number: 8629347
    Abstract: Novel structures of photovoltaic cells (also known as solar cells) are provided. The Cells are based on the nanometer-scaled wire, tubes, and/or rods, which are made of the electronics materials covering semiconductors, insulator or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells can have also high radiation tolerant capability. These cells will have enormous applications such as in space, in commercial, residential and industrial applications.
    Type: Grant
    Filed: September 30, 2012
    Date of Patent: January 14, 2014
    Assignee: Banpil Photonics, Inc.
    Inventors: Nobuhiko P. Kobayashi, Achyut K. Dutta
  • Patent number: 8624107
    Abstract: Novel structures of photovoltaic cells (also known as solar cells) are provided. The Cells are based on the nanometer-scaled wire, tubes, and/or rods, which are made of the electronics materials covering semiconductors, insulator or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells can have also high radiation tolerant capability. These cells will have enormous applications such as in space, in commercial, residential and industrial applications.
    Type: Grant
    Filed: September 30, 2012
    Date of Patent: January 7, 2014
    Assignee: Banpil Photonics, Inc.
    Inventors: Nobuhiko P. Kobayashi, Achyut K. Dutta
  • Patent number: 8624108
    Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The cells are based on nanometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications in space, commercial, residential, and industrial applications.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: January 7, 2014
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut K. Dutta
  • Publication number: 20130320358
    Abstract: A semiconductor device is manufactured by forming at least one epitaxial structure over a substrate. A portion of the substrate is cut and lifted to expose a partial surface of the epitaxial structure. A first electrode is then formed on the exposed partial surface to result in a vertical semiconductor device.
    Type: Application
    Filed: July 2, 2012
    Publication date: December 5, 2013
    Applicant: PHOSTEK, INC.
    Inventor: Yuan-Hsiao CHANG
  • Publication number: 20130298973
    Abstract: One embodiment of the present invention provides a tunneling junction solar cell. The solar cell includes a base layer, an emitter layer situated adjacent to the shallow counter doping layer, a surface field layer situated adjacent to a side of the base layer opposite to the shallow counter doping layer, a front-side electrode, and a back-side electrode. The base layer includes a shallow counter doping layer having a conduction doping type that is opposite to a remainder of the base layer. The emitter layer has a bandgap that is wider than that of the base layer.
    Type: Application
    Filed: August 31, 2012
    Publication date: November 14, 2013
    Applicant: SILEVO, INC.
    Inventors: Zhigang Xie, Jiunn Benjamin Heng, Jianming Fu, Zheng Xu
  • Patent number: 8574951
    Abstract: A process of manufacturing the interdigitated back-contact solar cell, with the use of screen printing or spraying and the use of chemical etching, forms the trenches for the P-type electrode on the back of the substrate for making the solar cell. The time-consuming process of photolithography (for example, at least two steps of high-temperature diffusion) can be avoided. Furthermore, only one machine for printing and etching is needed to form the structure of the interdigitated back-contact solar cell. The present invention can make the whole process time-efficient and low-cost to enhance the efficiency of the solar cell, fulfilling the demand of mass production.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: November 5, 2013
    Assignee: National Tsing Hua University
    Inventor: Li-karn Wang
  • Patent number: 8536664
    Abstract: A MEMS device can include an actuator, a base formed from a substrate, and a plurality of memory cells integrated with the base. At least a portion of the base can be configured to move in response to the actuator. A miniature camera can include a base comprising a frame, a stage, and a plurality of flexures configured to connect the stage with the frame. The flexures can be adapted to bend to permit the stage to move relative to the frame. The camera can include a plurality of memory cells integrated with the base, a lens mount secured to the stage, a lens barrel secured to the lens mount, an image sensor, and an actuator adapted to move the stage relative to the frame and the image sensor.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: September 17, 2013
    Assignee: DigitalOptics Corporation MEMS
    Inventors: Richard Tsai, Xiaolei Liu
  • Publication number: 20130230944
    Abstract: Methods for doping an absorbent layer of a p-n heterojunction in a thin film photovoltaic device are provided. The method can include depositing a window layer on a transparent substrate, where the window layer includes at least one dopant (e.g., copper). A p-n heterojunction can be formed on the window layer, with the p-n heterojunction including a photovoltaic material (e.g., cadmium telluride) in an absorber layer. The dopant can then be diffused from the window layer into the absorber layer (e.g., via annealing).
    Type: Application
    Filed: March 2, 2012
    Publication date: September 5, 2013
    Applicant: PRIMESTAR SOLAR, INC.
    Inventors: Scott Daniel Feldman-Peabody, Robert Dwayne Gossman
  • Patent number: 8525236
    Abstract: In an example embodiment, an image sensor includes a semiconductor layer and isolation regions disposed in the semiconductor layer. The isolation regions define active regions of the semiconductor layer. The image sensor further includes photoelectric converters disposed in the semiconductor layer and at least one wiring layer disposed over a top surface of the semiconductor layer. The image sensor also includes color filters disposed below a bottom surface of the semiconductor layer and lenses disposed below the color filters. Each lens is arranged to concentrate incoming light into an area spanned by a corresponding photoelectric converter.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: September 3, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Joon-Young Choi