Hybrid Device Containing Photosensitive And Electroluminescent Components Within One Single Body (epo) Patents (Class 257/E31.096)
  • Patent number: 12000959
    Abstract: A proximity sensor includes a substrate, an emitting unit, a receiving unit, a packaging unit and an isolating unit. The emitting unit is disposed on an emitting region of the substrate. The receiving unit is disposed on a receiving region of the substrate. The packaging unit includes a first package body and a second package body. The first package body covers the emitting unit, and the second package body covers the receiving unit. The isolating unit is disposed between the first package body and the second package body. The first package body has a first top surface and a first side surface connected to the first top surface. The light can be emitted out the first top surface or the first side surface, respectively received by a second side surface or the second top surface of the second package body, and detected by the receiving unit.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: June 4, 2024
    Assignee: LITE-ON SINGAPORE PTE. LTD.
    Inventors: Rui-Tao Zheng, Wei Jian Jenson Neo, Teck-Chai Goh, Yu-Hsien Liu
  • Patent number: 11757253
    Abstract: A vertical cavity surface emitting laser (VCSEL) may include an epitaxial structure that includes a first active layer, a second active layer, and a tunnel junction therebetween. The VCSEL may include a set of contacts that are electrically connected to the epitaxial structure. The set of contacts may include three or more contacts, and the set of contacts may be electrically separated from each other on the VCSEL. At least one contact, of the set of contacts, may be electrically connected to the epitaxial structure at a depth between the first active layer and the second active layer.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: September 12, 2023
    Assignee: Lumentum Operations LLC
    Inventor: Benjamin Kesler
  • Patent number: 10872998
    Abstract: The present disclosure relates to a chip size package that enables realization of a compact chip size package in which a solid-state imaging element and a light emitting element are integrated, a method of manufacturing the same, an electronic device, and an endoscope. The chip size package which is an aspect of the present disclosure is provided with a solid-state imaging element which generates a pixel signal according to incident light and a light emitting element which outputs irradiation light according to voltage applied in which the solid-state imaging element and the light emitting element are integrated. The present disclosure is applicable to, for example, a compact electronic device, a medical endoscope, and the like.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: December 22, 2020
    Assignee: SONY CORPORATION
    Inventor: Yoshiaki Masuda
  • Patent number: 9590140
    Abstract: An LED optimized for use in low-cost gas or other non-solid substance detection systems, emitting two wavelengths (“colors”) of electromagnetic radiation from the same aperture is disclosed. The LED device emits a light with a wavelength centered on an absorption line of the target detection non-solid substance, and also emits a reference line with a wavelength that is not absorbed by a target non-solid substance, while both wavelengths are transmitted through the atmosphere with low loss. Since the absorption and reference wavelengths are emitted from the same exact aperture, both wavelengths can share the same optical path, reducing the size and cost of the detector while also reducing potential sources of error due to optical path variation.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: March 7, 2017
    Inventors: Sergey Suchalkin, Gregory Belenky, Leon Shterengas, David Westerfeld
  • Patent number: 9041135
    Abstract: Under one aspect of the present invention, a monolithic sun sensor includes a photosensor; a spacer material disposed over the photosensor; and a patterned mask disposed over the spacer material and defining an aperture over the photosensor. The spacer material has a thickness selected such that the patterned mask casts a shadow onto the photosensor that varies as a function of the monolithic sun sensor's angle relative to the sun. The sun sensor may further include a substrate in which the photosensor is embedded or on which the photosensor is disposed. The spacer material may be transparent, and may include a layer of inorganic oxide, or a plurality of layers of inorganic oxide. The patterned mask may include a conductive material, such as a metal. The aperture may be lithographically defined, and may be square. The sun sensor may further include a transparent overlayer disposed over the patterned mask.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: May 26, 2015
    Assignee: The Aerospace Corporation
    Inventor: Siegfried W. Janson
  • Patent number: 9013023
    Abstract: A photoelectric element includes a first electrode; and a second electrode positioned so as to face the first electrode; and a semiconductor disposed on a face of the first electrode, the face being positioned so as to face the second electrode; and a photosensitizer carried on the semiconductor; and a first charge-transport layer interposed between the first electrode and the second electrode; and a second charge-transport layer interposed between the first charge-transport layer and the second electrode. The first charge-transport layer and the second charge-transport layer contain different oxidation-reduction materials. The oxidation-reduction material in the first charge-transport layer has an oxidation-reduction potential higher than an oxidation-reduction potential of the oxidation-reduction material in the second charge-transport layer.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: April 21, 2015
    Assignees: Panasonic Corporation, Waseda University
    Inventors: Michio Suzuka, Takashi Sekiguchi, Naoki Hayashi, Hiroyuki Nishide, Kenichi Oyaizu, Fumiaki Kato
  • Patent number: 8981517
    Abstract: A solid-state image pickup element 1 is structured so as to include: a semiconductor layer 2 having a photodiode formed therein, photoelectric conversion being carried out in the photodiode; a first film 21 having negative fixed charges and formed on the semiconductor layer 2 in a region in which at least the photodiode is formed; and a second film 22 having the negative fixed charges, made of a material different from that of the first film 21 having the negative fixed charges, and formed on the first film 21 having the negative fixed charges.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: March 17, 2015
    Assignee: Sony Corporation
    Inventors: Itaru Oshiyama, Susumu Hiyama
  • Patent number: 8803273
    Abstract: A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in the well between the source and the drain regions.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: August 12, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eric R. Fossum, Dae-Kil Cha, Young-Gu Jin, Yoon-Dong Park, Soo-Jung Hwang
  • Patent number: 8796811
    Abstract: In a hybrid integrated module, a semiconductor die is mechanically coupled face-to-face to an integrated device in which the substrate has been removed. For example, the integrated circuit may include an optical device fabricated on a silicon-on-insulator (SOI) wafer in which the backside silicon handler has been completely removed, thereby facilitating improved device performance and highly efficient thermal tuning of the operating wavelength of the optical device. Moreover, the semiconductor die may be a VLSI chip that provides power, and serves as a mechanical handler and/or an electrical driver. The thermal tuning efficiency of the substrateless optical device may be enhanced by over 100× relative to an optical device with an intact substrate, and by 5× relative to an optical device in which the substrate has only been removed in proximity to the optical device.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: August 5, 2014
    Assignee: Oracle International Corporation
    Inventors: Ivan Shubin, Ashok V. Krishnamoorthy, John E. Cunningham
  • Patent number: 8785994
    Abstract: An X-ray detector including: a substrate that is divided into a light detection area and a non-detection area and includes a plurality of pixels; a photodiode disposed on the light detection area; a thin film transistor that is disposed on the non-detection area and is electrically connected to a lower portion of the photodiode; a plurality of wires that are electrically connected to the thin film transistor and are positioned on the non-detection area; at least one insulating layer disposed so as to cover at least the thin film transistor and the plurality of wires; a scintillator layer disposed on the at least one insulating layer over an entire surface of the substrate; and a shielding part disposed between the at least one insulating layer and the scintillator layer to shield the non-detection area.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: July 22, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Dong-Hyuk Kim
  • Patent number: 8741684
    Abstract: Disclosed are methods for co-integration of active and passive photonic devices on a planarized silicon-based photonics substrate. In one aspect, a method is disclosed that includes providing a planarized silicon-based photonics substrate comprising a silicon waveguide structure, depositing a dielectric layer over the planarized silicon-based photonics substrate, selectively etching the dielectric layer, thereby exposing at least a portion of the silicon waveguide structure, selectively etching the exposed portion of the silicon waveguide structure to form a template, using the silicon waveguide structure as a seed layer to selectively grow in the template a germanium layer that extends above the dielectric layer, and planarizing the germanium layer to form a planarized germanium layer, wherein the planarized germanium layer does not extend above the dielectric layer.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: June 3, 2014
    Assignees: IMEC, Universiteit Gent
    Inventors: Wim Bogaerts, Joris Van Campenhout, Peter Verheyen, Philippe Absil
  • Patent number: 8723191
    Abstract: An electronic device performing as a light emitting diode and a solar cell, and which comprises: a solar cell unit including a first electrode layer, an energy-level compensation layer formed on the first electrode layer, a photoelectric-conversion layer formed on the energy level compensation layer, and a shared electrode layer formed on the photoelectric-conversion layer; and a light emitting diode unit including the shared electrode layer, and a light emitting layer formed on the shared electrode layer and a second electrode layer formed on the light emitting layer, wherein a LUMO energy-level of the energy-level compensation layer is smaller than a work function of the first electrode layer and is larger than a LUMO energy level of the photoelectric-conversion layer, thereby increasing the generating efficiency of the solar cell unit or the luminous efficiency of the light emitting diode unit due to high electron mobility among the respective layers.
    Type: Grant
    Filed: November 26, 2010
    Date of Patent: May 13, 2014
    Assignee: Gwangju Institute of Science and Technology
    Inventors: Kwanghee Lee, Inwook Hwang, Hongkyu Kang, Geunjin Kim
  • Patent number: 8680640
    Abstract: A solid-state imaging device includes semiconductor substrate; a plurality of photoelectric conversion sections of n-type that are formed at an upper part of semiconductor substrate and arranged in a matrix; output circuit that is formed on a charge detection surface that is one surface of semiconductor substrate and detects charges stored in photoelectric conversion sections; a plurality of isolating diffusion layers of a p-type that are formed under output circuit and include high concentration p-type layers adjacent to respective photoelectric conversion sections; and color filters formed on a light incident surface that is the other surface opposing the one surface of semiconductor substrate and transmit light with different wavelengths. Shapes of respective photoelectric conversion sections correspond to color filters and differ depending on the high concentration p-type layer configuring isolating diffusion layer.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: March 25, 2014
    Assignee: Panasonic Corporation
    Inventors: Mitsuyoshi Mori, Toru Okino, Yutaka Hirose, Yoshihisa Kato
  • Patent number: 8664739
    Abstract: In accordance with the invention, an improved image sensor includes an array of germanium photosensitive elements integrated with a silicon substrate and integrated with silicon readout circuits. The silicon transistors are formed first on a silicon substrate, using well known silicon wafer fabrication techniques. The germanium elements are subsequently formed overlying the silicon by epitaxial growth. The germanium elements are advantageously grown within surface openings of a dielectric cladding. Wafer fabrication techniques are applied to the elements to form isolated germanium photodiodes. Since temperatures needed for germanium processing are lower than those for silicon processing, the formation of the germanium devices need not affect the previously formed silicon devices. Insulating and metallic layers are then deposited and patterned to interconnect the silicon devices and to connect the germanium devices to the silicon circuits.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: March 4, 2014
    Assignee: Infrared Newco, Inc.
    Inventors: Clifford A. King, Conor S. Rafferty
  • Patent number: 8629461
    Abstract: A light emitting device includes: a light emitting unit and a light receiving unit which are provided on a same substrate, wherein the light emitting unit includes an active layer sandwiched between a first clad layer and a second clad layer, a first electrode electrically connected to the first clad layer, and a second electrode electrically connected to the second clad layer.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: January 14, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Yasutaka Imai
  • Publication number: 20130328067
    Abstract: An LED module includes a silicone substrate, an LED grain mounted on a face of the silicone substrate, a temperature sensor formed under the LED grain, a luminous sensor formed close to the LED grain and an encapsulation gel enclosing the LED grain, wherein the LED grain, the luminous sensor and the temperature sensor are electrically connected to electrodes for connection to foreign devices.
    Type: Application
    Filed: September 20, 2012
    Publication date: December 12, 2013
    Applicant: Feng Chia University
    Inventors: Ching-fu TSOU, Cheng-Han Huang, Kuo-Chun Tseng, Sheng-Wei Chang
  • Patent number: 8536625
    Abstract: An electronic image sensor includes a semiconductor substrate having a first surface configured for accepting illumination to a pixel array disposed in the substrate. An electrically-doped channel region for each pixel is disposed at a second substrate surface opposite the first substrate surface. The channel regions are for collecting photogenerated charge in the substrate. An electrically-doped channel stop region is at the second substrate surface between each channel region. An electrically-doped shutter buried layer, disposed in the substrate at a depth from the second substrate surface that is greater than that of the pixel channel regions, extends across the pixel array. An electrically-doped photogenerated-charge-extinguishment layer, at the first substrate surface, extends across the pixel array.
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: September 17, 2013
    Assignee: Massachusetts Institute of Technology
    Inventor: Barry E. Burke
  • Patent number: 8525191
    Abstract: An optoelectronic device assembly can include: a coated element and an optoelectronic device on the coated element. The coated element can include a thermoplastic substrate and a protective weathering layer. The thermoplastic substrate can include a bisphenol-A polycarbonate homopolymer and a polycarbonate copolymer, and wherein the polycarbonate copolymer is selected from a copolymer of tetrabromobisphenol A carbonate and BPA carbonate; a copolymer of 2-phenyl-3,3-bis(4-hydroxyphenyl)phthalimidine carbonate and BPA carbonate; a copolymer of 4,4?-(1-phenylethylidene) biphenol carbonate and BPA carbonate; a copolymer of 4,4?-(1-methylethylidene) bis[2,6-dimethyl-phenol]carbonate and BPA carbonate; and combinations comprising at least one of the foregoing. The protective weathering layer can include resorcinol polyarylate and polycarbonate.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: September 3, 2013
    Assignee: Sabic Innovative Plastics IP B.V.
    Inventors: Jian Zhou, James Edward Pickett, Shreyas Chakravarti
  • Patent number: 8466475
    Abstract: A light detecting chip includes at least one detection region configured to accommodate a sample that is capable of emitting fluorescent light, and a light reflecting section configured to reflect at least a portion of the fluorescent light emitted from the sample in a direction toward a light detector.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: June 18, 2013
    Assignee: Sony Corporation
    Inventors: Isao Ichimura, Masanobu Yamamoto, Shinichi Kai
  • Patent number: 8441605
    Abstract: The present invention provides a polarizing plate including: a layer of polarizer for polarizing incident light and emitting the polarized light; and a coating type optically anisotropic layer disposed on the side to which the polarized light is emitted from the polarizer layer.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: May 14, 2013
    Assignee: Japan Display West Inc.
    Inventor: Eiji Sakai
  • Publication number: 20130049018
    Abstract: An optical/electrical transducer device has housing, formed of a thermally conductive section and an optically transmissive member. The section and member are connected together to form a seal for a vapor tight chamber. Pressure within the chamber configures a working fluid to absorb heat during operation of the device, to vaporize at a relatively hot location as it absorbs heat, to transfer heat to and condense at a relatively cold location, and to return as a liquid to the relatively hot location. The transducer device also includes a wicking structure mounted within the chamber to facilitate flow of condensed liquid of the working fluid from the cold location to the hot location. At least a portion of the wicking structure comprises semiconductor nanowires, configured as part of an optical/electrical transducer within the chamber for emitting light through and/or driven by light received via the transmissive member.
    Type: Application
    Filed: August 30, 2011
    Publication date: February 28, 2013
    Inventors: David P. RAMER, Jack C. Rains, JR.
  • Patent number: 8368122
    Abstract: A multiple-junction photoelectric device includes a substrate with a first conducting layer thereon, at least two elementary photoelectric devices of p-i-n or p-n configuration, with a second conducting layer thereon, and at least one intermediate layer between two adjacent elementary photoelectric devices. The intermediate layer has, on the incoming light side, opposite top and bottom faces, the top and bottom faces having respectively a surface morphology including inclined elementary surfaces so ?90bottom is smaller than ?90top by at least 3°, preferably 6°, more preferably 10°, and even more preferably 15°; where ?90top is the angle for which 90% of the elementary surfaces of the top face of the intermediate layer have an inclination equal to or less than this angle, and ?90bottom is the angle for which 90% of the elementary surfaces of the bottom face of the intermediate layer have an inclination equal to or less than this angle.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: February 5, 2013
    Assignee: Universite de Neuchatel
    Inventors: Didier Domine, Peter Cuony, Julien Bailat
  • Patent number: 8344393
    Abstract: A light receiving and emitting device includes: a light emitting unit and a light receiving unit which are provided on a same substrate, wherein the light emitting unit includes an active layer sandwiched between a first clad layer and a second clad layer, a first electrode electrically connected to the first clad layer, and a second electrode electrically connected to the second clad layer, the light receiving unit includes a light-absorbing layer, at least part of the active layer forms a gain region on a current path between the first electrode and the second electrode, the gain region is provided from a first side face of the active layer to a second side face parallel to the first side face so as to be inclined with respect to a perpendicular of the first side face as seen in a planar view, a light generated in the gain region is divided, at least one of an edge face on the first side face and an edge face on the second side face, the edge faces of the gain region, into a light emitted to an outside and
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: January 1, 2013
    Assignee: Seiko Epson Corporation
    Inventor: Yasutaka Imai
  • Publication number: 20120290255
    Abstract: A method for optical isolation in a clear mold package is provided. The method comprises forming a substrate and mounting a first component on the substrate. The method also comprises depositing a clear layer over the first component and the substrate and fabricating a trench in the clear layer near the first component, wherein the trench extends from a top surface of the substrate to the top surface of the clear layer. Further, the method comprises depositing an opaque material within the trench.
    Type: Application
    Filed: September 20, 2011
    Publication date: November 15, 2012
    Applicant: Intersil Americas Inc.
    Inventors: Nikhil Vishwanath Kelkar, Viraj Ajit Patwardhan, Santhiran Nadarajah, Matt Preston
  • Patent number: 8299484
    Abstract: An optoelectronic semiconductor chip including a radiation passage area, where a contact metallization is applied to the radiation passage area, and a first reflective layer sequence is applied to that surface of the contact metallization which is remote from the radiation passage area, and an optoelectronic component that includes such a chip.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: October 30, 2012
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Stefan Grötsch, Norbert Linder
  • Publication number: 20120268396
    Abstract: An array substrate for an in-cell type touch sensor liquid crystal display device includes: a substrate; a gate line and a data line on the substrate; a thin film transistor connected to the gate line and the data line; a first passivation layer on the thin film transistor; a common electrode on the first passivation layer; an etching preventing pattern covering the drain contact hole; an x sensing line and a y sensing line on the common electrode; a second passivation layer on the x sensing line and the y sensing line; and a pixel electrode on the second passivation layer.
    Type: Application
    Filed: December 21, 2011
    Publication date: October 25, 2012
    Inventors: Min-Su KIM, Myeong-Sik LEE
  • Patent number: 8263971
    Abstract: The OLED display device includes a first stack and a second stack that are separated from each other between an anode electrode and a cathode electrode, with a charge generation layer sandwiched between the first stack and the second stack, each of the first stack and the second stack having an emission layer. The first stack includes a blue emission layer formed between the anode electrode and the CGL. The second stack includes a fluorescent green emission layer and a phosphorescent red emission layer formed between the cathode electrode and the CGL. The blue emission layer includes one of a fluorescent blue emission layer and a phosphorescent blue emission layer.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: September 11, 2012
    Assignee: LG Display Co., Ltd.
    Inventor: Sung Hoon Pieh
  • Publication number: 20120101540
    Abstract: A medical device includes a first substrate, a second substrate, a control module, and an energy storage device. The first substrate includes at least one of a first semiconductor material and a first insulating material. The second substrate includes at least one of a second semiconductor material and a second insulating material. The second substrate is bonded to the first substrate such that the first and second substrates define an enclosed cavity between the first and second substrates. The control module is disposed within the enclosed cavity. The control module is configured to at least one of determine a physiological parameter of a patient and deliver electrical stimulation to the patient. The energy storage device is disposed within the cavity and is configured to supply power to the control module.
    Type: Application
    Filed: January 28, 2011
    Publication date: April 26, 2012
    Applicant: MEDTRONIC, INC.
    Inventors: Richard J. O'Brien, John K. Day, Paul F. Gerrish, Michael F. Mattes, David A. Ruben, Malcolm K. Grief
  • Publication number: 20120091473
    Abstract: An electronic device performing as a light emitting diode and a solar cell, and which comprises: a solar cell unit including a first electrode layer, an energy-level compensation layer formed on the first electrode layer, a photoelectric-conversion layer formed on the energy level compensation layer, and a shared electrode layer formed on the photoelectric-conversion layer; and a light emitting diode unit including the shared electrode layer, and a light emitting layer formed on the shared electrode layer and a second electrode layer formed on the light emitting layer, wherein a LUMO energy-level of the energy-level compensation layer is smaller than a work function of the first electrode layer and is larger than a LUMO energy level of the photoelectric-conversion layer, thereby increasing the generating efficiency of the solar cell unit or the luminous efficiency of the light emitting diode unit due to high electron mobility among the respective layers.
    Type: Application
    Filed: November 26, 2010
    Publication date: April 19, 2012
    Applicant: GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Kwanghee Lee, Inwook Hwang, Hongkyu Kang, Geunjin Kim
  • Publication number: 20110309241
    Abstract: The invention relates to an instrument (100) that can at least partially be inserted into an internal cavity (2) of an object (1), particularly a catheter or an endoscope. The instrument (100) comprises an optical system (OS) for collecting light coming from external objects through a viewing corridor (VC). The optical system comprises an OLED (110) for illuminating said external objects which is disposed in the viewing corridor (VC). In a particular embodiment, the OLED (110) may at least partially be transparent. By arranging the OLED (110) in the light corridor, an optimal illumination can be achieved together with a compact design of the whole instrument (100).
    Type: Application
    Filed: February 8, 2010
    Publication date: December 22, 2011
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Cristina Tanase, Herbert Lifka, Stein Kuiper
  • Publication number: 20110297967
    Abstract: A semiconductor light-detecting element includes: a semiconductor substrate of a first conductivity type having a band gap energy, a first principal surface, and a second principal surface opposed to the first principal surface; a first semiconductor layer of the first conductivity type on the first principal surface and having a band gap energy smaller than the band gap energy of the semiconductor substrate; a second semiconductor layer of the first conductivity type on the first semiconductor layer; an area of a second conductivity type on a part of the second semiconductor layer; a first electrode connected to the second semiconductor layer; a second electrode connected to the area; and a low-reflection film on the second principal surface. The second principal surface is a light-detecting surface detecting incident light, and no substance or structure having a higher reflection factor, with respect to the incident light, than the low-reflection film, is located on the second principal surface.
    Type: Application
    Filed: January 31, 2011
    Publication date: December 8, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Matobu Kikuchi
  • Patent number: 8035114
    Abstract: An optical device includes: a surface-emitting type semiconductor laser section; at least one isolation section formed above the surface-emitting type semiconductor laser section; and a photodetector section formed above the isolation section, wherein the surface-emitting type semiconductor laser section includes a first mirror, an active layer formed above the first mirror and a second mirror formed above the active layer, the photodetector section includes a first contact layer, a photoabsorption layer formed above the first contact layer and a second contact layer formed above the photoabsorption layer, and the isolation section includes a first isolation layer of a conductivity type different from a conductivity type of the second mirror, and a second isolation layer formed above the first isolation layer and having a conductivity type different from the conductivity type of the first contact layer and the first isolation layer.
    Type: Grant
    Filed: May 8, 2007
    Date of Patent: October 11, 2011
    Assignee: Seiko Epson Corporation
    Inventor: Tetsuo Nishida
  • Patent number: 8022449
    Abstract: A photodiode array includes a p-side electrode provided on each p-type region formed by selective diffusion and an n-side electrode connected to a non-growth part of an InP substrate and extends to the top surface side of an epitaxial multilayer. A wall surface of an edge at the non-growth part side of the epitaxial multilayer is a smooth surface. A lattice defect density in a portion of the edge of the epitaxial multilayer is higher than a lattice defect density in the inside of the epitaxial multilayer. Furthermore, the non-growth part of the InP substrate to which the n-side electrode is connected has a flat surface continuous from the inside of the InP substrate.
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: September 20, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Youichi Nagai
  • Patent number: 8002412
    Abstract: A projection system includes a light source module illuminating a plurality of monochromic lights, at least one optical modulator modulating the lights illuminated by the light source module according to each of color signals, a color combining prism combining the monochromic lights modulated by the optical modulator to form an image, and a projection lens projecting the image formed by the color combining prism toward a screen. A semiconductor diode including a P type semiconductor layer, an intrinsic semiconductor layer, and an N type semiconductor layer to absorb or transmit the monochromic lights according to the value of a reverse bias voltage is arranged in units of pixels.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: August 23, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventor: Jae-hee Cho
  • Patent number: 7999259
    Abstract: A display includes: a substrate having a pixel region and a sensor region in which photo-sensor parts are formed; an illuminating section operative to illuminate the substrate from one surface side of the substrate; a thin film photodiode disposed in the sensor region, having at least a P-type semiconductor region and an N-type semiconductor region, and operative to receive light incident from the other surface side of the substrate; and a metallic film formed on the one surface side of the substrate so as to face the thin film photodiode through an insulator film, operative to restrain light generated from the illuminating section from being directly incident on the thin film photodiode from the one surface side, and fixed to a predetermined potential, wherein in the thin film photodiode, the width of the P-type semiconductor region and the width of the N-type semiconductor region are different from each other.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: August 16, 2011
    Assignee: Sony Corporation
    Inventors: Masanobu Ikeda, Ryoichi Ito, Daisuke Takama, Kenta Seki, Natsuki Otani
  • Publication number: 20110121322
    Abstract: A radiation-emitting thin film semiconductor chip is herein described which comprises a first region with a first active zone, a second region, separated laterally from the first region by a space, with a second active zone which extends parallel to the first active zone in a different plane, and a compensating layer, which is located in the second region at the level of the first active zone, the compensating layer not containing any semiconductor material.
    Type: Application
    Filed: April 9, 2009
    Publication date: May 26, 2011
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventor: Ralph Wirth
  • Publication number: 20110108857
    Abstract: The present invention relates to a housing for radiation-emitting or radiation-receiving optoelectronic components, such as LEDs, and to a method for producing said housing. The housing comprises a composite assembly comprising a base pan (1) and a head pan (5) which are connected by means of a glass layer (2). One section of the top side of the base pan defines a mounting region (12) for an optoelectronic functional element (60) and is additionally a heal sink for the optoelectronic functional element. The head pan extends, at least in sections, over the periphery of the mounting region and forms, above the mounting region, a passage region (52, 61) for the radiation emitted by the optoelectronic functional element or the radiation to be received.
    Type: Application
    Filed: April 29, 2009
    Publication date: May 12, 2011
    Applicant: SCHOTT AG
    Inventors: Matthias Rindt, Josef Kiermeier, Thomas Zetterer, Robert Hettler, Shaifullah Bin Mohamed Kamari, Lea-Li Chew, Rohit Bhosale
  • Patent number: 7902559
    Abstract: A light emitting device includes a substrate having transparency, a light emitting element that emits light at least to the substrate side, and a light detecting element that is formed between the light emitting element and the substrate. The light detecting element is formed along an outer frame of the light emitting element in a plan view.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: March 8, 2011
    Assignee: Seiko Epson Corporation
    Inventors: Tsukasa Eguchi, Hiroaki Jo, Eiji Kanda, Toshiyuki Kasai, Atsushi Ito
  • Patent number: 7897961
    Abstract: A reflex coupler has an organic light emitter for generating a light signal and an inorganic photodetector with a detector area. The organic light emitter and the detector area are optically coupled as a result of radiation returned from an object onto which the light signal impinges, and the organic light emitter and the inorganic photodetector are integrated in one device.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: March 1, 2011
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Uwe Vogel, Jörg Amelung, Gerd Bunk
  • Patent number: 7897979
    Abstract: A light emission device manufactured by a method of forming a curved surface having a radius of curvature to the upper end of an insulator 19, exposing a portion of the first electrode 18c to form an inclined surface in accordance with the curved surface, and applying etching so as to expose the first electrode 18b in a region to form a light emission region, in which emitted light from the layer containing the organic compound 20 is reflected on the inclined surface of the first electrode 18c to increase the total take-out amount of light in the direction of an arrow shown in FIG.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: March 1, 2011
    Assignee: Semiconductor Energy laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takeshi Noda, Yoshinari Higaki
  • Publication number: 20110037077
    Abstract: A light detecting chip includes at least one detection region configured to accommodate a sample that is capable of emitting fluorescent light, and a light reflecting section configured to reflect at least a portion of the fluorescent light emitted from the sample in a direction toward a light detector.
    Type: Application
    Filed: July 29, 2010
    Publication date: February 17, 2011
    Applicant: SONY CORPORATION
    Inventors: Isao Ichimura, Masanobu Yamamoto, Shinichi Kai
  • Patent number: 7888702
    Abstract: It is an object of the present invention to provide a technique to manufacture a highly reliable display device at a low cost with high yield. A display device according to the present invention includes a semiconductor layer including an impurity region of one conductivity type; a gate insulating layer, a gate electrode layer, and a wiring layer in contact with the impurity region of one conductivity type, which are provided over the semiconductor layer; a conductive layer which is formed over the gate insulating layer and in contact with the wiring layer; a first electrode layer in contact with the conductive layer; an electroluminescent layer provided over the first electrode layer; and a second electrode layer, where the wiring layer is electrically connected to the first electrode layer with the conductive layer interposed therebetween.
    Type: Grant
    Filed: April 3, 2006
    Date of Patent: February 15, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Hisashi Ohtani, Misako Hirosue
  • Patent number: 7880178
    Abstract: The present invention provides a semiconductor device realizing reduced occurrence of a defect such as a crack at the time of adhering elements to each other. The semiconductor device includes a first element and a second element adhered to each other. At least one of the first and second elements has a pressure relaxation layer on the side facing the other of the first and second elements, and the pressure relaxation layer includes a semiconductor part having a projection/recess part including a projection projected toward the other element, and a resin part filled in a recess in the projection/recess part.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: February 1, 2011
    Assignee: Sony Corporation
    Inventors: Rintaro Koda, Takahiro Arakida, Yuji Masui, Tomoyuki Oki
  • Patent number: 7851809
    Abstract: Disclosed are embodiments of a multi-chip assembly including optically coupled die. The multi-chip assembly may include two opposing substrates, and a number of die are mounted on each of the substrates. At least one die on one of the substrates is in optical communication with at least one opposing die on the other substrate. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: December 14, 2010
    Assignee: Intel Corporation
    Inventors: Qing A. Zhou, Daoqiang Lu, Jiangqi He, Wei Shi, Xiang Yin Zeng
  • Patent number: 7816755
    Abstract: A pixel space is narrowed without increasing PN junction capacitance. A photoelectric conversion device includes a plurality of pixels arranged therein, each including a first impurity region of a first conductivity type forming a photoelectric conversion region, a second impurity region of a second conductivity type forming a signal acquisition region arranged in the first impurity region, a third impurity region of the first conductivity type and a fourth impurity region of the first conductivity type are arranged in a periphery of each pixel for isolating the each pixel, the fourth impurity region is disposed between adjacent pixels, and an impurity concentration of the fourth impurity region is smaller than an impurity concentration of the third impurity region.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: October 19, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuo Yamazaki, Tetsunobu Kochi
  • Patent number: 7808008
    Abstract: A display device in which not only a variation in a current value due to a threshold voltage but also a variation in a current value due to mobility are prevented from influencing luminance with respect to all the levels of grayscale to be displayed. After applying an initial potential for correction to a gate and a drain of a driving transistor, the gate and the drain of the driving transistor is kept connected in a floating state, and a voltage is held in a capacitor before a voltage between the gate and a source of the driving transistor becomes equal to a threshold voltage. When a voltage obtained by subtracting the voltage held in the capacitor from a voltage of a video signal is applied to the gate and the source of the driving transistor, a current is supplied to a light-emitting element. A value of an initial voltage for correction differs in accordance with the voltage of the video signal.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: October 5, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hiroyuki Miyake
  • Patent number: 7755140
    Abstract: A SOI device features a conductive pathway between active SOI devices and a bulk SOI substrate. The conductive pathway provides the ability to sink plasma-induced process charges into a bulk substrate in the event of process charging, such as interlayer dielectric deposition in a plasma environment, plasma etch deposition, or other fabrication provides. A method is also disclosed which includes dissipating electrostatic and process charges from a top of a SOI device to the bottom of the device. The top and bottom of the SOI device may characterize a region of active devices and a semiconductor method respectively. The method further includes a single masking step to create seed regions for an epitaxial-silicon pathway.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: July 13, 2010
    Assignee: Intel Corporation
    Inventors: Sangwoo Pae, Jose Maiz
  • Patent number: 7687875
    Abstract: An image sensor includes a semiconductor layer, and first and second photoelectric converting units including first and second impurity regions in the semiconductor layer that are spaced apart from each other and that are at about an equal depth in the semiconductor layer, each of the impurity regions including an upper region and a lower region. A width of the lower region of the first impurity region may be larger than a width of the lower region of the second impurity region, and widths of upper regions of the first and second impurity regions are equal.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: March 30, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yun-ki Lee
  • Patent number: 7633094
    Abstract: The present invention provides the following methods and displays. A method for manufacturing an EL display panel, having the step of forming a light-emitting layer by irradiating light on a photothermal conversion layer through a transparent base member while a dye layer of a transfer member having the transparent base member, the photothermal conversion layer and this fluorescent dye layer is kept in close contact with an object to which the dye is to be transferred, the transparent base member, the photothermal conversion layer and the transfer member being laminated in this order, so that the dye can be transferred to the object. An EL display panel produced according to this method, an image display having this panel, and a method for manufacturing the image display.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: December 15, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Sukekazu Aratani, Yoshiyuki Kaneko, Makoto Tsumura
  • Patent number: 7592650
    Abstract: A hybrid semiconductor power device that includes a plurality of closed power transistor cells each surrounded by a first and second trenched gates constituting substantially a closed cell and a plurality of stripe cells comprising two substantially parallel trenched gates constituting substantially an elongated stripe cell wherein the closed cells and stripe cells constituting neighboring cells sharing trenched gates disposed thereinbetween as common boundary trenched gates. The closed MOSFET cell further includes a source contact disposed substantially at a center portion of the closed cell wherein the trenched gates are maintained a critical distance (CD) away from the source contact.
    Type: Grant
    Filed: September 11, 2005
    Date of Patent: September 22, 2009
    Assignee: M-MOS Semiconductor Sdn. Bhd.
    Inventor: Fwu-Iuan Hshieh