Structurally Associated With Electric Light Source (e.g., Electroluminescent Light Source) (epo) Patents (Class 257/E31.095)
- Radiation-sensitive semiconductor device without potential or surface barrier (e.g., photoresistor) (EPO) (Class 257/E31.104)
- Radiation-sensitive semiconductor device with potential or surface barrier (EPO) (Class 257/E31.107)
- Semiconductor light source and radiation-sensitive semiconductor device both having potential or surface barrier (EPO) (Class 257/E31.108)
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Patent number: 12204155Abstract: A photonic integrated circuit including multiple elements formed by different processes onto separate chips can be manufactured by defining, via photolithography processes for example, complementary geometries onto each separate chip. Thereafter, the complementary geometries can be aligned and engaged, thereby optically and mechanically intercoupling the several chips to define a single photonic integrated circuit.Type: GrantFiled: June 27, 2022Date of Patent: January 21, 2025Assignee: Apple Inc.Inventors: Jeremy D. Witmer, Alfredo Bismuto, Jeffrey T. Hill, Junkyo Suh, Yigit O. Yilmaz
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Patent number: 12178076Abstract: An apparatus includes a pixel that includes a current path including a light emitting element and a first transistor, a second transistor, and a third transistor connected to a signal wire. One of source and drain regions of the second transistor is connected to one node of the light emitting element and a first power supply. One of source and drain regions of the third transistor is connected to a gate electrode of the first transistor. An isolation portion is disposed between a first conductivity type first diffusion region that makes up one of the source and drain regions of the second transistor and a first conductivity type second diffusion region that makes up one of the source and drain regions of the third transistor. A depth of the first diffusion region is greater than a depth of the second diffusion region.Type: GrantFiled: November 22, 2021Date of Patent: December 24, 2024Assignee: Canon Kabushiki KaishaInventor: Hiromasa Tsuboi
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Patent number: 12174419Abstract: A hybrid photonics device package is described. The hybrid photonics device package includes an electro-optic integrated circuit and a photonics integrated circuit. The electro-optic integrated circuit includes an optical structure and an electrode on a first substrate. The optical structure has a thin film electro-optic layer including lithium. The photonics integrated circuit includes a second substrate and a photonics component on the second substrate. The photonics component and the optical structure are optically coupled. One of the electro-optic integrated circuit and the photonics integrated circuit is mounted on an other of the electro-optic integrated circuit and the photonics integrated circuit.Type: GrantFiled: June 12, 2023Date of Patent: December 24, 2024Assignee: HyperLight CorporationInventors: Mian Zhang, Roy Meade, Christian Reimer
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Patent number: 12144230Abstract: A display device includes a substrate having a first region and a second region, a first array unit in the first region and including at least one subpixel having a first light emitting part, and a second array unit in the second region. The second array unit can include a plurality of subpixels, where each of the plurality of subpixels can include a second light emitting part having a smaller area than an area of the first light emitting part. A first driving thin film transistor of at least one subpixel in the first array unit and a second driving thin film transistor of each of the subpixels of the second array unit can include a first active layer and a second active layer, respectively.Type: GrantFiled: August 1, 2023Date of Patent: November 12, 2024Assignee: LG DISPLAY CO., LTD.Inventor: Woo-Chan Cho
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Patent number: 12036028Abstract: Provided is a bio-signal detection and stimulation device. The bio-signal detection and stimulation device includes a flexible substrate, a stimulation part on the flexible substrate, and a detection electrode part on the flexible substrate. The stimulation part and the detection electrode part vertically overlap each other, the stimulation part includes an organic light emitting diode (OLED), the stimulation part emits an optical signal, and the detection electrode part detects a bio-signal.Type: GrantFiled: June 21, 2021Date of Patent: July 16, 2024Assignee: Electronics and Telecommunications Research InstituteInventors: O Eun Kwon, Chan-mo Kang, Kukjoo Kim, Jin-Wook Shin, Chunwon Byun, Sukyung Choi, Byoung-Hwa Kwon, Sujung Kim, Sooji Nam, Chan Woo Park, Jong-Heon Yang
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Patent number: 11942572Abstract: The invention relates to a method for producing a semiconductor component comprising a radiation-emitting optical semiconductor chip or a plurality of radiation-emitting optical semiconductor chips, said method comprising: applying the radiation-emitting optical semiconductor chip or the plurality of radiation-emitting optical semiconductor chips to a deformable flat support deforming the support; and permanently fixing the deformation.Type: GrantFiled: December 13, 2018Date of Patent: March 26, 2024Assignee: OSRAM OLED GMBHInventors: Siegfried Herrmann, Michael Völkl
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Patent number: 11728276Abstract: Semiconductor devices having optical routing layers, and associated systems and methods, are disclosed herein. In one embodiment, a method of manufacturing a semiconductor device includes forming conductive pads on a first side of a substrate and electrically coupled to conductive material of vias extending partially through the substrate. The method further includes removing material from a second side of the substrate so that the conductive material of the vias projects beyond the second side of the substrate to define projecting portions of the conductive material. The method also includes forming an optical routing layer on the second side of the substrate and at least partially around the projecting portions of the conductive material.Type: GrantFiled: August 30, 2021Date of Patent: August 15, 2023Assignee: Micron Technology, Inc.Inventor: John F. Kaeding
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Patent number: 11719789Abstract: An optical proximity sensor that increases a degree of freedom in an arrangement position is provided. The optical proximity sensor includes: a light detecting unit comprising a light detecting element on a substrate, a first transparent unit that covers the light detecting element, and a light-shielding unit that covers the first transparent unit; and a light emitting unit comprising a light emitting element on the substrate, a second transparent unit that covers the light emitting element, and the light-shielding unit that covers the second transparent unit, in which the light-shielding unit causes at least any of the first transparent unit and the second transparent unit to be exposed from a side surface of a package of the optical proximity sensor.Type: GrantFiled: December 16, 2019Date of Patent: August 8, 2023Assignee: SHARP KABUSHIKI KAISHAInventors: Masaya Ohnishi, Morito Kanamoto
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Patent number: 11646389Abstract: A light sensitive semiconductor structure including a pn-junction in a silicon substrate. The pn-junction includes a central part and an edge part around surrounding the central part, the edge part being in contact with a surface of the silicon substrate. The structure further includes a plasma shielding structure covering at least a depletion width of the pn-junction over at least a part of the edge part where the edge part contacts the surface of the silicon substrate.Type: GrantFiled: November 10, 2021Date of Patent: May 9, 2023Assignee: X-FAB Global Services GmbHInventor: Daniel Gäbler
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Patent number: 11347126Abstract: An optical module that provides a semiconductor modulator, an input lens system and first and second output lens systems, and two monitor photodiodes is disclosed. The semiconductor modulator provides an input port, first and second output ports, and two monitor ports in one side thereof. The input port and the first and second output ports face the input lens system and the first and second lens systems, respectively. The two monitor ports face the two monitor photodiodes, respectively. The first and second output ports are symmetrically disposed with respect to the input port in the one side. The two monitor ports are disposed in respective outer sides of the first and second output ports and symmetrically with respect to the input port.Type: GrantFiled: December 26, 2018Date of Patent: May 31, 2022Assignee: Sumitomo Electric Industries, Ltd.Inventors: Tomoya Saeki, Yasushi Fujimura, Toru Watanabe
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Patent number: 10925160Abstract: A silicon circuit board substrate is utilized in an electronic device in place of conventional PCB motherboard. The silicon circuit board substrate is adhered to the back side of a display assembly to provide structural support for the substrate. The silicon circuit board substrate and the display assembly may be electrically connected via contact pads provided on the respective sides of the substrate and the display assembly that are connected together.Type: GrantFiled: June 28, 2016Date of Patent: February 16, 2021Assignee: AMAZON TECHNOLOGIES, INC.Inventors: Samuel Waising Tam, Jasmin B. Farshi
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Patent number: 10693097Abstract: A first display element includes a first pixel electrode that reflects visible light, a liquid crystal layer, and a first common electrode that transmits visible light. A second display element includes a second pixel electrode that transmits visible light, a light-emitting layer, and a second common electrode that reflects visible light. A separation layer that reflects visible light is formed over a formation substrate, an insulating layer is formed over the separation layer, and the second display element is formed over the insulating layer. The formation substrate and a second substrate are bonded to each other. Then, the formation substrate and the separation layer are separated from each other. The exposed separation layer is processed into the first pixel electrode. The liquid crystal layer is positioned between the first common electrode and the first pixel electrode and a first substrate and the second substrate are bonded to each other.Type: GrantFiled: July 11, 2017Date of Patent: June 23, 2020Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Seiji Yasumoto, Masataka Sato, Hiroki Adachi, Toru Takayama, Natsuko Takase
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Patent number: 10495944Abstract: Disclosed is a nonlinear optical system for generating or amplifying light pulses by N-wave mixing, including a nonlinear optical medium suitable for receiving at least one first light pulse and one second light pulse. The system includes a fast modulation device for modulating a time delay between the second light pulse and the first pulse light in the nonlinear optical medium, the time delay modulation device being placed upstream of the nonlinear optical medium, and the time delay modulation device being modulated at least between a first delay value and a second delay value, so as to modulate the generation or amplification of a light pulse by N-wave mixing of the at least one first light pulse et one second light pulse in the nonlinear optical medium.Type: GrantFiled: October 19, 2016Date of Patent: December 3, 2019Assignee: AMPLITUDE SYSTEMESInventors: Franck Morin, Clemens Honninger, Martin Delaigue
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Patent number: 10475869Abstract: A display device with high luminance and excellent white balance is provided. The display device includes a first display element, a second display element, a first transistor, and a second transistor. The first display element includes a light-emitting layer and is electrically connected to the first transistor. The first transistor includes a first semiconductor film, a first gate electrode and a second gate electrode facing each other with the first semiconductor film provided therebetween, and a first source electrode and a first drain electrode over and in contact with the first semiconductor film. The second gate electrode is electrically connected to the first source electrode or the first drain electrode. The second display element includes a light-emitting layer and is electrically connected to the second transistor.Type: GrantFiled: August 21, 2017Date of Patent: November 12, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kouhei Toyotaka, Hiroyuki Miyake
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Patent number: 10151893Abstract: An optical module includes a light-forming part; a protective member and including an output window and disposed so as to surround the light-forming part; an adapter connected to the protective member and including an optical passage through which light emitted from the light-forming part and transmitted by the output window passes; and an optical coupling component that is connected to the adapter and that light passing through the optical passage enters. The light-forming part includes semiconductor light-emitting devices and lenses configured to convert, in terms of spot size, light emitted from the semiconductor light-emitting devices. The optical coupling component includes an optical component and a support member supporting the optical component. The support member and the adapter are connected together.Type: GrantFiled: February 25, 2016Date of Patent: December 11, 2018Assignee: Sumitomo Electric Industries, Ltd.Inventor: Hiromi Nakanishi
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Patent number: 9887515Abstract: An optical module includes a bench part and a cap on the bench part. The bench part includes a bench, an electrode, a semiconductor optical device and a lens. The electrode is disposed on the first and second areas of the bench. The semiconductor optical device is disposed on the electrode in the first area. The cap includes a pad electrode, a conductor, a ceiling, a front wall, a first side wall, a first wing, and a rear wall. The first wing is disposed on the first side wall. The pad electrode is disposed on the first wing, and the conductor is disposed on the cap base and connected to the pad electrode. The electrode is electrically connected to the conductor on the second area. The ceiling extends along a first plane. The front wall has a front outer face extending along a second plane intersecting the first plane.Type: GrantFiled: December 8, 2016Date of Patent: February 6, 2018Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Akira Furuya
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Patent number: 9825426Abstract: An optical module includes a bench part and a cap on the bench part. The bench part includes a bench, an electrode, a semiconductor optical device and a lens. The electrode is disposed on the first and second areas of the bench. The semiconductor optical device is disposed on the electrode in the first area. The cap includes a base, a pad electrode, a conductor, a ceiling, a front wall, and a rear wall. The pad electrode is disposed on the base. The conductor is disposed on the base and connected to the pad electrode. The electrode is electrically connected to the conductor on the second area. The ceiling extends along a first plane. The front wall has a front outer face extending along a second plane intersecting the first plane. The rear wall extends from the ceiling in a direction from the cap to the bench.Type: GrantFiled: July 22, 2016Date of Patent: November 21, 2017Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Akira Furuya
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Patent number: 9786721Abstract: The utility model provides an OLED display panel, by disposing a color filter layer on an array substrate, an alignment process of an upper with a lower substrate can be omitted, the manufacturing process of the OLED display panel can be simplified, and a thin film packaging can be carried out on the color filter layer so that the OLED display panel can become more lightweight and thin.Type: GrantFiled: June 18, 2016Date of Patent: October 10, 2017Assignee: Wuhan China Star Optoelectronics Technology Co., LtdInventor: Yuejun Tang
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Patent number: 9720190Abstract: An optical module includes: at least one optical waveguide provided on a surface of a substrate; a plurality of grooves provided in the optical waveguide on the surface of the substrate and having both a surface orthogonal to the surface of the substrate and an inclined surface; multiple pairs of light-emitting and light-receiving elements aligned with the plurality of grooves in the optical waveguide and provided so as to correspond to light of different wavelengths on the optical waveguide; and a plurality of light-selecting filters each provided on an inclined surface of the plurality of grooves in the optical waveguide and reflecting light of the wavelength corresponding to the light-emitting element in the respective pair of light-emitting and light-receiving elements towards the optical waveguide, and selectively reflecting light of the corresponding wavelength from the light propagating through the optical waveguide towards the corresponding pair of light-emitting and light-receiving elements.Type: GrantFiled: March 8, 2016Date of Patent: August 1, 2017Assignee: International Business Machines CorporationInventors: Shigeru Nakagawa, Yoichi Taira, Masao Tokunari
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Patent number: 9461754Abstract: A housing accommodates an optical waveguide substrate, plural signal light receiving elements, and a signal-light-level monitoring light receiving element. Signal light and locally oscillated light are input into optical waveguides in the optical waveguide substrate from a first end face of the optical waveguide substrate. The plural signal light receiving elements are disposed aligned on a side of a second end face opposite to a side of the first end face of the optical waveguide substrate. The signal-light-level monitoring light receiving element is disposed on a side of a third end face or a fourth end face between the first end face and the second end face of the optical waveguide substrate and at a position closer to the first end face than to the second end face.Type: GrantFiled: September 26, 2014Date of Patent: October 4, 2016Assignee: FUJITSU OPTICAL COMPONENTS LIMITEDInventors: Hirohiko Sonoda, Kohei Shibata, Takuya Nakao, Yasuhiro Yamauchi, Ryuichi Yoshida, Hiroyuki Furukawa
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Patent number: 9246591Abstract: An optical connector for directly transferring data is disclosed. The optical connector includes a first input device connected to a first data source and to which a first input signal is applied, a first light emitting device connected to the first input device and generating a first optical signal corresponding to the first input signal, a first light receiving device positioned close to the first light emitting device in such a configuration that the first optical signal directly reaches the first light receiving device from the first light emitting device, the first light receiving device generating a first output signal corresponding to the first optical signal, and a first output device connected to the first light receiving device and to a second data source to which the first output signal is transferred. Large-sized data may be transferred at high speed and high reliability without light transfer units.Type: GrantFiled: March 14, 2013Date of Patent: January 26, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Bo-Seong Kim, Chang-Hoon Han
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Patent number: 9006008Abstract: A method for manufacturing an organic electroluminescent element including, in the following order, an anode, a light-emitting layer, an electron injection layer, and a cathode, the method including the steps of: (A) forming the anode; (B) forming the light-emitting layer; (C) forming the electron injection layer; and (D) forming the cathode, in which the step (C) includes (i) applying an application liquid containing an ionic polymer to form a thin film, (ii) heating the thin film formed, (iii) storing a partially finished organic electroluminescent element obtained in (ii), and thereafter, (iv) heating the thin film again.Type: GrantFiled: February 14, 2012Date of Patent: April 14, 2015Assignee: Sumitomo Chemical Company, LimitedInventor: Shuichi Sassa
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Patent number: 8928007Abstract: An electro-optical device includes: a pixel region that is formed on a substrate and in which a light emitting element that has a first electrode, a second electrode and a light emitting layer formed between the first electrode and the second electrode is arranged; a partition wall portion that is formed above the substrate and located on an outer side of the pixel region; a connecting line that is formed above the substrate and located on an outer side of the partition wall portion; and a connecting section that is formed above the substrate and electrically connects the second electrode to the connecting line, wherein the second electrode covers and extends over the pixel region and the partition wall portion and does not overlap the connecting line in a planar view.Type: GrantFiled: April 25, 2011Date of Patent: January 6, 2015Assignee: Seiko Epson CorporationInventors: Suguru Akagawa, Yuki Hanamura
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Patent number: 8916917Abstract: According to one embodiment, a solid-state imaging device includes a first element formation region surrounded by an element isolation region in a semiconductor substrate having a first and a second surface, an upper element isolation layer on the first surface in the element formation region, a lower element isolation layer between the second surface and the upper element isolation layer, a first photodiode in the element formation region, a floating diffusion in the element formation region, and a first transistor disposed between the first photodiode and the floating diffusion. A side surface of the lower element isolation layer protrudes closer to the transistor than a side surface of the upper element isolation layer.Type: GrantFiled: February 3, 2012Date of Patent: December 23, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Shogo Furuya, Hirofumi Yamashita, Tetsuya Yamaguchi
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Patent number: 8878265Abstract: According to one embodiment, a solid-state imaging device includes a first element formation region surrounded by an element isolation region in a semiconductor substrate having a first and a second surface, an upper element isolation layer on the first surface in the element formation region, a lower element isolation layer between the second surface and the upper element isolation layer, a first photodiode in the element formation region, a floating diffusion in the element formation region, and a first transistor disposed between the first photodiode and the floating diffusion. A side surface of the lower element isolation layer protrudes closer to the transistor than a side surface of the upper element isolation layer.Type: GrantFiled: February 3, 2012Date of Patent: November 4, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Shogo Furuya, Hirofumi Yamashita, Tetsuya Yamaguchi
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Patent number: 8847204Abstract: This invention provides a germanium electroluminescence device and a fabricating method of the same for using germanium of an indirect bandgap semiconductor without modifying a bandgap as a light-emitting layer which emits a 1550 nm-wavelength light and enabling to use not only as infrared LEDs itself but also as light sources for optical communication systems.Type: GrantFiled: February 26, 2013Date of Patent: September 30, 2014Assignees: Seoul National University R&DB Foundation, The Board of Trustees of the Leland Standford Junior UniversityInventors: Byung-Gook Park, James S. Harris, Jr., Seongjae Cho
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Patent number: 8809877Abstract: A semiconductor voltage transformation structure is provided. The semiconductor voltage transformation structure includes: a first electrode layer ; an electricity-to-light conversion layer formed on the first electrode layer; a second electrode layer formed on the electricity-to-light conversion layer; a first isolation layer formed on the second electrode layer; a third electrode layer formed on the first isolation layer; a light-to-electricity conversion layer formed on the third electrode layer; and a fourth electrode layer formed on the light-to-electricity conversion layer, in which the first isolation layer, the second electrode layer and the third electrode layer are transparent to a working light emitted by the electricity-to-light conversion layer.Type: GrantFiled: November 9, 2012Date of Patent: August 19, 2014Inventor: Lei Guo
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Patent number: 8796701Abstract: A display panel apparatus includes a planarizing film formed on a substrate, at least one pixel including a lower electrode; an organic EL layer; and an upper electrode which are formed above the planarizing film; an auxiliary electrode electrically connected to the upper electrode which is the opposite to the lower electrode; a display section including a plurality of the pixels; an electrode plate electrically connected to the auxiliary electrode and arranged to cover the planarizing film outside the display section, and the electrode plate has a hole exposing a part of a surface of the planarizing film. Furthermore, the display panel apparatus also includes a hole injection layer which is an inorganic material layer made of an inorganic material and covering the hole.Type: GrantFiled: January 24, 2012Date of Patent: August 5, 2014Assignee: Panasonic CorporationInventors: Seiji Nishiyama, Takashi Osako, Shinya Ono
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Patent number: 8781271Abstract: A compact photonic time delay unit. The unit includes a plurality of compact optical delay elements, a plurality of delay bypass elements, with each delay bypass element being associated with a respective one of the compact optical delay elements, and a plurality of compact optical switches. Each of the compact optical switches is configured to controllably switch an optical signal through one of the compact optical delay elements or through the associated delay bypass element. In some aspects, the compact optical delay elements, delay bypass elements, and compact optical switches are disposed on a single electro-optical chip.Type: GrantFiled: August 1, 2012Date of Patent: July 15, 2014Assignee: Lockheed Martin CorporationInventor: Thomas W. Karras
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Patent number: 8748210Abstract: A semiconductor device comprises a semiconductor substrate, and a multilayer wiring structure arranged on the semiconductor substrate, the multilayer wiring structure including a plurality of first electrically conductive lines, an insulating film covering the plurality of first electrically conductive lines, and a second electrically conductive line arranged on the insulating film so as to intersect the plurality of first electrically conductive lines, wherein the insulating film has gaps in at least some of a plurality of regions where the plurality of first electrically conductive lines and the second electrically conductive line intersect each other, and a width of the gap in a direction along the second electrically conductive line is not larger than a width of the first electrically conductive line.Type: GrantFiled: December 7, 2012Date of Patent: June 10, 2014Assignee: Canon Kabushiki KaishaInventor: Takeshi Aoki
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Patent number: 8704243Abstract: Disclosed is a light emission element including, on a substrate having an insulative surface, a first electrode connected with a thin film transistor and an insulator covering the end of the first electrode, a layer containing, an organic compound in contact with the first electrode, a second electrode in contact with the layer containing the organic compound. The first electrode has an inclined surface and the inclined surface reflects emitted light from the layer containing the organic compound. Further, a light absorbing multi-layered film absorbing external light is disposed on the portion of the first electrode covered with the insulator. The light absorbing multi-layered film comprising at least has a three-layered structure comprising a light transmitting film, a film partially absorbing light and a light transmitting film.Type: GrantFiled: November 9, 2012Date of Patent: April 22, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Takeshi Noda
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Publication number: 20140077233Abstract: A multi-functional optoelectronic apparatus which comprises an integrated circuit (IC) wafer, respective optoelectronic components which has one or more Input port(s) to receive external command signals to drive the optoelectronic apparatus. Examples of some of the optoelectronic apparatus include an IOLED (Input/Output Light Emitting Diode including visible light and invisible light), IOPD (Input/Output Photo Diode), IOPT (Input/Output Photo Transistor), IOLS (Input/Output Light Sensor), IORS (Input/Output Reflective Sensor), IOPI (Input/Output Photo Interrupter) and IORM (Input/Output Receiver Module). The multi-functional optoelectronic apparatus may drive external peripheral(s) such as speakers, motors or other devices.Type: ApplicationFiled: September 19, 2012Publication date: March 20, 2014Inventor: Khok Hing-Wai
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Patent number: 8664023Abstract: A vapor deposition method of the present invention includes the steps of (i) preparing a mask unit including a shadow mask (81) and a vapor deposition source (85) fixed in position relative to each other, (ii) while moving at least one of the mask unit and the film formation substrate (200) relative to the other, depositing a vapor deposition flow, emitted from the vapor deposition source (85), onto a vapor deposition region (210), and (iii) adjusting the position of a second shutter (111) so that the second shutter (111) blocks a vapor deposition flow traveling toward the vapor deposition unnecessary region (210).Type: GrantFiled: December 20, 2011Date of Patent: March 4, 2014Assignee: Sharp Kabushiki KaishaInventors: Tohru Sonoda, Shinichi Kawato, Satoshi Inoue, Satoshi Hashimoto
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Patent number: 8664645Abstract: An organic electroluminescence element includes: a pair of electrodes composed of a positive electrode and a negative electrode, one of which is transparent or semitransparent; and one or more organic compound layers that are sandwiched between the pair of electrodes, in which at least one layer of the organic compound layers contains one or more of charge-transporting polyesters represented by formula (I).Type: GrantFiled: August 31, 2011Date of Patent: March 4, 2014Assignee: Fuji Xerox Co., Ltd.Inventors: Hidekazu Hirose, Takeshi Agata, Katsuhiro Sato
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Publication number: 20140024151Abstract: A method for manufacturing array substrate with embedded photovoltaic cell includes: providing a substrate; forming a buffer layer on the substrate; forming an amorphous silicon layer on the buffer layer; converting the amorphous silicon layer into a polysilicon layer; forming a pattern on the polysilicon layer; forming a first photoresist pattern on the polysilicon layer and injecting N+ ions; forming a gate insulation layer on the polysilicon layer; forming a second photoresist pattern on the gate insulation layer and injecting N? ions; forming a third photoresist pattern on the gate insulation layer and injecting P+ ions; forming a metal layer on the gate insulation layer so as to form a gate terminal; forming a hydrogenated insulation layer on the metal layer; forming a first ditch in the first insulation layer; and forming a second metal layer on the first insulation layer.Type: ApplicationFiled: July 27, 2012Publication date: January 23, 2014Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO. LTD.Inventor: Xindi Zhang
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Patent number: 8614493Abstract: A photosensor element is provided with a gate electrode disposed on an insulating substrate, a gate insulating film disposed so as to cover the gate electrode, a semiconductor layer disposed on the gate insulating film so as to overlap the gate electrode, and a source electrode and a drain electrode provided on the semiconductor layer so as to overlap the gate electrode and so as to face each other. The photosensor element has the semiconductor layer provided with an intrinsic semiconductor layer in which a channel region is defined and an extrinsic semiconductor layer that is laminated on the intrinsic semiconductor layer such that the channel region is exposed. The extrinsic semiconductor layer protrudes from the drain electrode on the side close to the channel region.Type: GrantFiled: November 11, 2010Date of Patent: December 24, 2013Assignee: Sharp Kabushiki KaishaInventors: Masao Moriguchi, Yohsuke Kanzaki, Tsuyoshi Inoue
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Publication number: 20130320359Abstract: A heterogeneous stack structure is provided which includes one or more optical signal-based chips and multiple electrical signal-based chips. The optical chip(s) and the electrical chip(s) are different layers of the stack structure, and the optical chip(s) includes optical signal paths extending at least partially laterally within the optical chip(s). Electrical signal paths are provided extending between and coupling the optical chip(s) and the electrical chips. The electrical signal paths include one or more through substrate vias (TSVs) through one or more electrical chips of the multiple electrical chips in the stack structure. In one embodiment, the optical chip(s) is configured laterally to locally distribute, via one or more paths of the electrical signal paths, a timing reference signal for one or more electrical chips in the stack. Conversion between optical and electrical signals within the stack structure occurs within the optical chip(s).Type: ApplicationFiled: June 4, 2012Publication date: December 5, 2013Applicant: SEMATECH, INC.Inventor: Klaus HUMMLER
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Publication number: 20130285187Abstract: Embodiments relate to photo cell devices. In an embodiment, a photo cell device includes an array of transmission layers having different optical thicknesses and with photo diodes underneath. The transmission layers can include two different materials, such as a nitride and an oxide, that cover each diode with a different proportional area density in a damascene-like manner. Embodiments provide advantages over conventional devices, including that they can be integrated into a standard CMOS process and therefore simpler and less expensive to produce.Type: ApplicationFiled: April 30, 2012Publication date: October 31, 2013Inventor: Thoralf Kautzsch
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Patent number: 8536568Abstract: The invention is directed to a higher contrast in a display device having a lighting device as a front light. A lighting portion is attached to a reflective liquid crystal display portion. A first transparent substrate and a second transparent substrate made of a glass substrate etc. are attached to each other with a sealing layer coated on those peripheral portions therebetween. The back surface of the first transparent substrate is attached to the reflective liquid crystal display portion, and an organic EL element is formed on the front surface of the first transparent substrate. The organic EL element is sealed in a space surrounded by the first transparent substrate, the second transparent substrate, and the sealing layer. The organic EL element is formed in a region corresponding to a pixel region of the reflective liquid crystal display portion. A desiccant layer is formed on the front surface of the second transparent substrate.Type: GrantFiled: August 26, 2008Date of Patent: September 17, 2013Assignees: SANYO Electric Co., Ltd., Epson Imaging Devices CorporationInventors: Kenji Tanase, Kazunobu Mameno, Norio Koma, Manabu Takemoto
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Publication number: 20130177274Abstract: An interposer includes grooves (310) for waveguides 104 (e.g. optical fiber cables) coupled to a transducer (120). The grooves are formed by etching a cavity (410) in a substrate (130), filling the cavity with some layer (520), then etching the layer to form the grooves. The grooves can be formed in a separate structure which is then inserted into a cavity in an interposer having electrical circuitry for the transducer. The cavity has outwardly or inwardly sloped sidewalls which can serve as minors (144) or on which the minors are later formed. The substrate can be monocrystalline silicon, in which the inwardly sloped (retrograde) sidewalls are formed by a combination of different etches at least one of which is selective to certain crystal planes. Other features, including non-optical embodiments, are also provided.Type: ApplicationFiled: April 24, 2012Publication date: July 11, 2013Applicant: Invensas CorporationInventors: Valentin Kosenko, Edward Lee McBain, Cyprian Emeka Uzoh, Pezhman Monadgemi, Sergey Savastiouk
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Patent number: 8482010Abstract: An EL display panel includes an organic EL device and a thin film semiconductor unit. The organic EL device includes a lower electrode, an organic light-emitting layer, and an upper electrode. The thin film semiconductor unit includes a first gate electrode, a gate insulating film, a first source electrode, a second drain electrode formed in a same layer as the first source electrode, a first power supply line formed in a same layer as the second drain electrode, and a first interlayer insulating film formed on the first source electrode and the second drain electrode. A gate line connected to the first gate electrode, a second power supply line formed in a same layer as the gate line and connected to the first power supply line, and an auxiliary line formed in a same layer as the second power supply line and connected to the upper electrode are included.Type: GrantFiled: October 26, 2011Date of Patent: July 9, 2013Assignee: Panasonic CorporationInventor: Arinobu Kanegae
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Patent number: 8455961Abstract: A finger sensor assembly may include a circuit board and an integrated circuit (IC) finger sensor grid array package including a grid array on a lower end thereof mounted to the circuit board, and a finger sensing area on an upper end thereof. The finger sensor assembly may further include at least one visible light source carried by the circuit board and a visible light guide optically coupled to the at least one visible light source. The at least one visible light source may at least partially laterally surround the upper end of the IC finger sensor grid array package to provide visual light indications. The IC finger sensor grid array package may also include circuitry for controlling the at least one visible light source.Type: GrantFiled: June 19, 2009Date of Patent: June 4, 2013Assignee: Authentec, Inc.Inventors: Dale R. Setlak, John David McKinney
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Publication number: 20130108019Abstract: Detector modules for an imaging system and methods of manufacturing are provided. One detector module includes a substrate, a direct conversion sensor material coupled to the substrate and a flexible interconnect electrically coupled to the direct conversion sensor material and configured to provide readout of electrical signals generated by the direct conversion sensor material. The detector module also includes at least one illumination source for illuminating the direct conversion sensor material.Type: ApplicationFiled: October 27, 2011Publication date: May 2, 2013Applicant: General Electric CompanyInventors: John Eric Tkaczyk, Kevin Matthew Durocher, James Rose, Haochuan Jiang, Abdelaziz Ikhlef, Vladimir Lobastov, Daniel David Harrison
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Publication number: 20130109115Abstract: According to an embodiment, a method for manufacturing a semiconductor device includes steps of enveloping a semiconductor chip attached to a lead frame with a resin and mounting a film-like member in a pocket provided in a base portion of a jig. The method further includes steps of making the resin in contact with the film-like member by covering the pocket with the portion of the lead frame having the semiconductor chip fixed thereto, after fixing the lead frame to a movable portion of the jig and moving the movable portion in a direction of the base portion; and curing the resin with the lead frame in a state covering the pocket.Type: ApplicationFiled: March 12, 2012Publication date: May 2, 2013Applicant: Kabushiki Kaisha ToshibaInventor: Tatsuhiko Nagafuchi
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Publication number: 20130108209Abstract: An optoelectronic chip including a coupler region, and a method of manufacturing the same, include a substrate; a coupler region formed of a material having a refractive index lower than the substrate and surrounded by the substrate. The coupler region includes a total reflection surface that totally reflects light incident through a surface of the substrate into the substrate or emits light guided in the substrate through the surface of the substrate.Type: ApplicationFiled: May 18, 2012Publication date: May 2, 2013Applicant: Samsung Electronics Co., Ltd.Inventor: Seong-ho CHO
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Patent number: 8426870Abstract: A thin-film transistor array device includes a passivation film above first and second bottom gate transistors. A source wire is below the passivation film. A gate wire and a relay electrode are above the passivation film. The gate wire is electrically connected to a gate electrode of the first transistor via a first hole in the passivation film. A conductive oxide film is between the passivation film and both the gate wire and the relay electrode and not electrically connected between the gate wire and the relay electrode. The conductive oxide film covers an end portion of the source wire that is exposed via a second hole in the passivation film. The conductive oxide film is between the relay electrode and a current-supply electrode of the second transistor and electrically connects the relay electrode and the current-supply electrode via a third hole in the passivation film.Type: GrantFiled: September 26, 2011Date of Patent: April 23, 2013Assignees: Panasonic Corporation, Panasonic Liquid Crystal Display Co., Ltd.Inventors: Arinobu Kanegae, Genshiro Kawachi
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Publication number: 20130082286Abstract: Apparatuses and systems for photon detection can include a first optical sensing structure structured to absorb light at a first optical wavelength; and a second optical sensing structure engaged with the first optical sensing structure to allow optical communication between the first and the second optical sensing structures. The second optical sensing structure can be structured to absorb light at a second optical wavelength longer than the first optical wavelength and to emit light at the first optical wavelength which is absorbed by the first optical sensing structure. Apparatuses and systems can include a bandgap grading region.Type: ApplicationFiled: July 13, 2009Publication date: April 4, 2013Inventors: Hod Finkelstein, Sadik C. Esener, Yu-Hwa Lo, Kai Zhao, James Cheng, Sifang You
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Publication number: 20130075761Abstract: According to one embodiment, a photoelectric conversion device including a substrate having opaque interconnection layers, an insulating film formed on the substrate, and having a plurality of openings, light-emitting elements formed of the openings, each light-emitting element having an upper electrode layer, and light-receiving elements formed of the openings, each light-receiving element having an upper electrode layer, wherein a semiconductor material is different in the light-emitting element and the light-receiving element, the upper electrode layer both of the light-emitting element and the light-receiving element are formed as common electrodes, and each interconnection layer is formed on a region outside a region specified by the opening.Type: ApplicationFiled: June 4, 2012Publication date: March 28, 2013Inventor: Masahiko AKIYAMA
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Publication number: 20130071960Abstract: The invention includes a single chip having multiple different devices integrated thereon for a common purpose. The chip includes a substrate having a peripheral area, a mid-chip area, and a central area. A plurality of FETs are formed in the peripheral area with each FET having a layer of single crystal rare earth material in at least one of a conductive channel, a gate insulator, or a gate stack. A plurality of photonic devices including light emitting diodes or vertical cavity surface emitting lasers are formed in the mid-chip area with each photonic device having an active layer of single crystal rare earth material. A plurality of photo detectors are formed in the central area.Type: ApplicationFiled: November 12, 2012Publication date: March 21, 2013Inventor: MICHAEL LEBBY
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Publication number: 20130048860Abstract: A photoelectric conversion substrate includes: a substrate; plural pixels, each provided with a sensor portion and a switching element that are formed on the substrate, the sensor portion including a photoelectric conversion element that generates charge according to illuminated light, and the switching element reading out the charge from the sensor portion; a flattening layer that flattens the surface of the substrate having the switching elements and the sensor portions formed thereon; and a first conducting member that is formed over the whole face of the flattening layer and configured such that a voltage applied to the first conducting member is selected to be a predetermined voltage.Type: ApplicationFiled: August 14, 2012Publication date: February 28, 2013Applicant: FUJIFILM CORPORATIONInventors: Naoyuki NISHINO, Keiichiro SATO, Yasunori OHTA, Haruyasu NAKATSUGAWA