For Device Having Potential Or Surface Barrier (epo) Patents (Class 257/E31.118)
  • Patent number: 12224299
    Abstract: A sensor package structure is provided. The sensor package structure includes a substrate, a sensor chip, a ring-shaped wall, and a light-permeable layer. The substrate has a first surface and a second surface that is opposite to the first surface. The first surface of the substrate has a chip-bonding region and a connection region that surrounds the chip-bonding region, and the substrate has a plurality of protrusions arranged in the connection region. The sensor chip is disposed on the chip-bonding region of the substrate and is electrically coupled to the substrate. The ring-shaped wall is formed on the connection region of the substrate, and the protrusions of the substrate are embedded in and gaplessly connected to the ring-shaped wall. The light-permeable layer is disposed on the ring-shaped wall, and the light-permeable layer, the ring-shaped wall, and the substrate jointly define an enclosed space therein.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: February 11, 2025
    Assignee: TONG HSING ELECTRONIC INDUSTRIES, LTD.
    Inventors: Chien-Chen Lee, Li-Chun Hung, Chien-Yuan Wang
  • Patent number: 12189152
    Abstract: A sensor lens assembly includes a circuit board, an optical module assembled onto the circuit board, and a sensing module that is surrounded by the optical module. The sensing module includes a sensor chip disposed on and electrically coupled to the circuit board, a supporting layer having a ring shape and disposed on the sensor chip, and a light-permeable layer. The light-permeable layer is disposed on the supporting layer through a ring-shaped segment thereof, so that the light-permeable layer, the supporting layer, and the sensor chip jointly define an enclosed space. The ring-shaped segment has a ring-shaped roughened region. A projection space defined by orthogonally projecting the ring-shaped roughened region toward the sensor chip is located outside of a sensing region of the sensor chip and overlaps an entirety of the supporting layer and a part of the enclosed space.
    Type: Grant
    Filed: February 8, 2023
    Date of Patent: January 7, 2025
    Assignee: TONG HSING ELECTRONIC INDUSTRIES, LTD.
    Inventors: Chia-Shuai Chang, Chien-Chen Lee, Li-Chun Hung
  • Patent number: 12189085
    Abstract: The present disclosure relates to an imaging device capable of preventing occurrence of flare and ghosts. The imaging device includes a solid-state imaging element including a laminate substrate in which a first substrate and a second substrate are laminated, a glass substrate positioned above the first substrate, and a lens formed on the glass substrate, in which a cavity is provided between the lens and the solid-state imaging element. The present technology can be applied to, for example, an imaging device.
    Type: Grant
    Filed: May 25, 2020
    Date of Patent: January 7, 2025
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Atsushi Yamamoto, Kensaku Maeda
  • Patent number: 12178135
    Abstract: A semiconductor device includes a base, a detector on the base and including a first surface on which a detection portion is provided, and a resin package on the base and including an exposure hole to externally expose the detection portion of the detector. At least a portion of an outer peripheral edge of the first surface of the detector is exposed in the exposure hole. The resin package includes a depressed portion along the portion of the outer peripheral edge that is exposed in the exposure hole.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: December 24, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yoshihiro Yoshida, Koichi Yoshida
  • Patent number: 12167111
    Abstract: A camera module according to an embodiment of the present invention comprises: a circuit board; a light source and an image sensor arranged on the circuit board; a housing arranged on the circuit board; an optical member arranged on the light source and including an electrode; and a conductive portion which is arranged in the housing and electrically connects the electrode of the optical member to the circuit board.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: December 10, 2024
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Hee Se Lee, Tae Gon Kim
  • Patent number: 12149805
    Abstract: A method for joining a camera module, including a base plate on which an image sensor is situated, and an objective mount in which an objective of the camera module is accommodated. The base plate is placed on the objective mount, and at least one spring element is laterally mounted and positioned at each of at least two connection areas that are oppositely situated with respect to the optical axis of the camera module. The base plate and the objective mount are pressed flatly against one another via the spring element.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: November 19, 2024
    Assignee: ROBERT BOSCH GMBH
    Inventors: Andreas Moehrle, Johannes Eschler, Moritz Winkler, Nikolai Bauer
  • Patent number: 12142621
    Abstract: A method of manufacturing a connection structure, connection structure, film structure, and a method of manufacturing a film structure capable of mounting an electronic component having a plurality of terminal rows on a mounting surface by using existing equipment, including: a pasting step of pasting, from a film structure including a tape-shaped base material and a connection film formed thereon, connection films having a unit region of a predetermined length in the length direction of the base material and a predetermined width in the width direction to a first or second electronic component having a plurality of terminal rows; and a connecting step of connecting terminals of the first and second electronic components through the connection films, wherein the film structure includes, in the unit region, in addition to portions corresponding to the plurality of terminal rows, a non-pasting portion in which the connection film is not pasted.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: November 12, 2024
    Assignee: DEXERIALS CORPORATION
    Inventors: Yusuke Tanaka, Yusuke Kamata, Hidetsugu Namiki, Manabu Suzuki
  • Patent number: 12125958
    Abstract: A solid state die such as an LED (or OLED) die that is fitted in a hole such as a through hole in a carrier substrate such as a PCB. The die is to be connected to the PCB e.g. to tracks on the PCB. The electrical contacts on the die are arranged to be (e.g. substantially) in the same plane as the contacts on the carrier substrate such as the PCB. This is achieved by the holes in the substrate such as the PCB being adapted so that the dies fit into the holes or openings, i.e. are each taken up into an opening before electrical contacts are made.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: October 22, 2024
    Assignee: BARCO N.V.
    Inventor: Chien Chih Liu
  • Patent number: 12125835
    Abstract: There is provided a module package including a substrate, a photo sensor chip, a molded transparent layer and a glass filter. The substrate has an upper surface. The photo sensor chip is attached to the upper surface of the substrate and electrically connected to the substrate. The molded transparent layer covers the photo sensor chip and a part of the upper surface of the substrate, wherein a top surface of the molded transparent layer is formed with a receptacle opposite to the photo sensor chip. The glass filter is accommodated in the receptacle.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: October 22, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chee-Pin T'Ng, Sai-Mun Lee
  • Patent number: 12092522
    Abstract: An optical sensor device, includes an optical sensor that has a set of sensor elements, an optical filter that includes a plurality of regions, and one or more processors. A region, of the plurality of regions, includes a first set of optical channels comprising optical channels that are configured to pass light associated with respective subranges of a first wavelength range, a second set of optical channels comprising optical channels that are configured to pass light associated with respective subranges of a second wavelength range, and a third set of optical channels comprising optical channels that are configured to pass light associated with respective subranges of a third wavelength range. The one or more processors are configured to obtain, from the optical sensor, sensor data associated with a scene and determine image information associated with the scene based on the spectral information.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: September 17, 2024
    Assignee: VIAVI Solutions Inc.
    Inventor: William D. Houck
  • Patent number: 12080743
    Abstract: An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlying oxide disposed on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of image sensors, where the second level is bonded to the first level including an oxide to oxide bond; a plurality of pixel control circuits; a third level disposed underneath the first level, where the third level includes a plurality of third transistors, where the plurality of third transistors each include a single crystal channel; and a plurality of memory circuits.
    Type: Grant
    Filed: February 4, 2024
    Date of Patent: September 3, 2024
    Assignee: Monolithic 3D Inc.
    Inventors: Zvi Or-Bach, Deepak C. Sekar, Brian Cronquist
  • Patent number: 12057356
    Abstract: An electronic element mounting substrate according to the present disclosure includes a base body having a recessed portion including a mounting region on which an electronic element is mounted and a cutout section located on an outer periphery of the base body in a plane perspective, and a channel having an inner end portion located on an inner wall of the base body and an outer end portion located on the outer periphery of the base body. The inner end portion of the channel is open to the recessed portion, and the outer end portion of the channel is continuous with the cutout section.
    Type: Grant
    Filed: December 25, 2019
    Date of Patent: August 6, 2024
    Assignee: KYOCERA CORPORATION
    Inventor: Eiji Kukita
  • Patent number: 12040587
    Abstract: An optical semiconductor device includes a chassis that has an external wall, a feedthrough that penetrates the external wall of the chassis and has a projection portion projecting toward outside of the chassis from the external wall, a connection terminal that is electrically connected to a component mounted in the chassis and is on the projection portion of the feedthrough, a first temperature detector that is on an external face of the external wall of the chassis and detects a temperature of the chassis, and a flexible substrate of which an end is connected to the connection terminal and of which a portion spaced from the end is connected to the first temperature detector, wherein the first temperature detector is between the external wall and the flexible substrate.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: July 16, 2024
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Mitsuyoshi Miyata
  • Patent number: 12034093
    Abstract: Heat is efficiently discharged without impairing an imaging characteristic of a solid-state imaging element mounted on a substrate. A semiconductor device is provided with a substrate, the solid-state imaging element, and an adhesive portion that adheres the substrate and the solid-state imaging element. The substrate is a substrate provided with metal wiring. The solid-state imaging element is mounted on a surface of the substrate. The adhesive portion adheres a predetermined region on one surface of the solid-state imaging element to the substrate. The adhesive portion has predetermined thermal conductivity and discharges heat generated in the solid-state imaging element toward the substrate.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: July 9, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Toshiki Koyama
  • Patent number: 12027545
    Abstract: A sensor package structure is provided. The sensor package structure includes a substrate, a sensor chip disposed on the substrate, a plurality of wires electrically coupling the sensor chip to the substrate, a supporting colloid layer disposed on the substrate, and a light-permeable sheet that is disposed on the supporting colloid layer. The substrate has a first board surface and a second board surface that is opposite to the first board surface. The substrate has a chip-accommodating slot recessed in the first board surface. The sensor chip is disposed in the chip-accommodating slot, and a gap distance between a top surface of the sensor chip and the first board surface is less than or equal to 10 ?m. The supporting colloid layer is ring-shaped and is disposed on the first board surface, and each of the wires is at least partially embedded in the supporting colloid layer.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: July 2, 2024
    Assignee: TONG HSING ELECTRONIC INDUSTRIES, LTD.
    Inventors: Jui-Hung Hsu, Chien-Chen Lee
  • Patent number: 11996424
    Abstract: According to an aspect, an image sensor package includes a transparent member, a substrate, and an interposer disposed between and coupled to the transparent member and the substrate, where the interposer defines a first cavity area and a second cavity area. The image sensor package includes an image sensor die disposed within the first cavity area of the interposer, where the image sensor die has a sensor array configured to receive light through the transparent member and the second cavity area. The image sensor package includes a bonding material that couples the image sensor die to the interposer within the first cavity area.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: May 28, 2024
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Weng-Jin Wu
  • Patent number: 11963667
    Abstract: An endoscopic image capturing assembly is provided and includes a holder, an image sensing device, a conducting track, a cable and a lens set. The holder includes a first surface and a second surface perpendicular to the first surface. The image sensing device is mounted on the first surface and includes an electrical connecting component. The conducting track is formed from the first surface to the second surface of the holder and electrically connected to the electrical connecting component. The cable is mounted on the second surface. A terminal of the cable is electrically connected to the electrical connecting component of the image sensing device by the conducting track. The lens set is assembled with the image sensing device. An optical axis of the lens set is parallel to an extending direction of the cable. Furthermore, a related endoscopic device is provided.
    Type: Grant
    Filed: November 26, 2021
    Date of Patent: April 23, 2024
    Assignee: ALTEK BIOTECHNOLOGY CORPORATION
    Inventor: Te-Yu Chung
  • Patent number: 11929372
    Abstract: An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlying oxide disposed on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of image sensors, where the second level is bonded to the first level with an oxide to oxide bond; a plurality of pixel control circuits; a plurality of memory circuits; and a third level disposed underneath the first level, where the third level includes a plurality of third transistors.
    Type: Grant
    Filed: October 20, 2023
    Date of Patent: March 12, 2024
    Assignee: Monolithic 3D Inc.
    Inventors: Zvi Or-Bach, Deepak C. Sekar, Brian Cronquist
  • Patent number: 11894407
    Abstract: Provided are an imaging apparatus and an electronic device in which even if an image sensor is mounted on a wiring board, the wiring board on which the image sensor is mounted can be assembled to a housing with high accuracy. Provided is an imaging apparatus including a sensor chip and a wiring board having a glass base material. The imaging apparatus is joined to at least one of the sensor chip or the wiring board via a bump unit including a plurality of bumps, and each of the plurality of bumps is formed by conductive members having substantially the same composition.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: February 6, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Susumu Hogyoku
  • Patent number: 11855114
    Abstract: An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlying oxide disposed on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of semiconductor devices; a third level overlaying the second level, where the third level includes a plurality of image sensors, where the first level includes a plurality of landing pads, where the second level is bonded to the first level, where the bonded includes an oxide to oxide bond; and an isolation layer disposed between the second mono-crystal layer and the third level.
    Type: Grant
    Filed: February 6, 2023
    Date of Patent: December 26, 2023
    Assignee: Monolithic 3D Inc.
    Inventors: Zvi Or-Bach, Deepak C. Sekar, Brian Cronquist
  • Patent number: 11837686
    Abstract: An optical device package includes a substrate, a light emitting device, a light detecting device, one or more electronic chips, a clear encapsulation layer and a patterned reflective layer. The substrate has a surface. The light emitting device is disposed on the surface of the substrate, the light detecting device is disposed on the surface of the substrate, and the light emitting device and the light detecting device have a gap. The one or more electronic chips are at least partially embedded in the substrate, and electrically connected to the light emitting device and the light detecting device. The clear encapsulation layer is disposed on the surface of the substrate and encapsulates the light emitting device and the light detecting device. The patterned reflective layer is disposed on an upper surface of the clear encapsulation layer and at least overlaps the gap between the light emitting device and the light detecting device in a projection direction perpendicular to the surface of the substrate.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: December 5, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chanyuan Liu, Kuo-Hsien Liao, Alex Chi-Hong Chan, Fuh-Yuh Shih
  • Patent number: 11823991
    Abstract: A semiconductor device includes a circuit substrate, at least one semiconductor die, a first frame, and a second frame. The at least one semiconductor die is connected to the circuit substrate. The first frame is disposed on the circuit substrate and encircles the at least one semiconductor die. The second frame is stacked on the first frame. The first frame includes a base portion and an overhang portion. The base portion has a first width. The overhang portion is disposed on the base portion and has a second width greater than the first width. The overhang portion laterally protrudes towards the at least one semiconductor die with respect to the base portion. The first width and the second width are measured in a protruding direction of the overhang portion.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: November 21, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hung Chen, Shu-Shen Yeh, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Jeng
  • Patent number: 11762106
    Abstract: A scintillator array includes: a structure having at least one scintillator segment and a first reflective layer, the at least one scintillator segment and the first reflective layer having a first surface and a second surface, the at least one scintillator segment having a sintered compact containing a rare earth oxysulfide phosphor, and the first reflective layer being configured to reflect light; and a second reflective layer provided above the first surface via an adhesive layer, the adhesive layer having a thickness of 2 ?m or more and 40 ?m or less, and the second reflective layer having a film configured to reflect light.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: September 19, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.
    Inventors: Hiroyasu Kondo, Kazumitsu Morimoto
  • Patent number: 11764240
    Abstract: An image sensing chip package structure includes a chip, an adhesive loop and a light-transmissible substrate member. The chip includes an image sensing region. The adhesive loop is connected to the chip, and has an inner peripheral surface that defines a plurality of protrusions which surround the image sensing region of the chip. The light-transmissible substrate member is connected to the adhesive loop oppositely of the chip to cover the image sensing region of the chip. Methods of manufacturing the image sensing chip package structures are also provided.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: September 19, 2023
    Assignee: TONG HSING ELECTRONIC INDUSTRIES, LTD.
    Inventor: Chia-Shuai Chang
  • Patent number: 11703378
    Abstract: A metal stem includes a cylindrical portion in which an FPC inserting portion is formed, and a base standing upright from one plane of the cylindrical portion. A tubular lens cap with one open end is fixed to a peripheral portion of the one plane of the cylindrical portion, and has a lens mounted on a bottomed portion. A substrate mounted on one plane of the base includes a signal wiring layer and a ground wiring layer. An optical semiconductor element is mounted on the substrate and has a signal terminal connected to the signal wiring layer of the substrate, and a ground terminal connected to the ground wiring layer of the substrate. An FPC substrate is disposed so as to pass through the FPC inserting portion and to face the one plane of the base. The FPC substrate includes a signal wiring layer connected to the signal wiring layer of the substrate with a metal wire.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: July 18, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Mizuki Shirao, Seiki Nakamura, Kiyotomo Hasegawa
  • Patent number: 11609402
    Abstract: An electronic device includes a carrier substrate having a front face. An electronic chip is mounted on the front face of the carrier substrate and includes an optical component. An encapsulation cover is mounted on top of the front face of the carrier substrate and bounds a chamber within which the chip is situated. A front opening extends through the cover and is situated in front of the optical component. An optical element, designed to allow light to pass, is mounted within the chamber at a position which covers the front opening of the encapsulation cover. The optical element includes a central region designed to deviate the light and having an optical axis aligned with the front opening and the optical component. A positioning pattern is provided on the optical element to assist with mounting the optical element to the cover and mounting the cover to the carrier substrate.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: March 21, 2023
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Research & Development) Limited
    Inventors: Nicolas Mastromauro, Roy Duffy, Karine Saxod
  • Patent number: 11605663
    Abstract: An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlying oxide disposed on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of semiconductor devices; a third level overlaying the second level, where the third level includes a plurality of image sensors, where the first level includes a plurality of landing pads, where the second level is bonded to the first level, where the bonded includes an oxide to oxide bond; and an isolation layer disposed between the second mono-crystal layer and the third level.
    Type: Grant
    Filed: September 23, 2022
    Date of Patent: March 14, 2023
    Assignee: MONOLITHIC 3D INC.
    Inventors: Zvi Or-Bach, Deepak C. Sekar, Brian Cronquist
  • Patent number: 11585979
    Abstract: A photonic integrated circuit including first and second opto-electronic devices that are fabricated on a semiconductor wafer having an epitaxial layer stack including an n-type indium phosphide-based contact layer that is provided with at least one selectively p-type doped tubular-shaped region for providing an electrical barrier between respective n-type contact regions of the first and second opto-electronic devices that are optically interconnected by a passive optical waveguide that is fabricated in a non-intentionally doped waveguide layer including indium gallium arsenide phosphide, the non-intentionally doped waveguide layer being arranged on top of the n-type contact layer, wherein a first portion of the at least one selectively p-type doped tubular-shaped region is arranged underneath the passive optical waveguide between the first and second opto-electronic devices. An opto-electronic system including the photonic integrated circuit.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: February 21, 2023
    Assignee: EFFECT PHOTONICS B.V.
    Inventors: Pieter Ids Kuindersma, Boudewijn Docter
  • Patent number: 11552708
    Abstract: An inventive rotatable optical short-range transceiver has: a support which is rotatable around a rotation axis, an optical receiver which is arranged at the support on the rotation axis to receive an optical reception signal from a first direction, an optical transmitter which is arranged at the support to be adjacent to the optical receiver to emit an optical transmission signal in a second direction, and an optical transmission/reception unit which is configured to allow interruption-free rotatable optical data communication, wherein the optical transmission/reception unit is arranged at the support above the optical receiver and extends over the optical receiver and the optical transmitter, and wherein the optical transmission/reception unit has a support structure for mounting at the support, which is implemented integrally with the optical transmission/reception unit.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: January 10, 2023
    Inventors: Tobias Schneider, Alexander Noack, Michael Faulwaßer
  • Patent number: 11550106
    Abstract: Provided is an optical element module comprising: a mold body having a first surface formed on an upper portion thereof and a second surface formed on a lower portion thereof; an external connection terminal formed on the first surface and electrically connected to the outside; an optical engine embedded and sealed between the first surface and the second surface and having a connection pad exposed to the second surface; a conductive vertical via formed to penetrate the first surface and the second surface and having one end portion electrically connected to the external connection terminal; a wiring layer formed on the second surface to interconnect the other end of the conductive vertical via and the connection pad of the optical engine; and a reflective surface integrally formed on the wiring layer and transmits an optical signal generated by the optical engine or received by the optical engine.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: January 10, 2023
    Assignee: LIPAC CO., LTD.
    Inventor: Sang Don Lee
  • Patent number: 11543104
    Abstract: Disclosed are RCLED lamp bead packaging process and RCLED lamp bead, which comprises steps of: dispensing a die-bonding glue, mounting a chip, baking, welding a bonding wire, dispensing a first layer of anti-reflection adhesive, baking, dispensing a second layer of anti-reflection adhesive, baking, and testing. Anti-reflection adhesive is dispensed in corresponding area to cover part capable of reflecting light in RCLED lamp bead and eliminate reflection effect effectively. The first layer of anti-reflection adhesive fills in specified area rapidly to achieve high production efficiency. The second layer of anti-reflection adhesive flows slowly after glue dispensing, so that the glue dispensing precision is improved and the light-emitting hole is prevent from being covered. When bonding wire is welded, a bracket is the first welding spot and a PAD of the chip is the second welding spot to achieve a lower radian of the bonding wire.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: January 3, 2023
    Assignee: PSG OPTO DEVELOPMENT CO., LTD.
    Inventor: San Su
  • Patent number: 11543614
    Abstract: Misalignment of a substrate portion which integrates an image sensor and a substrate is suppressed. An imaging apparatus comprises: an imaging optical system including at least one optical element; a holding member holding the imaging optical system; an image sensor configured to capture a subject image formed by the imaging optical system; a substrate having the image sensor mounted thereon; and a bonding member fixing a substrate portion to the holding member, the substrate portion integrating the image sensor and the substrate, wherein the bonding member is partly in contact with a surface of the substrate portion, and at at least two positions in a part of the surface of the substrate portion in contact with the bonding member, the surface of the substrate portion faces different directions.
    Type: Grant
    Filed: August 15, 2018
    Date of Patent: January 3, 2023
    Assignee: KYOCERA Corporation
    Inventors: Hiroyuki Abe, Takahiro Okada
  • Patent number: 11545512
    Abstract: An image sensor package comprises: an image sensor chip configured to convert light collected from an outside thereof into an electrical signal; a package substrate disposed under the image sensor chip the package substrate configured to process the electrical signal converted from the image sensor chip; a glass substrate disposed over the image sensor chip while being spaced apart from the image sensor chip; a seal pattern disposed between an upper surface of the package substrate and a lower surface of the glass substrate while surrounding the image sensor chip; and a protection pattern disposed on the package substrate outside the seal pattern, the protection pattern comprising a single-component material, wherein the seal pattern comprises a material different from the material of the protection pattern.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: January 3, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chajea Jo, Ohguk Kwon, Hyoeun Kim, Seunghoon Yeon
  • Patent number: 11528399
    Abstract: A tablet computing system may include a housing member defining a first portion of a back exterior surface of the tablet computer, at least a portion of a side exterior surface of the tablet computer, a raised rim extending from the back exterior surface and at least partially defining a sensor assembly hole extending through the housing member, and a support ledge positioned in the sensor assembly hole. The tablet computing system may also include a frame member positioned at least partially in the sensor assembly hole and coupled to the support ledge, a camera bracket coupled to the frame member, a first camera module coupled to the camera bracket, aa second camera module coupled to the camera bracket, the camera bracket fixing the relative positions of the first camera module and the second camera module, and a cover member positioned in the sensor assembly hole and attached to the frame member.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: December 13, 2022
    Assignee: APPLE INC.
    Inventors: John K. Queeney, James A. Stryker, Jeremy Hill, Kienan D. McCarty, Lee B. Hamstra, Tavys Q. Ashcroft, Trevor M. Cardiff
  • Patent number: 11520061
    Abstract: A radiation imaging device according to one embodiment includes a radiation detection panel having a first surface on which a detection region is formed, and a second surface on a side opposite to the first surface, a base substrate having a support surface configured to face the second surface and configured to support the radiation detection panel, and a flexible circuit substrate connected to the radiation detection panel, wherein an end portion of the base substrate corresponding to a portion to which the flexible circuit substrate is connected is located further inward than an end portion of the radiation detection panel when seen in a first direction orthogonal to the support surface, and the base substrate has a protruding portion which protrudes further outward than the radiation detection panel at a position at which the base substrate does not overlap the flexible circuit substrate when seen in the first direction.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: December 6, 2022
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryuji Kyushima, Kazuki Fujita, Junichi Sawada, Takao Aritake, Minoru Ichikawa, Haruyoshi Okada, Seiji Fukamizu, Shuhei Namba
  • Patent number: 11488997
    Abstract: An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlaying oxide on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of semiconductor devices; a third level overlaying the second level, where the third level includes a plurality of image sensors, where the second level is bonded to the first level, where the bonded includes an oxide to oxide bond; and an isolation layer disposed between the second mono-crystal layer and the third level.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: November 1, 2022
    Assignee: Monolithic 3D Inc.
    Inventors: Zvi Or-Bach, Deepak C. Sekar, Brian Cronquist
  • Patent number: 11482559
    Abstract: An optical semiconductor device includes a semiconductor light receiving element, a capacitor, and a carrier. The carrier has a mounting surface on which the semiconductor light receiving element and the capacitor are mounted. The optical semiconductor device includes a first conductive pattern including a first mounting area and a first bonding pad, a second conductive pattern including a second mounting area and a third mounting area, and a third conductive pattern including a second bonding pad. The first mounting area is connected to a first electrode of the semiconductor light receiving element. The second mounting area is connected to a second electrode of the semiconductor light receiving element. The third mounting area is connected to one electrode of the capacitor. The conductive patterns are separated from each other. The other electrode of the capacitor is electrically connected to the third conductive pattern via a wire.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: October 25, 2022
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Kyohei Maekawa
  • Patent number: 11476229
    Abstract: According to an embodiment, a temperature of an inside of a furnace is set to fall within a range of a reduction temperature or more of a carboxylic acid and less than a melting temperature of a solder bump, and the inside is concurrently set to have a first carboxylic acid gas concentration. Thereafter, the temperature of the inside is raised up to the melting temperature, and the inside is concurrently set to have a second carboxylic acid gas concentration. The second carboxylic acid gas concentration is lower than the first carboxylic acid gas concentration, and is a concentration containing a minimum amount of carboxylic acid gas defined to achieve reduction on an oxide film of the solder bump. The inside has the second carboxylic acid gas concentration at least at a time when the temperature of the inside reaches the melting temperature.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: October 18, 2022
    Assignee: Kioxia Corporation
    Inventor: Chikara Miyazaki
  • Patent number: 11464392
    Abstract: An optical module is configured being provided with: a first case fixed to an implementation surface of an implementation substrate to cover an LD and an LD driver; a first filler filled in the first case to seal the LD and the LD driver; a second case fixed to the implementation surface of the implementation substrate to cover the first case in a state of not adhering to the first case; a third case accommodating the implementation substrate and the second case inside; and a second filler filled in the third case to seal the implementation substrate and the second case.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: October 11, 2022
    Assignee: OLYMPUS CORPORATION
    Inventors: Tsutomu Urakawa, Susumu Kawata
  • Patent number: 11404466
    Abstract: An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlaying oxide on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of first image sensors; and a third level overlaying the second level, where the third level includes a plurality of second image sensors, where the second level is bonded to the first level, where the bonded includes an oxide to oxide bond; and an isolation layer disposed between the second mono-crystal layer and the third level.
    Type: Grant
    Filed: August 14, 2021
    Date of Patent: August 2, 2022
    Assignee: MONOLITHIC 3D INC.
    Inventors: Zvi Or-Bach, Deepak C. Sekar, Brian Cronquist
  • Patent number: 11393866
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming an image sensor in which a device layer has high crystalline quality. According to some embodiments, a hard mask layer is deposited covering a substrate. A first etch is performed into the hard mask layer and the substrate to form a cavity. A second etch is performed to remove crystalline damage from the first etch and to laterally recess the substrate in the cavity so the hard mask layer overhangs the cavity. A sacrificial layer is formed lining cavity, a blanket ion implantation is performed into the substrate through the sacrificial layer, and the sacrificial layer is removed. An interlayer is epitaxially grown lining the cavity and having a top surface underlying the hard mask layer, and a device layer is epitaxially grown filling the cavity over the interlayer. A photodetector is formed in the device layer.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: July 19, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Chun Liu, Yung-Chang Chang, Eugene I-Chun Chen
  • Patent number: 11317531
    Abstract: A microelectronic device includes an accommodating housing, a circuit board, an electronic component, and a conducting wire. The accommodating housing has an accommodating space therein. The circuit board is disposed within the accommodating space, and has a first and a second end surface disposed opposite to each other. The first end surface includes a first conductive contact, and a lateral side of the circuit board includes a receiving hole being a half-open hole extending from the second end surface. A second conductive contact is disposed on the surface of the receiving hole and electrically connected to the first conductive contact via an internal power layer of the circuit board. The electronic component is disposed on the first end surface and electrically connected to the first conductive contact. One end of the conducting wire is disposed in the receiving hole and electrically connected to the second conductive contact.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: April 26, 2022
    Assignee: ALTEK BIOTECHNOLOGY CORPORATION
    Inventors: Hsi-Hsin Loo, Chun-Wei Liu, Chao-Yu Chou
  • Patent number: 10388841
    Abstract: A light emitting device may include a substrate; a body which is disposed on the substrate and has a first hole having a predetermined size and a light emitting chip which is disposed within a cavity formed by the substrate and the first hole of the body. A cap may be disposed on the body and may have a second hole having a predetermined size. A transparent window may be disposed in the second hole. A lower portion of the cap is divided into a first surface and a second surface more projecting downwardly than the first surface, and at least a portion of the first surface is attached and fixed to the body.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: August 20, 2019
    Assignee: LG Innotek Co., Ltd.
    Inventors: Byung Mok Kim, Hiroshi Kodaira, Su Jung Jung, Bo Hee Kang, Young Jin No, Yuichiro Tanda, Satoshi Ozeki
  • Patent number: 10243013
    Abstract: An imaging apparatus includes a substrate including an imaging element, one or two attachment portions that attach the substrate by screwing and are capable of inclining a board surface of the substrate, by screwing in a screw, relative to a plane perpendicular to an optical axis of an optical system that forms an optical image on the imaging element; and one or more supports configured to abut the substrate from an opposite direction to a screwing direction of the attachment portion at any position, on the substrate, that rotates in the screwing direction of the attachment portion when the board surface is inclined by screwing. As a result, an imaging apparatus that allows an imaging element to be installed at a desired position and orientation while reducing the size of the substrate is provided.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: March 26, 2019
    Assignee: KYOCERA Corporation
    Inventors: Takatoshi Nakata, Makoto Suzuki, Takahiro Okada
  • Patent number: 10171715
    Abstract: A camera module includes a circuit board, a camera device and an image processing chip. An image sensation chip of the camera device is directly integrated with the circuit board by means of chip-on-board (COB) manufacturing process to minify the total volume of the camera module, whereby the camera module can be disposed in a narrow space.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: January 1, 2019
    Assignee: ASIA VITAL COMPONENTS CO., LTD.
    Inventors: Wei-Chuan Wang, Xin-Lian Cheng, Ting-Yu Lin, Chun-Mei Zhang, Chin-Lian Yeh
  • Patent number: 9923020
    Abstract: Embodiments of the present invention provide a camera module and a method of manufacturing the same, the camera module comprising a sensor assembly, at least one semiconductor substrate, and a molding compound; wherein the sensor assembly comprises a semiconductor die, a sensor circuit disposed on the top surface of the semiconductor die, and a transparent cover coupled to the semiconductor die over the top surface of the semiconductor die; wherein each semiconductor substrate is disposed around the sensor assembly in a horizontal direction; and wherein the molding compound is filled between each semiconductor substrate and the sensor assembly.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: March 20, 2018
    Assignee: STMICROELECTRONICS (SHENZHEN) R&D CO., LTD.
    Inventor: Jing-En Luan
  • Patent number: 9526171
    Abstract: A package structure is provided, which includes: a substrate having opposite first and second surfaces; at least an electronic element disposed on the first surface of the substrate; and an encapsulant formed on the first surface of the substrate for encapsulating the electronic element. The encapsulant has a non-rectangular shape so as to reduce an ineffective space in the encapsulant.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: December 20, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Liang Shih, Hsin-Lung Chung, Te-Fang Chu, Hao-Ju Fang, Kuang-Neng Chung
  • Patent number: 9419034
    Abstract: An image sensor module includes a substrate, an image sensor mounted on the substrate, a holder position on the substrate, a lens barrel for holding a lens module and at least one spring. The spring is positioned between the holder and the lens barrel, and the spring exerts forces on the holder and the lens barrel; and the lens barrel has at least one hole, and a screw penetrates through the hole and is screwed into the holder.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: August 16, 2016
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventor: Yu-Feng Yen
  • Patent number: 9040352
    Abstract: A semiconductor device package having a cavity formed using film-assisted molding techniques is provided. Through the use of such techniques the cavity can be formed in specific locations in the molded package, such as on top of a device die mounted on the package substrate or a lead frame. In order to overcome cavity wall angular limitations introduced by conformability issues associated with film-assisted molding, a gel reservoir feature is formed so that gel used to protect components in the cavity does not come in contact with a lid covering the cavity or the junction between the lid and the package attachment region. The gel reservoir is used in conjunction with a formed level setting feature that controls the height of gel in the cavity. Benefits include decreased volume of the cavity, thereby decreasing an amount of gel-fill needed and thus reducing production cost of the package.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: May 26, 2015
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Shun Meen Kuo, Li Li
  • Patent number: 8778705
    Abstract: A light-emitting diode (“LED”) device has an LED chip attached to a substrate. The terminals of the LED chip are electrically coupled to leads of the LED device. Elastomeric encapsulant within a receptacle of the LED device surrounds the LED chip. A second encapsulant is disposed within an aperture of the receptacle on the elastomeric encapsulant.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: July 15, 2014
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventor: Tong Fatt Chew