Encapsulation (epo) Patents (Class 257/E31.117)
  • Patent number: 12165942
    Abstract: Integrated circuit packaging with cavities and methods of manufacturing the same are disclosed. An example apparatus includes a semiconductor die and a housing enclosing portions of the semiconductor die. The housing defines an opening that extends from a surface of the semiconductor die to an external environment, the housing formed of a first material. The example apparatus includes a second material disposed within the opening to block exposure of the semiconductor die to the external environment.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: December 10, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jesus Bajo Bautista, Jr., Jeffrey Dorado Emperador, Francis Masiglat de Vera
  • Patent number: 12015098
    Abstract: Provided is a photodetection apparatus which includes a mounting board, and an optical sensor device that includes a first surface on the mounting board side and a second surface on a side opposite to the mounting board, and is mounted on the mounting board. The optical sensor device includes an optical sensor that includes a light receiving surface on the second surface side, a signal processing circuit that is electrically connected to the optical sensor, and a lead frame that is provided on the second surface side with respect to the signal processing circuit, and shields a surface of the signal processing circuit on the second surface side. The mounting board has a conductive pattern that faces the signal processing circuit and shields a surface of the signal processing circuit on the first surface side.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: June 18, 2024
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Koji Matsushita, Yoshihiko Koizumi
  • Patent number: 12002827
    Abstract: An image sensor package includes: an image sensor chip that includes first and second faces that are opposite to each other and includes side walls that connect the first and second faces; a mold layer disposed on the side walls of the image sensor chip and that includes third and fourth faces that are opposite to each other; a transparent substrate disposed on the second face of the image sensor chip and spaced apart from the image sensor chip in a first direction, the transparent substrate including a first portion that overlaps the image sensor chip in the first direction and a second portion that does not overlap the image sensor chip in the first direction; and an adhesive layer disposed between the mold layer and the second portion of the transparent substrate, wherein the side walls of the image sensor chip overlap the mold layer in a second direction intersecting the first direction and the fourth face of the mold layer does not overlap the image sensor chip in the first direction.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: June 4, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Dong Hoon Kang
  • Patent number: 11810846
    Abstract: A dielectric layer is formed over a substrate, an anti-reflective layer is formed over the dielectric layer, and a first hardmask is formed over the anti-reflective layer. A via opening and a trench opening are formed within the dielectric layer using the anti-reflective layer and the first hardmask as masking materials. After the formation of the trench opening and the via opening, the first hardmask is removed. An interconnect is formed within the openings, and the interconnect has a via with a profile angle of between about 70° and about 80° and a depth ratio of between about 65% and about 70%.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: November 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Ching Tsai, Yi-Wei Chiu, Hung Jui Chang, Li-Te Hsu
  • Patent number: 11706519
    Abstract: A camera includes a lens barrel, a holder, a filter disposed in the holder, a circuit board having an aperture, a reinforcing member including a first region corresponding to the aperture and a second region in which the circuit board is disposed, and an image sensor disposed in the first region of the reinforcing member. The first region of the reinforcing member includes a protruding part protruding farther than the second region of the reinforcing member. The image sensor is disposed on the upper surface of the protruding part.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: July 18, 2023
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Min Soo Kim, In Hoe Kim, Hyun Ah Oh, Sung Il Lee, Jong Ho Chung
  • Patent number: 11627239
    Abstract: A camera module and its photosensitive assembly and manufacturing method thereof are provided. The photosensitive assembly includes a photosensitive element, a window circuit board and a packaging body integrally packaged the photosensitive element and the window circuit board to form an integrated body, wherein the window circuit board has at least one window for receiving the photosensitive element therein.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: April 11, 2023
    Assignee: NINGBO SUNNY OPOTECH CO., LTD.
    Inventors: Mingzhu Wang, Zhenyu Chen, Takehiko Tanaka, Zhongyu Luan, Bojie Zhao, Zhen Huang, Nan Guo, Fengsheng Xi, Heng Jiang, Zilong Deng
  • Patent number: 11493729
    Abstract: An image sensor includes a pixel portion in which a plurality of unit pixels each having one micro lens and a plurality of photoelectric conversion portions are arrayed in a matrix, a signal readout portion that reads out signals accumulated in the photoelectric conversion portions and converts the read signals to digital signals, a signal processor that processes signals read out by the signal readout portion and has an image capture signal processor that performs signal processing for generating a captured image on signals read out by the signal readout portion and a focus detection signal processor that performs signal processing for focus detection on signals read out by the signal readout portion, and an output portion that outputs signals processed by the signal processor.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: November 8, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Mie Ishii, Ken Sasaki
  • Patent number: 10854651
    Abstract: An image sensing device includes an interconnect layer and a number of grid array contacts arranged on a bottom side of the interconnect layer. An image sensor integrated circuit (IC) is carried by the interconnect layer and has an image sensing surface. A number of electrical connections are coupled between the image sensor IC and an upper side of the interconnect layer. A transparent plate overlies the image sensing surface of the image sensor IC. A cap is carried by the interconnect layer and has an opening overlying transparent plate and the image sensing surface. The cap has an upper wall spaced above the interconnect layer and the image sensor IC to define an internal cavity and the cap defines an air vent coupled to the internal cavity.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: December 1, 2020
    Assignee: STMICROELECTRONICS PTE LTD
    Inventors: Jean-Michel Grebet, Wee Chin Judy Lim
  • Patent number: 10720394
    Abstract: An electronic component mounting board includes an inorganic substrate, a wiring board, and a bond. The inorganic substrate includes an electronic component mounting portion in a central area of an upper surface of the inorganic substrate in which an electronic component is mountable. The wiring board is a frame surrounding the electronic component mounting portion on the upper surface of the inorganic substrate. The bond is located between the inorganic substrate and the wiring board. The inorganic substrate includes a downward bend outward from a bond area including the bond.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: July 21, 2020
    Assignee: KYOCERA CORPORATION
    Inventors: Takuji Okamura, Akihiko Funahashi
  • Patent number: 10403661
    Abstract: An image sensing device includes an interconnect layer and a number of grid array contacts arranged on a bottom side of the interconnect layer. An image sensor integrated circuit (IC) is carried by the interconnect layer and has an image sensing surface. A number of electrical connections are coupled between the image sensor IC and an upper side of the interconnect layer. A transparent plate overlies the image sensing surface of the image sensor IC. A cap is carried by the interconnect layer and has an opening overlying transparent plate and the image sensing surface. The cap has an upper wall spaced above the interconnect layer and the image sensor IC to define an internal cavity and the cap defines an air vent coupled to the internal cavity.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: September 3, 2019
    Assignee: STMICROELECTRONICS PTE LTD
    Inventors: Jean-Michel Grebet, Wee Chin Judy Lim
  • Patent number: 10302896
    Abstract: An optical part includes a lens and a holder having the lens fixed thereto. The holder is a cylindrical member including a front surface, a back surface, an outer peripheral surface, and an inner peripheral surface. The back surface contacts the lens, and part of the inner peripheral surface penetrates the lens.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: May 28, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shusuke Tobita
  • Patent number: 10181434
    Abstract: A lead frame for a packaged integrated circuit (IC) device has alternating first and second leads that protrude from a package body in respective first and second planes, where the second plane is parallel to and below the first plane. The first leads are formed into Gull Wing shaped leads and the second leads are formed into J-shaped leads. Inner lead portions of the first and second leads are maintained in the first plane with a tape. An inner lead portion of each of the second leads includes a deformation area that facilitates maintaining the tape in contact with the inner lead area of the second leads, even when a mold tool presses down on an outer lead side of the second leads to place the outer lead ends of the second leads in the second plane.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: January 15, 2019
    Assignee: NXP USA, INC.
    Inventors: Xingshou Pang, Jinzhong Yao, Zhigang Bai, Meng Kong Lye
  • Patent number: 10126505
    Abstract: An optical element module includes an optical modulation element having first and second optical modulator units, a polarization combining means for combining two modulated lights which are emitted from the first and second optical modulator units, by making planes of polarization orthogonally cross each other; a housing which houses the optical modulation element and the polarization combining means; and a lens holder which holds a collimating lens which is disposed between the polarization combining means and an optical fiber, with the lens holder further holding the optical fiber. The optical element module is configured by joining the housing and the lens holder together by welding. In the lens holder, an outer diameter of a welding place is smaller than an outer diameter of a part which holds the collimating lens.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: November 13, 2018
    Assignee: SUMITOMO OSAKA CEMENT CO., LTD.
    Inventors: Tokutaka Hara, Toshio Kataoka
  • Patent number: 10084117
    Abstract: A light emitting device includes a light emitting element, a wire connected to the light emitting element, and a substrate supporting the light emitting element. The substrate is formed with a first recess and a second recess that are open in a common surface of the substrate. The first recess includes a first bottom surface and a first side surface connected to the first bottom surface, and the light emitting element is disposed on the first bottom surface. The second recess includes a second bottom surface and a second side surface connected to the second bottom surface, and the wire is bonded to the second bottom surface. Both of the first side surface and the second side surface reach the common surface. The first side surface is connected to both of the second bottom surface and the second side surface. The opening area of the first recess is larger than the opening area of the second recess.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: September 25, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Yuki Tanuma, Tomoharu Horio
  • Patent number: 10068818
    Abstract: A semiconductor element package includes a base body, a frame member, and a terminal member. The frame member is provided on a main surface of the base body. A notch is formed on the base body side of this frame member. The notch is a gap between the one main surface of the base body and the frame member. The terminal member is provided so as to cover the notch as the gap. The terminal member includes a first dielectric layer, a plurality of signal wiring conductors and a plurality of coplanar ground conductor layers that are provided on one surface of the first dielectric layer, and a second dielectric layer. The first dielectric layer has a hole provided open in a region of the one surface between a first wiring conductor and a second wiring conductor.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: September 4, 2018
    Assignee: Kyocera Corporation
    Inventor: Yoshiki Kawazu
  • Patent number: 10044169
    Abstract: An optical component includes a support member having a through-hole, a second light-transmissive member disposed inside the through-hole, and having a light incidence face, a light emission face, and an outer peripheral side surface, and at least one functional film selected from a group consisting of a short pass filter, a long pass filter, and a heat dissipation member and disposed on a surface of the second light-transmissive member.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: August 7, 2018
    Assignee: NICHIA CORPORATION
    Inventor: Takeshi Okada
  • Patent number: 10036857
    Abstract: An alignment assembly for disposition in an insert for an expanded beam connector, said alignment assembly comprising: (a) at least one cylindrical sleeve having an inner first diameter, and an outer diameter configured to be received in said insert of said connector; (b) a lens disposed in said sleeve, and having a round periphery with a second diameter larger than said first diameter; and (c) wherein said sleeve is configured to at least partially accept a ferrule having a round periphery with a third diameter essentially the same as the second diameter, said ferrule comprising a fiber for optically coupling with said lens.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: July 31, 2018
    Assignee: TE CONNECTIVITY CORPORATION
    Inventor: Soren Grinderslev
  • Patent number: 9867286
    Abstract: A circuit board is described. The circuit board comprises an electrically insulating diamond material having a surface. The electrically insulating diamond material has at least one recess extending into only a portion of a thickness of the electrically insulating diamond material from the surface of the electrically insulating diamond material. The circuit board also comprises an electrically conductive material located at least partially within the recess.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: January 9, 2018
    Assignees: National ICT Australia Limited, The University of Melbourne
    Inventors: Samantha Lichter, Nicholas Apollo, David Garrett, Kumaravelu Ganesan, Hamish Meffin, Steven Prawer
  • Patent number: 9831395
    Abstract: A light emitting device includes a body having a cavity and a step difference structure around the cavity, a plurality of electrodes in the cavity, a light emitting chip in the cavity, a transparent window having an outer portion provided on the step difference structure to cover the cavity, and an adhesive member between the transparent window and the body. The adhesive member includes a first adhesive member between an outer bottom surface of the transparent window and a bottom of the step difference structure and a second adhesive member between the outer portion of the transparent window and the body.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: November 28, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Baek Jun Kim, Hiroshi Kodaira, Ki Man Kang, Ha Na Kim, Hyun Don Song, Jung Woo Lee, Jung Hun Oh
  • Patent number: 9793680
    Abstract: An optical component includes a support member having a through-hole, a second light-transmissive member disposed inside the through-hole, and having a light incidence face, a light emission face, and an outer peripheral side surface, and at least one functional film selected from a group consisting of a short pass filter, a long pass filter, and a heat dissipation member and disposed on a surface of the second light-transmissive member.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: October 17, 2017
    Assignee: Nichia Corporation
    Inventor: Takeshi Okada
  • Patent number: 9614347
    Abstract: An optical communication device, reception apparatus, transmission apparatus and transmission and reception system are disclosed. The optical communication device includes a drive circuit substrate. A first through via extends through the drive circuit substrate and is configured to electrically connect an optical element disposed on a first surface side of the drive circuit substrate to a drive circuit disposed on a second surface side of the drive circuit substrate. A positioning element is attached to an interposer substrate and is configured to align optical axes of a first lens that is attached to a lens substrate and that faces a second lens that is disposed on the first surface side of the drive circuit substrate. A second through via extends through the interposer substrate and electrically connects the drive circuit to a signal processing circuit disposed on a signal processing substrate positioned above the interposer substrate.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: April 4, 2017
    Assignee: Sony Corporation
    Inventors: Shinji Rokuhara, Shusaku Yanagawa, Eiji Otani, Shuichi Oka, Kazunao Oniki, Hiizu Ootorii
  • Patent number: 9490606
    Abstract: An optical component includes a support member having a through-hole, a second light-transmissive member disposed inside the through-hole, and having a light incidence face, a light emission face and an outer peripheral side surface, and an outer peripheral side surface, a fused first light-transmissive member formed between an inner wall of the through-hole and the outer peripheral side surface of the second light-transmissive member.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: November 8, 2016
    Assignee: NICHIA CORPORATION
    Inventor: Takeshi Okada
  • Patent number: 9478677
    Abstract: An electronic device includes a substrate plate with a traversing passage. An electronic component, mounted to the substrate plate, includes an integrated circuit chip with an optical sensor and an opaque protective plate mounted above the sensor. The electronic component is mounted with the chip facing the substrate plate such that the protective plate is engaged with the traversing passage. Electrical connection elements extend between the chip and the substrate plate. An internal block of encapsulation material extends into the traversing passage of the substrate plate between the chip and the substrate plate so as to embed the electrical connection elements.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: October 25, 2016
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Julien Pruvost, Romain Coffy
  • Patent number: 9470856
    Abstract: A method of manufacturing a photoelectric composite substrate, includes: aligning and fixing an optical element having a solder terminal to an optical waveguide for forming a path of an optical signal on a printed circuit board; mounting the optical waveguide, to which the optical element is fixed, on the printed circuit board; and welding the solder terminal to an electrode of a package installed on the printed circuit board or an electrode of the printed circuit board.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: October 18, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Tetsuro Yamada, Akiko Matsui, Yoshiyuki Hiroshima, Takahiro Ooi, Kohei Choraku
  • Patent number: 9318677
    Abstract: Embodiments include a light emitting device package. The light emitting device package comprises a housing including a cavity; a light emitting device positioned in the cavity; a lead frame including a first section electrically connected to the light emitting device in the cavity, a second section, which penetrates the housing, extending from the first section and a third section, which is exposed to outside air, extending from the second section; and a metal layer positioned on an area defined by a distance which is distant from the housing in the second section of the lead frame.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: April 19, 2016
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Ki Bum Kim
  • Patent number: 9024403
    Abstract: An image sensor package and image sensor chip capable of being slenderized while enhancing the reliability with respect to physical impact are provided. The image sensor package includes an image sensor chip provided with a pixel domain at a central portion of an upper surface thereof, a substrate disposed at an upper side of the image sensor chip so as to be flip-chip bonded with respect to the image sensor chip, provided with a hole formed at a position corresponding to the pixel domain, and formed of organic material, a printed circuit board at which the substrate provided with the image sensor chip bonded thereto is mounted, and a solder ball configured to electrically connect the substrate to the printed circuit board.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: May 5, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae Sang Park, Hyo Young Shin
  • Patent number: 9013018
    Abstract: A moisture barrier, device or product having a moisture barrier or a method of fabricating a moisture barrier having at least a polymer layer, and interfacial layer, and a barrier layer. The polymer layer may be fabricated from any suitable polymer including, but not limited to, fluoropolymers such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), or ethylene-tetrafluoroethylene (ETFE). The interfacial layer may be formed by atomic layer deposition (ALD). In embodiments featuring an ALD interfacial layer, the deposited interfacial substance may be, but is not limited to, Al2O3, AlSiOx, TiO2, and an Al2O3/TiO2 laminate. The barrier layer associated with the interfacial layer may be deposited by plasma enhanced chemical vapor deposition (PECVD). The barrier layer may be a SiOxNy film.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: April 21, 2015
    Assignees: Beneq Oy, U.S. Department of Energy
    Inventors: Joel W. Pankow, Gary J. Jorgensen, Kent M. Terwilliger, Stephen H. Glick, Nora Isomaki, Kari Harkonen, Tommy Turkulainen
  • Patent number: 8969978
    Abstract: A pressure sensor system comprising a pressure sensor chip is disclosed. The pressure sensor chip comprises a sensing side where pressure sensing is performed and one or more interconnections where electrical connections are made at the other side of the chip. The pressure sensor comprising an integrated circuit (1) forming a substrate, the substrate comprising a membrane shaped portion adapted for being exposed to the pressure, the integrated circuit (1) comprising both pressure signal sensing components and pressure signal processing components.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: March 3, 2015
    Assignee: Melexis Technologies NV
    Inventors: Laurent Otte, Appolonius Jacobus Van Der Wiel
  • Patent number: 8952335
    Abstract: Bias lines are provided for respective columns of pixels, and of a plurality of bias lines, bias lines provided at an interval of 10 mm are connected to a bias power source through a current detector. The remaining bias lines are connected directly to the bias power source without passing through the current detector. In each pixel, if electric charge is generated by a radiation detection element in accordance with the dose of irradiated radiation, a current flows in the bias line in accordance with the generated electric charge. The current detector detects the current flowing in the bias line, and a control unit detects, as the timing of starting irradiation of a radiation, when the detected current (current value) is equal to or greater than a threshold value, and starts radiographing of a radiological image.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: February 10, 2015
    Assignee: Fujifilm Corporation
    Inventor: Keiichiro Sato
  • Patent number: 8871553
    Abstract: A moisture trapping filler composition may include a filler material combined with a desiccant material.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: October 28, 2014
    Assignee: First Solar, Inc.
    Inventors: Wenlai Feng, Brian Cohen, Bruce Bengtson, Casimir Kotarba
  • Patent number: 8866181
    Abstract: In at least one embodiment of the component (10) the latter comprises a first substrate (1) and a second substrate (2), at least one radiation-emitting or radiation-receiving element (3) being arranged on the first substrate (1), which element contains at least one organic material. The first substrate (1) and the second substrate (2) are arranged relative to one another such that the element (3) is located between the first substrate (1) and second substrate (2). The first substrate (1) and second substrate (2) are bonded together mechanically by means of a bonding agent (4) arranged in a sheet between the first substrate (1) and the second substrate (2), which bonding agent contains a glass and surrounds the element (3) with the organic material in the manner of a frame.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: October 21, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Marc Philippens, Tilman Schlenker, Karsten Heuser
  • Patent number: 8847243
    Abstract: A semiconductor package includes a transmissive support plate and includes at least one elongate hole. An integrated circuit semiconductor device is mounted on a rear face of the support plate. The semiconductor device includes first and second optical elements oriented towards the rear face of the support plate, where the first and second optical elements are placed on either side of the elongate hole. An encapsulation material made of an opaque material encapsulates the semiconductor device and fills the elongate hole so as to form an optical insulation partition between the first and second optical elements. A cavity is left, however, between each optical element and a rear face of the support plate.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: September 30, 2014
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Romain Coffy, Emmanuelle Vigier-Blanc
  • Patent number: 8816485
    Abstract: Materials, and methods that use such materials, that are useful for forming chip stacks, chip and wafer bonding and wafer thinning are disclosed. Such methods and materials provide strong bonds while also being readily removed with little or no residues.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: August 26, 2014
    Assignee: Sumitomo Bakelite Co., Ltd.
    Inventors: Chris Apanius, Robert A. Shick, Hendra Ng, Andrew Bell, Wei Zhang, Phil Neal
  • Patent number: 8779567
    Abstract: In a semiconductor device including a semiconductor element and a wiring substrate on which the semiconductor element is mounted. The wiring substrate includes an insulating substrate and conductive wiring formed in the insulating substrate and electrically connected to the semiconductor element. The conductive wiring includes an underlying layer formed on the insulating substrate, a main conductive layer formed on the underlying layer, and an electrode layer covering side surfaces of the underlying layer and side surfaces and an upper surface of the main conductive layer. The underlying layer includes an adhesion layer being formed in contact with the insulating substrate and containing an alloy of Ti.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: July 15, 2014
    Assignee: Nichia Corporation
    Inventors: Takuya Noichi, Yuichi Okada
  • Patent number: 8778705
    Abstract: A light-emitting diode (“LED”) device has an LED chip attached to a substrate. The terminals of the LED chip are electrically coupled to leads of the LED device. Elastomeric encapsulant within a receptacle of the LED device surrounds the LED chip. A second encapsulant is disposed within an aperture of the receptacle on the elastomeric encapsulant.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: July 15, 2014
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventor: Tong Fatt Chew
  • Patent number: 8772070
    Abstract: A method for manufacturing solid-state imaging device for collectively manufacturing a multiplicity of solid-state imaging devices at a wafer level, the method including: a step of reducing the thickness of a cover glass wafer (10) after providing a mask material (12) to the cover glass wafer (10) including frame-shaped spacers (5); a step of releasing the mask material (12) and laminating a first support wafer (14) through a lamination member (16); a step of positioning and bonding a silicon wafer (18) and the cover glass wafer (10), the silicon wafer (18) including a second support wafer (22) laminated on the back side through a lamination member (24); a step of dicing the cover glass wafer (10) into cover glasses (4) by a whetstone (26); and a step of dicing the silicon wafer (18) by a whetstone (28).
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: July 8, 2014
    Assignee: FUJIFILM Corporation
    Inventor: Miyuki Watanabe
  • Patent number: 8753957
    Abstract: This invention relates to a method for producing solar cells, and photovoltaic panels thereof. The method for producing solar panels comprises employing a number of semiconductor wafers and/or semiconductor sheets of films prefabricated to prepare them for back side metallization, which are placed and attached adjacent to each other and with their front side facing downwards onto the back side of the front glass, before subsequent processing that includes depositing at least one metal layer covering the entire front glass including the back side of the attached wafers/sheets of films. The metallic layer is then patterned/divided into electrically isolated contacts for each solar cell and into interconnections between adjacent solar cells.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: June 17, 2014
    Assignee: Rec Solar Pte. Ltd.
    Inventors: Martin Nese, Erik Sauar, Andreas Bentzen, Paul Alan Basore
  • Patent number: 8749009
    Abstract: Active or functional additives are embedded into surfaces of host materials for use as components in a variety of electronic or optoelectronic devices, including solar devices, smart windows, displays, and so forth. Resulting surface-embedded device components provide improved performance, as well as cost benefits arising from their compositions and manufacturing processes.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: June 10, 2014
    Assignee: Innova Dynamics, Inc.
    Inventors: Michael Eugene Young, Arjun Daniel Srinivas, Matthew R. Robinson, Alexander Chow Mittal
  • Patent number: 8749074
    Abstract: Embodiments include but are not limited to apparatuses and systems including semiconductor packages, e.g. memory packages, having an interposer including at least one topological feature, such as a depression in a surface of the interposer, a die coupled to the surface of the interposer, and an encapsulant material formed over the die and the interposer, and disposed in the at least one depression to resist movement of the encapsulant material relative to the interposer. Other embodiments may be described and claimed.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: June 10, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Steven Eskildsen, Aravind Ramamoorthy
  • Patent number: 8722450
    Abstract: The present invention generally relates to a method for manufacturing an improved solar cell module, more particularly to a method for manufacturing the improved solar cell module that may not happen problems of power leakage and short circuit and save the cost to manufacturing.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: May 13, 2014
    Assignee: Perfect Source Technology Corp.
    Inventor: Po-Chung Huang
  • Patent number: 8716070
    Abstract: A fabrication method of a package structure having at least an MEMS element is provided, including: preparing a wafer having electrical connection pads and the at least an MEMS element; disposing lids for covering the at least an MEMS element, the lids having a metal layer formed thereon; electrically connecting the electrical connection pads and the metal layer with bonding wires; forming an encapsulant for covering the lids, bonding wires, electrical connection pads and metal layer; removing portions of the encapsulant to separate the bonding wires each into first and second sub-bonding wires, wherein top ends of the first and second sub-bonding wires are exposed, the first sub-bonding wires electrically connecting to the electrical connection pads, and the second sub-bonding wires electrically connecting to the metal layer; forming metallic traces on the encapsulant for electrically connecting to the first sub-bonding wires; forming bumps on the metallic traces; and performing a singulation process.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 6, 2014
    Assignee: Siliconware Precision Industries Co. Ltd.
    Inventors: Chi-Hsin Chiu, Chih-Ming Huang, Chang-Yueh Chan, Hsin-Yi Liao, Chun-Chi Ke
  • Patent number: 8710609
    Abstract: A semiconductor arrangement including at least one lead arrangement with a top and a bottom opposite the top; at least one solder resist layer which partially covers the top and the bottom, at least sub-zones of the top and the bottom, which are not covered by the solder resist layer, forming electrical base members; an optoelectronic semiconductor element, which is mounted on at least one of the base members on the top of the lead arrangement and is connected electrically conductively therewith, and an encapsulant applied at least to the top of the lead arrangement, the encapsulant covering up the semiconductor element and lying at least partially against the solder resist layer, wherein the base members are bordered all round by the solder resist layer.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: April 29, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Michael Zitzlsperger, Matthias Sperl
  • Publication number: 20140103476
    Abstract: A method of making image sensor devices may include forming a sensor layer including image sensor ICs in an encapsulation material, bonding a spacer layer to the sensor layer, the spacer layer having openings therein and aligned with the image sensor ICs, and bonding a lens layer to the spacer layer, the lens layer including lens in an encapsulation material and aligned with the openings and the image sensor ICs. The method may also include dicing the bonded-together sensor, spacer and lens layers to provide the image sensor devices. Helpfully, the method may use WLP to enhance production.
    Type: Application
    Filed: October 15, 2012
    Publication date: April 17, 2014
    Applicant: STMICROELECTRONICS ASIA PACIFIC PTE. LTD.
    Inventors: Yonggang JIN, Laurent Herard, WeeChinJudy Lim
  • Patent number: 8698264
    Abstract: A photoelectric conversion module includes: a substrate having a light transmitting property and having a mounting surface; a photoelectric conversion element mounted on the mounting surface of the substrate; a cover member fixed to the substrate via a solder layer constituted by solder and forming, cooperatively with the substrate, an airtight chamber housing the photoelectric conversion element; and a solder adsorbing film provided near an area fixed to the substrate by the solder layer, in a surface, of the cover member, facing the mounting surface, the solder having an adhesive property to the solder adsorbing film.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: April 15, 2014
    Assignee: Hitachi Cable, Ltd.
    Inventors: Kouki Hirano, Hiroki Yasuda, Yoshinori Sunaga, Shohei Hata
  • Patent number: 8673675
    Abstract: A method for processing a thin film photovoltaic module. The method includes providing a plurality of substrates, each of the substrates having a first electrode layer and an overlying absorber layer composed of copper indium gallium selenide (CIGS) or copper indium selenide (CIS) material. The absorber material comprises a plurality of sodium bearing species. The method maintains the plurality of substrates in a controlled environment after formation of at least the absorber layer through one or more processes up to a lamination process. The controlled environment has a relative humidity of less than 10% and a temperature ranging from about 10 degrees Celsius to about 40 degrees Celsius. The method subjects the plurality of substrates to a liquid comprising water at a temperature from about 10 degrees Celsius to about 80 degrees Celsius to process the plurality of substrates after formation of the absorber layer.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: March 18, 2014
    Assignee: Stion Corporation
    Inventor: Robert D. Wieting
  • Patent number: 8674213
    Abstract: Devices for converting light into electric current are provided. A representative device has an encasing structure having at least one portion transparent. The encasing structure is configured to pass light energy into an interior of the encasing structure. The device further has a photovoltaic device positioned within the interior of the encasing structure. The photovoltaic device is positioned to receive light energy. The photovoltaic device is operable to transform the light energy into electric current. The device further has a protective space material, disposed between the encasing structure and the photovoltaic device. The protective space material is operable to transmit the light energy. The protective space material is a non-solid material having a physical property such as a viscosity of less than 1×106 cP and/or a thermal coefficient of expansion of greater than 500×10?6/° C.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: March 18, 2014
    Assignee: Solyndra, LLC
    Inventors: Markus E. Beck, Brian Cumpston
  • Publication number: 20140060622
    Abstract: Thin film photovoltaic devices that include a direct connection to at least one lead bar extending through a connection aperture defined in the encapsulation substrate to electrically connect to an underlying conductive ribbon are provided. The photovoltaic device can include: a transparent substrate; a plurality of photovoltaic cells; a conductive ribbon electrically connected to a photovoltaic cell; an encapsulation substrate laminated to the transparent substrate such that the plurality of photovoltaic cells and the conductive ribbon are positioned between the transparent substrate and the encapsulation substrate; and a lead bar extending through a connection aperture defined in the encapsulation substrate and electrically connected to the conductive ribbon. The lead bar can define a lead tab that establishes a mechanical connection having a biasing force between the lead bar and the conductive ribbon.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 6, 2014
    Applicant: PRIMESTAR SOLAR, INC.
    Inventors: Kim James Clark, Max William Reed, Bradley Robert Crume, Troy Alan Berens
  • Publication number: 20140060621
    Abstract: Thin film photovoltaic devices that include at least one lead bar extending through a connection aperture defined in the encapsulation substrate are provided. The photovoltaic device can include: a transparent substrate; a plurality of photovoltaic cells on the transparent substrate; a first conductive ribbon electrically connected to a first photovoltaic cell; an encapsulation substrate laminated to the transparent substrate such that the plurality of photovoltaic cells and the conductive ribbon are positioned between the transparent substrate and the encapsulation substrate; and, a first lead bar extending through a first connection aperture defined in the encapsulation substrate. The first lead bar is electrically connected to the first conductive ribbon. For example, a meltable conductive material can be connected to the first lead bar and to the first conductive ribbon to establish an electrical connection therebetween.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 6, 2014
    Applicant: PRIMESTAR SOLAR, INC.
    Inventors: Kim James Clark, Max William Reed, Bradley Robert Crume, Troy Alan Berens
  • Publication number: 20140049923
    Abstract: A method of preparing a surface for deposition of a thin film thereon, wherein the surface including a plurality of protrusions extending therefrom and having shadowed regions, includes locally treating at least one of the protrusions.
    Type: Application
    Filed: August 20, 2012
    Publication date: February 20, 2014
    Applicant: UNIVERSAL DISPLAY CORPORATION
    Inventors: Ruiqing Ma, Chuanjun Xia, Prashant Mandlik
  • Patent number: 8647914
    Abstract: A method of fabricating a solar cell includes forming an emitter layer of a second conductive type on a front surface and a back surface of a substrate of a first conductive type opposite to the second conductive type, forming an anti-reflection layer on the front surface of the substrate, partially removing the anti-reflection layer and the emitter layer to form an isolation groove dividing the emitter layer into a plurality of regions, removing a portion of the emitter layer formed on the back surface of the substrate, and forming a passivation layer covering the isolation groove and the back surface of the substrate.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: February 11, 2014
    Assignees: Samsung SDI Co., Ltd., Samsung Display Co., Ltd.
    Inventors: Kyoung-Jin Seo, Yoon-Mook Kang, Min-Chul Song, Dong-Chul Suh, Ju-Hee Song