In Different Regions (epo) Patents (Class 257/E33.014)
  • Patent number: 8952394
    Abstract: An object is to provide a light-emitting element which exhibits light emission with high luminance and can be driven at low voltage. Another object is to provide a light-emitting device or an electronic device with reduced power consumption. Between an anode and a cathode, n (n is a natural number of two or more) EL layers are provided, where between a first EL layer and a second EL layer, a first layer containing any of an alkali metal, an alkaline earth metal, a rare earth metal, an alkali metal compound, an alkaline earth metal compound, and a rare earth metal compound, a second layer containing a material having a high electron-transporting property in contact with the first layer, and a region containing a material having a high hole-transporting property and an acceptor material in contact with the second layer are provided in this order from the anode side.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: February 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromi Nowatari, Satoshi Seo, Nobuharu Ohsawa, Takahiro Ushikubo, Tetsuo Tsutsui
  • Patent number: 8766237
    Abstract: A homo-material heterophased quantum well includes a first structural layer, a second structural layer and a third structural layer. The second structural layer is sandwiched between the first and third structural layers. The first structural layer, second structural layer and third structural layer are formed by growing atoms of a single material in a single growth direction. The energy gap of the second structural layer is smaller than that of the first and third structural layers.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: July 1, 2014
    Assignee: National Sun Yat-Sen University
    Inventors: I-Kai Lo, Yu-Chi Hsu, Chia-Ho Hsieh, Wen-Yuan Pang, Ming-Chi Chou
  • Patent number: 8741682
    Abstract: Without sacrificial layer etching, a microstructure and a micromachine are manufactured. A separation layer 102 is formed over a substrate 101, and a layer 103 to be a movable electrode is formed over the separation layer 102. At an interface of the separation layer 102, the layer 103 to be a movable electrode is separated from the substrate. A layer 106 to be a fixed electrode is formed over another substrate 105. The layer 103 to be a movable electrode is fixed to the substrate 105 with the spacer layer 103 which is partially provided interposed therebetween, so that the layer 103 to be a movable electrode and a layer 106 to be a fixed electrode face each other.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: June 3, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mayumi Yamaguchi, Konami Izumi
  • Patent number: 8703515
    Abstract: Methods for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current-guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a substrate) may be provided. For some embodiments, both a current-guiding structure and second current path may be provided.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: April 22, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Wen-Huang Liu, Chen-Fu Chu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Yuan-Hsiao Chang
  • Publication number: 20140077224
    Abstract: The present disclosure involves an apparatus. The apparatus includes a substrate having a front side a back side opposite the front side. The substrate includes a plurality of openings formed from the back side of the substrate. The openings collectively define a pattern on the back side of the substrate from a planar view. In some embodiments, the substrate is a silicon substrate or a silicon carbide substrate. Portions of the silicon substrate vertically aligned with the openings have vertical dimensions that vary from about 100 microns to about 300 microns. A III-V group compound layer is formed over the front side of the silicon substrate. The III-V group compound layer is a component of one of: a light-emitting diode (LED), a laser diode (LD), and a high-electron mobility transistor (HEMT).
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Applicant: TSMC Solid State Lighting Ltd.
    Inventors: Zhen-Yu Li, Chung-Pao Lin, Hsing-Kuo Hsia, Hao-Chung Kuo, Cindy Huichun Shu, Hsin-Chieh Huang
  • Patent number: 8659004
    Abstract: Disclosed is a light-emitting diode, which has a red and infrared emitting wavelength, excellent monochromatism characteristics, and high output and high efficiency and excellent humidity resistance. The light-emitting diode is provided with: a light-emitting section, which includes an active layer having a quantum well structure and formed by laminating alternately a well layer which comprises a composition expressed by the composition formula of (AlX1 Ga1-X1) As (0?X1?1) and a barrier layer which comprises a composition expressed by the composition formula of (AlX2 Ga1-X2) As (0<2?1), and a first clad layer and a second clad layer, between both of which the active layer is sandwiched, wherein the first clad layer and the second clad layer comprise a composition expressed by the composition formula of (AlX3Ga1-X)Y1 In1-Y1 P (0?X3?1, 0<Y1?1); a current diffusion layer formed on the light-emitting section; and a functional substrate bonded to the current diffusion layer.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: February 25, 2014
    Assignee: Showa Denko K.K.
    Inventors: Noriyuki Aihara, Noriyoshi Seo, Noritaka Muraki, Ryouichi Takeuchi
  • Patent number: 8648363
    Abstract: An organic electroluminescence display unit including: a lower electrode for each device; a first hole injection/transport layer provided on the lower electrode for each device; a second organic light emitting layer of the first color provided on the first hole injection/transport layer for the second organic electroluminescence device; a second hole injection/transport layer provided on the entire surfaces of the second organic light emitting layer and the first hole injection/transport layer for the first organic electroluminescence device, and being made of a low molecular material; a blue first organic light emitting layer provided on the entire surface of the second hole injection/transport layer; and an electron injection/transport layer having at least one of electron injection characteristics and electron transport characteristics, and an upper electrode that are provided in sequence on the entire surface of first organic light emitting layer.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: February 11, 2014
    Assignee: Sony Corporation
    Inventors: Toshiki Matsumoto, Tomoyuki Higo, Tadahiko Yoshinaga, Toshiaki Imai
  • Patent number: 8623679
    Abstract: An organic electroluminescence display unit including: a lower electrode for each device; a first hole injection/transport layer provided on the lower electrode for each device; a second organic light emitting layer of the first color provided on the first hole injection/transport layer for the second organic electroluminescence device; a second hole injection/transport layer provided on the entire surfaces of the second organic light emitting layer and the first hole injection/transport layer for the first organic electroluminescence device, and being made of a low molecular material; a blue first organic light emitting layer provided on the entire surface of the second hole injection/transport layer; and an electron injection/transport layer having at least one of electron injection characteristics and electron transport characteristics, and an upper electrode that are provided in sequence on the entire surface of first organic light emitting layer.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: January 7, 2014
    Assignee: Sony Corporation
    Inventors: Toshiki Matsumoto, Tomoyuki Higo, Tadahiko Yoshinaga, Toshiaki Imai
  • Patent number: 8581266
    Abstract: An object is to provide a light-emitting element which exhibits light emission with high luminance and can be driven at low voltage. Another object is to provide a light-emitting device or an electronic device with reduced power consumption. Between an anode and a cathode, n (n is a natural number of two or more) EL layers are provided, where between a first EL layer and a second EL layer, a first layer containing any of an alkali metal, an alkaline earth metal, a rare earth metal, an alkali metal compound, an alkaline earth metal compound, and a rare earth metal compound, a second layer containing a material having a high electron-transporting property in contact with the first layer, and a region containing a material having a high hole-transporting property and an acceptor material in contact with the second layer are provided in this order from the anode side.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: November 12, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromi Nowatari, Satoshi Seo, Nobuharu Ohsawa, Takahiro Ushikubo, Tetsuo Tsutsui
  • Patent number: 8552461
    Abstract: An LED (light emitting diode) includes a seat and an LED chip. The seat includes a main body, and a first electrode and a second electrode formed on the main body. The LED chip includes a first semiconductor layer, an annular light-emitting layer encircling the first semiconductor layer, and an annular second semiconductor layer encircling the light-emitting layer. The first electrode electrically connects with the first semiconductor layer, and the second electrode electrically connects with the second semiconductor layer.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: October 8, 2013
    Assignee: Foxsemicon Integrated Technology, Inc.
    Inventor: Kuo-Cheng Chang
  • Patent number: 8546164
    Abstract: A thin film transistor (TFT), including a substrate, a gate electrode on the substrate, an oxide semiconductor layer including a channel region, a source region, and a drain region, a gate insulating layer between the gate electrode and the oxide semiconductor layer, and source and drain electrodes in contact with the source and drain regions of the oxide semiconductor layer, respectively, wherein the oxide semiconductor layer has a GaInZnO (GIZO) bilayer structure including a lower layer and an upper layer, and the upper layer has a different indium (In) concentration than the lower layer.
    Type: Grant
    Filed: November 10, 2011
    Date of Patent: October 1, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hong-Han Jeong, Jae-Kyeong Jeong, Yeon-Gon Mo, Hui-Won Yang
  • Patent number: 8546818
    Abstract: Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current-guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a substrate) may be provided. For some embodiments, both a current-guiding structure and second current path may be provided.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: October 1, 2013
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Wen-Huang Liu, Chen-Fu Chu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Yuan-Hsiao Chang
  • Patent number: 8525148
    Abstract: Solid state lighting devices that can produce white light without a phosphor are disclosed herein. In one embodiment, a solid state lighting device includes a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The active region includes a first sub-region having a first center wavelength and a second sub-region having a second center wavelength different from the first center wavelength.
    Type: Grant
    Filed: July 16, 2010
    Date of Patent: September 3, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Zaiyuan Ren, Thomas Gehrke
  • Publication number: 20130126887
    Abstract: An LED includes a seat and an LED chip. The seat includes a main body, a first electrode protruding upwardly from the main body, and a second electrode formed on the main body. The LED chip includes a substrate, a first semiconductor layer disposed on the substrate, a light-emitting layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the light-emitting layer, and a third electrode fixed on the second semiconductor layer. The first electrode extends through the substrate and electrically connects with the first semiconductor layer, and the third electrode electrically connects with the second electrode via a wire.
    Type: Application
    Filed: November 21, 2011
    Publication date: May 23, 2013
    Applicant: FOXSEMICON INTEGRATED TECHNOLOGY, INC.
    Inventor: KUO-CHENG CHANG
  • Publication number: 20130126919
    Abstract: According to an embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer, a dielectric film and an electrode. The first semiconductor layer is capable of emitting light. The second semiconductor layer has a first major surface in contact with the first semiconductor layer and a second major surface opposite to the first major surface, the second major surface including a first region having convex structures and a second region not having the convex structures. The dielectric film is provided at least at a tip portion of the convex structures, and the electrode is provided above the second region.
    Type: Application
    Filed: September 13, 2012
    Publication date: May 23, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hironori Yamasaki, Yukie Nishikawa
  • Patent number: 8445925
    Abstract: A semiconductor optical device includes: a group III nitride semiconductor substrate having a primary surface of a first orientation; a first group III nitride semiconductor laminate including a first active layer disposed on a first region of the primary surface; a group III nitride semiconductor thin film having a surface, which has a second orientation different from the first orientation, disposed on a second region, the second region being different from the first region; a junction layer provided between the second region and the group III nitride semiconductor thin film; and a second group III nitride semiconductor laminate including a second active layer and disposed on the surface of the group III nitride semiconductor thin film. The first and second active layers include first and second well layers containing In, respectively, and the emission wavelengths of the first and second well layers are different from each other.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: May 21, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takahisa Yoshida, Yohei Enya, Takashi Kyono, Masaki Ueno
  • Publication number: 20130105836
    Abstract: A light emitting element includes: a laminated body including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer in this order, the second conductive semiconductor layer having a light extraction surface; and a recombination suppression structure provided in vicinity of an end surface of the active layer, the recombination suppression structure having a bandgap larger than a bandgap of the active layer.
    Type: Application
    Filed: October 19, 2012
    Publication date: May 2, 2013
    Applicant: SONY CORPORATION
    Inventor: SONY CORPORATION
  • Patent number: 8431940
    Abstract: An object is to provide a light-emitting element which exhibits light emission with high luminance and can be driven at low voltage. Another object is to provide a light-emitting device or an electronic device with reduced power consumption. Between an anode and a cathode, n (n is a natural number of two or more) EL layers are provided, where between a first EL layer and a second EL layer, a first layer containing any of an alkali metal, an alkaline earth metal, a rare earth metal, an alkali metal compound, an alkaline earth metal compound, and a rare earth metal compound, a second layer containing a material having a high electron-transporting property in contact with the first layer, and a region containing a material having a high hole-transporting property and an acceptor material in contact with the second layer are provided in this order from the anode side.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: April 30, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromi Nowatari, Satoshi Seo, Nobuharu Ohsawa, Takahiro Ushikubo, Tetsuo Tsutsui
  • Patent number: 8405100
    Abstract: An organic electroluminescence display unit includes: a lower electrode for each device; a first hole injection/transport layer provided on the lower electrode for each device; a second organic light emitting layer of the first color provided on the first hole injection/transport layer for the second organic electroluminescence device; a second hole injection/transport layer provided on the entire surfaces of the second organic light emitting layer and the first hole injection/transport layer for the first organic electroluminescence device, and being made of a low molecular material; a blue first organic light emitting layer provided on the entire surface of the second hole injection/transport layer; and an electron injection/transport layer having at least one of electron injection characteristics and electron transport characteristics, and an upper electrode that are provided in sequence on the entire surface of first organic light emitting layer.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: March 26, 2013
    Assignee: Sony Corporation
    Inventors: Toshiaki Matsumoto, Tomoyuki Higo, Tadahiko Yoshinaga, Toshiaki Imai
  • Publication number: 20130056747
    Abstract: A nitride semiconductor light emitting device and a manufacturing method thereof are provided. The nitride semiconductor light emitting device includes: forming a first conductivity-type nitride semiconductor layer on a substrate; forming an active layer on the first conductivity-type nitride semiconductor layer; and forming a second conductivity-type nitride semiconductor layer on the active layer. High output can be obtained by increasing doping efficiency in growing the conductivity type nitride semiconductor layer.
    Type: Application
    Filed: August 27, 2012
    Publication date: March 7, 2013
    Inventors: Jin Sub LEE, Jung Sup Kim, Seong Suk Lee, Tae Young Park, Cheol Soo Sone
  • Publication number: 20130049005
    Abstract: One or more layers are epitaxially grown on a bulk crystalline AlN substrate. The epitaxial layers include a surface which is the initial surface of epitaxial growth of the epitaxial layers. The AlN substrate is substantially removed over a majority of the initial surface of epitaxial growth.
    Type: Application
    Filed: August 25, 2011
    Publication date: February 28, 2013
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Christopher L. Chua, Brent S. Krusor, Thomas Wunderer, Noble M. Johnson
  • Patent number: 8384096
    Abstract: A semiconductor component comprising at least one optically active first region (112) for emitting electromagnetic radiation (130) in at least one emission direction and at least one optically active second region (122) for emitting electromagnetic radiation (130) in the at least one emission direction. The first region (112) is here arranged in a first layer (110) and the second region (122) in a second layer (120), the second layer (120) being arranged over the first layer (110) in the emission direction and comprising a first passage region (124) assigned to the first region (112), which first passage region is at least partially transmissive for the electromagnetic radiation (130) of the first region (112).
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: February 26, 2013
    Assignee: Osram Opto Semiconductors GmbH
    Inventor: Siegfried Herrmann
  • Publication number: 20130034924
    Abstract: A photonic device comprises a substrate and a dielectric material including two or more openings that expose a portion of the substrate, the two or more openings each having an aspect ratio of at least 1. A bottom diode material comprising a compound semiconductor material that is lattice mismatched to the substrate occupies the two or more openings and is coalesced above the two or more openings to form the bottom diode region. The device further includes a top diode material and an active diode region between the top and bottom diode materials.
    Type: Application
    Filed: October 12, 2012
    Publication date: February 7, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Taiwan Semiconductor Manufacturing Company
  • Patent number: 8362460
    Abstract: A multi junction solar cell having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The solar cell includes an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the solar cell and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: January 29, 2013
    Assignee: Cyrium Technologies Incorporated
    Inventors: Norbert Puetz, Simon Fafard, Bruno J. Riel
  • Patent number: 8362494
    Abstract: An electro-optic device is disclosed. The electro-optic device includes an insulating layer, a first semiconducting region disposed above the insulating layer and being doped with doping atoms of a first conductivity type, a second semiconducting region disposed above the insulating layer and being doped with doping atoms of a second conductivity type and an electro-optic active region disposed above the insulating layer and between the first semiconducting region and the second semiconducting region. The electro-optic active region includes a first partial active region and a second partial active region and an insulating structure in between. The insulating structure extends perpendicular to the surface of the insulating layer such that there is no overlap of the first partial active region and the second partial active region in the direction perpendicular to the surface of the insulating layer. A method for manufacturing is also disclosed.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: January 29, 2013
    Assignee: Agency for Science, Technology and Research
    Inventors: Guo-Qiang Patrick Lo, Kee-Soon Darryl Wang, Wei-Yip Loh, Mingbin Yu, Junfeng Song
  • Publication number: 20130015425
    Abstract: A light-emitting element includes a substrate; a first light-emitting stacked layer formed on the substrate; a tunneling layer formed on the first light-emitting stacked layer; a second light-emitting stacked layer formed on the tunneling layer; and a contact layer formed on the second light-emitting stacked layer.
    Type: Application
    Filed: July 11, 2012
    Publication date: January 17, 2013
    Inventors: Yi-Chieh Lin, Rong-Ren Lee
  • Publication number: 20130017635
    Abstract: A method of forming ohmic contacts on a light emitting diode that features a surface treatment of a substrate includes exposing a surface of a p-type gallium nitride layer to an acid-containing solution and a buffered oxide etch process. A quantum well is formed in a gallium nitride substrate and a layer of p-type gallium nitride is deposited over the quantum well. The surface of the p-type gallium nitride is exposed to an acid-containing solution and then a buffered oxide etch process is performed to provide an etched surface. A metal stack including a layer of silver disposed between layers of platinum is then deposited.
    Type: Application
    Filed: March 13, 2012
    Publication date: January 17, 2013
    Applicant: Sorra, Inc.
    Inventors: Andrew J. Felker, Nicholas Andrew Vickers
  • Publication number: 20120314726
    Abstract: Provided are a laser diode using zinc oxide nanorods and a manufacturing method thereof. The laser diode using zinc oxide nanorods according to one embodiment of the present disclosure includes: a wafer; an electrode layer formed on the wafer; a nanorod layer including a plurality of n-doped zinc oxide nanorods grown on the electrode layer; and a p-doped single crystal semiconductor layer that is physically in contact with the ends of the zinc oxide nanorods.
    Type: Application
    Filed: September 10, 2010
    Publication date: December 13, 2012
    Applicant: DONGGUK UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Sang Wuk Lee, Tae Won Kang, Gennady Panin, Hak Dong Cho
  • Publication number: 20120288971
    Abstract: Disclosed are methods for co-integration of active and passive photonic devices on a planarized silicon-based photonics substrate. In one aspect, a method is disclosed that includes providing a planarized silicon-based photonics substrate comprising a silicon waveguide structure, depositing a dielectric layer over the planarized silicon-based photonics substrate, selectively etching the dielectric layer, thereby exposing at least a portion of the silicon waveguide structure, selectively etching the exposed portion of the silicon waveguide structure to form a template, using the silicon waveguide structure as a seed layer to selectively grow in the template a germanium layer that extends above the dielectric layer, and planarizing the germanium layer to form a planarized germanium layer, wherein the planarized germanium layer does not extend above the dielectric layer.
    Type: Application
    Filed: May 8, 2012
    Publication date: November 15, 2012
    Applicants: Universiteit Gent, IMEC
    Inventors: Wim Bogaerts, Joris Van Campenhout, Peter Verheyen, Philippe Absil
  • Patent number: 8304784
    Abstract: An illumination device having a plurality of light emitting diodes is provided. The light emitting diode may include a plurality of semiconductor layers at least one of which has a light emitting surface which may include a rough surface pattern having a pre-determined pattern. The pre-determined pattern may include one or more impurity regions with each region having a recess for guiding current across the light emitting surface and maximizing the emission of light (i.e. light intensity) of the illumination device. Each recess may include a lower internal portion having a bottom contact point located on a bottom surface and an upper internal portion integrally connected to the lower internal portion by a plurality of center contact points. The gaps created between the center and bottom contact points in adjacent recesses may act as spark gaps allowing for the current to flow through the entire light emitting surface.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: November 6, 2012
    Inventor: Andrew Locke
  • Publication number: 20120168792
    Abstract: In one embodiment, a heterojunction structure includes a first substrate; a second substrate comprising an electrode pad, the second substrate joined to the first substrate by an adhesive layer interposed between the first and second substrates, the first substrate and the adhesive layer having a via hole penetrating therethrough to expose a region of the electrode pad; a connection electrode disposed in the via hole and contacting the electrode pad; and an insulation layer electrically insulating the connection electrode from the first substrate. One of the first and second substrates has a thermal expansion coefficient different than a thermal expansion coefficient of the other of the first and second substrates, and at least one of the adhesive layer or the insulation layer comprises an organic material.
    Type: Application
    Filed: September 25, 2011
    Publication date: July 5, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Un-Byoung KANG, Kwang-chul CHOI, Jung-Hwan KIM, Tae Hong MIN
  • Patent number: 8207540
    Abstract: An object is to provide a light-emitting element which exhibits light emission with high luminance and can be driven at low voltage. Another object is to provide a light-emitting device or an electronic device with reduced power consumption. Between an anode and a cathode, n (n is a natural number of two or more) EL layers are provided, where between a first EL layer and a second EL layer, a first layer containing any of an alkali metal, an alkaline earth metal, a rare earth metal, an alkali metal compound, an alkaline earth metal compound, and a rare earth metal compound, a second layer containing a material having a high electron-transporting property in contact with the first layer, and a region containing a material having a high hole-transporting property and an acceptor material in contact with the second layer are provided in this order from the anode side.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: June 26, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromi Nowatari, Satoshi Seo, Nobuharu Ohsawa, Takahiro Ushikubo, Tetsuo Tsutsui
  • Publication number: 20120153258
    Abstract: A nitride-based semiconductor light-emitting element includes an n-GaN layer 102, a p-GaN layer 107, and a GaN/InGaN multi-quantum well active layer 105, which is interposed between the n- and p-GaN layers 102 and 107. The GaN/InGaN multi-quantum well active layer 105 is an m-plane semiconductor layer, which includes an InxGa1-xN (where 0<x<1) well layer 104 that has a thickness of 6 nm or more and 17 nm or less, and oxygen atoms included in the GaN/InGaN multi-quantum well active layer 105 have a concentration of 3.0×1017 cm?3 or less.
    Type: Application
    Filed: February 27, 2012
    Publication date: June 21, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Ryou KATO, Shunji YOSHIDA, Toshiya YOKOGAWA
  • Patent number: 8178362
    Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: May 15, 2012
    Assignee: International Business Machines Corporation
    Inventors: Hemantha Kumar Wickramasinghe, Kailash Gopalakrishnan
  • Patent number: 8148741
    Abstract: A semiconductor device is provided comprising a first potential well located within a pn junction and a second potential well not located within a pn junction. The potential wells may be quantum wells. The semiconductor device is typically an LED, and may be a white or near-white light LED. The semiconductor device may additionally comprise a third potential well not located within a pn junction. The semiconductor device may additionally comprise absorbing layers surrounding or closely or immediately adjacent to the second or third quantum wells. In addition, graphic display devices and illumination devices comprising the semiconductor device according to the present invention are provided.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: April 3, 2012
    Assignee: 3M Innovative Properties Company
    Inventors: Thomas J. Miller, Michael A. Haase, Xiaoguang Sun
  • Patent number: 8148733
    Abstract: Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a metal alloy substrate) may be provided. For some embodiments, both a current guiding structure and second current path may be provided.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: April 3, 2012
    Assignee: Semileds Optoelectronics Co., Ltd.
    Inventors: Wen-Huang Liu, Chen-Fu Chu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Yuan-Hsiao Chang
  • Patent number: 8138560
    Abstract: Without sacrificial layer etching, a microstructure and a micromachine are manufactured. A separation layer 102 is formed over a substrate 101, and a layer 103 to be a movable electrode is formed over the separation layer 102. At an interface of the separation layer 102, the layer 103 to be a movable electrode is separated from the substrate. A layer 106 to be a fixed electrode is formed over another substrate 105. The layer 103 to be a movable electrode is fixed to the substrate 105 with the spacer layer 103 which is partially provided interposed therebetween, so that the layer 103 to be a movable electrode and a layer 106 to be a fixed electrode face each other.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: March 20, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mayumi Yamaguchi, Konami Izumi
  • Patent number: 8106419
    Abstract: A group-III nitride compound semiconductor light-emitting device, a method of manufacturing the group-III nitride compound semiconductor light-emitting device, and a lamp. The method includes the steps of: forming an intermediate layer (12) made of a group-III nitride compound on a substrate (11) by activating and reacting gas including a group-V element with a metal material in plasma; and sequentially forming an n-type semiconductor layer (14), a light-emitting layer (15), and a p-type semiconductor layer (16) each made of a group-III nitride compound semiconductor on the intermediate layer (12). Nitrogen is used as the group-V element, and the thickness of the intermediate layer (12) is in the range of 20 to 80 nm.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: January 31, 2012
    Assignee: Showa Denko K.K.
    Inventors: Yasunori Yokoyama, Hisayuki Miki
  • Patent number: 8084782
    Abstract: Provided is a light-emitting film having controllable resistivity, and a high-luminance light-emitting device, which can be driven at a low voltage, using such light-emitting film. The light-emitting film includes Cu as an addition element in a zinc sulfide compound which is a base material, wherein the zinc sulfide compound includes columnar ZnS crystals, and sites formed of copper sulfide on a grain boundary where the ZnS crystals are in contact with each other.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: December 27, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tomoyuki Oike, Tatsuya Iwasaki, Yoshihiro Ohashi
  • Publication number: 20110291140
    Abstract: Provided is a light emitting device. The light emitting device includes a light emitting structure layer including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer, a gallium barrier layer on the light emitting structure layer, and a metal electrode layer on the gallium barrier layer.
    Type: Application
    Filed: May 26, 2011
    Publication date: December 1, 2011
    Inventors: Kwang Ki Choi, Ji hyung Moon, June O Song, Sang Youl Lee, Tae Yeon Seong, Se Yeon Jung, Joon Woo Jeon, Seong Han Park
  • Patent number: 8049212
    Abstract: A TFT includes a substrate, a transparent semiconductor layer on the substrate, the transparent semiconductor layer including zinc oxide and exhibiting a surface roughness of about 1.3 nm or less, a gate electrode on the transparent semiconductor layer, a gate insulating layer between the gate electrode and the transparent semiconductor layer, the gate insulting layer insulating the gate electrode from the transparent semiconductor layer, and source and drain electrodes on the substrate, the source and drain electrodes being in contact with the transparent semiconductor layer.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: November 1, 2011
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Jae-Kyeong Jeong, Hyun-Soo Shin, Yeon-Gon Mo, Jong-Han Jeong
  • Patent number: 7994505
    Abstract: A liquid crystal display device includes a semiconductor layer which is formed of a poly-Si layer and an a-Si layer and formed above a gate electrode with a gate insulating film interposed therebetween. A source electrode or a drain electrode is formed above the semiconductor layer. An n+Si layer is formed between the source electrode or the drain electrode and the semiconductor layer. Since ends of the source electrode or the drain electrode are formed inside ends of the semiconductor layer, leak current at the ends of the semiconductor layer can be reduced.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: August 9, 2011
    Assignee: Hitachi Displays, Ltd.
    Inventors: Terunori Saitou, Yoshiharu Owaku, Takuo Kaitoh, Hidekazu Miyake
  • Patent number: 7985974
    Abstract: An object is to provide a light-emitting element which exhibits light emission with high luminance and can be driven at low voltage. Another object is to provide a light-emitting device or an electronic device with reduced power consumption. Between an anode and a cathode, n (n is a natural number of two or more) EL layers are provided, where between a first EL layer and a second EL layer, a first layer containing any of an alkali metal, an alkaline earth metal, a rare earth metal, an alkali metal compound, an alkaline earth metal compound, and a rare earth metal compound, a second layer containing a material having a high electron-transporting property in contact with the first layer, and a region containing a material having a high hole-transporting property and an acceptor material in contact with the second layer are provided in this order from the anode side.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: July 26, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromi Nowatari, Satoshi Seo, Nobuharu Ohsawa, Takahiro Ushikubo, Tetsuo Tsutsui
  • Patent number: 7955875
    Abstract: Methods of forming a light emitting device include selectively forming a wavelength conversion structure on a light emitting element using stereolithography. Selectively forming the wavelength conversion structure may include covering the light emitting element with a photo-curable liquid polymer containing a luminescent material, and exposing the liquid polymer to light for a time sufficient to at least partially cure the liquid polymer. Multiple layers of polymer can be selectively built up to form a wavelength conversion structure having a custom shape on the light emitting element.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: June 7, 2011
    Assignee: Cree, Inc.
    Inventor: Craig Hardin
  • Publication number: 20110084249
    Abstract: The present invention relates to a light-emitting device using a clad layer consisting of asymmetric units, wherein the clad layer is provided by repeatedly stacking a unit having an asymmetric energy bandgap on upper and lower portions of an active layer, and the inflow of both electrons and holes into the active layer is arbitrarily controlled through the clad layer, so that the internal quantum efficiency can be improved. The light-emitting device using the clad layer consisting of the asymmetric units according to the present invention is characterized in that the clad layer is provided on at least one of the upper and lower portions of the active layer and consists of one or plural units, wherein the unit has a structure in which the first to nth unit layers (n is a natural number equal to or greater than three) having different energy bandgaps are sequentially stacked and has an asymmetric energy band diagram.
    Type: Application
    Filed: October 14, 2010
    Publication date: April 14, 2011
    Applicant: WOOREE LST CO., LTD.
    Inventors: Jae-Eung Oh, Young-Kyun Noh, Bun-Hei Koo
  • Publication number: 20100244040
    Abstract: A group-III nitride compound semiconductor light-emitting device, a method of manufacturing the group-III nitride compound semiconductor light-emitting device, and a lamp. The method includes the steps of: forming an intermediate layer (12) made of a group-III nitride compound on a substrate (11) by activating and reacting gas including a group-V element with a metal material in plasma; and sequentially forming an n-type semiconductor layer (14), a light-emitting layer (15), and a p-type semiconductor layer (16) each made of a group-III nitride compound semiconductor on the intermediate layer (12). Nitrogen is used as the group-V element, and the thickness of the intermediate layer (12) is in the range of 20 to 80 nm.
    Type: Application
    Filed: November 5, 2007
    Publication date: September 30, 2010
    Applicant: SHOWA DENKO K.K.
    Inventors: Yasunori Yokoyama, Hisayuki Miki
  • Patent number: 7800117
    Abstract: A light emitting device includes an active layer structure, which has one or more active layers with luminescent centers, e.g. a wide bandgap material with semiconductor nano-particles, deposited on a substrate. For the practical extraction of light from the active layer structure, a transparent electrode is disposed over the active layer structure and a base electrode is placed under the substrate. Transition layers, having a higher conductivity than a top layer of the active layer structure, are formed at contact regions between the upper transparent electrode and the active layer structure, and between the active layer structure and the substrate. Accordingly the high field regions associated with the active layer structure are moved back and away from contact regions, thereby reducing the electric field necessary to generate a desired current to flow between the transparent electrode, the active layer structure and the substrate, and reducing associated deleterious effects of larger electric fields.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: September 21, 2010
    Assignee: Group IV Semiconductor, Inc.
    Inventors: George Chik, Thomas MacElwee, Iain Calder, E. Steven Hill
  • Patent number: 7732237
    Abstract: A method of forming an optically active region on a silicon substrate includes the steps of epitaxially growing a silicon buffer layer on the silicon substrate and epitaxially growing a SiGe cladding layer having a plurality of arrays of quantum dots disposed therein, the quantum dots being formed from a compound semiconductor material having a lattice mismatch with the silicon buffer layer. The optically active region may be incorporated into devices such as light emitting diodes, laser diodes, and photodetectors.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: June 8, 2010
    Assignee: The Regents of the University of California
    Inventor: Ya-Hong Xie
  • Patent number: 7700936
    Abstract: In one embodiment, a method of producing an optoelectronic nanostructure includes preparing a substrate; providing a quantum well layer on the substrate; etching a volume of the substrate to produce a photonic crystal. The quantum dots are produced at multiple intersections of the quantum well layer within the photonic crystal. Multiple quantum well layers may also be provided so as to form multiple vertically aligned quantum dots. In another embodiment, an optoelectronic nanostructure includes a photonic crystal having a plurality of voids and interconnecting veins; a plurality of quantum dots arranged between the plurality of voids, wherein an electrical connection is provided to one or more of the plurality of quantum dots through an associated interconnecting vein.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: April 20, 2010
    Assignee: University of Delaware
    Inventors: Janusz Murakowski, Garrett Schneider, Dennis W. Prather
  • Patent number: 7683389
    Abstract: A nitride-based semiconductor LED comprises an anode; a first p-type clad layer having a second n-type clad layer coming in contact with the anode, the first p-type clad layer being formed under the anode such that a portion of the first p-type clad layer comes in contact with the anode; an active layer formed under the first p-type clad layer; a first n-type clad layer having a second p-type clad layer which does not come in contact with the active layer, the first n-type clad layer being formed on the entire lower surface of the active layer; and a cathode formed under the first n-type clad layer and the second p-type clad layer so as to come in contact with a portion of the first n-type clad layer and the second p-type clad layer.
    Type: Grant
    Filed: May 3, 2007
    Date of Patent: March 23, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Moon Won Ha, Choi Chang Hwan, Hwang Young Nam