Material Of Active Region (epo) Patents (Class 257/E33.013)

  • Patent number: 12119427
    Abstract: The light emitting device includes a growth substrate, a light-emitting semiconductor structure, conductive pillars, an insulating layer, and first and second electrodes. The light-emitting semiconductor structure includes a first-type semiconductor layer, a light-emitting layer and a second-type semiconductor layer disposed on the growth substrate from top to bottom. The conductive pillars are disposed in the light-emitting semiconductor structure. The conductive pillars penetrates is in contact with the second-type semiconductor layer and electrically connected to the substrate. A first portion of the insulating layer is disposed between the first-type semiconductor layer and the substrate, and a second portion of the insulating layer electrically insulates the first-type semiconductor layer and the light emitting-layer from the conductive pillars. The first electrode is electrically connected to the first-type semiconductor layer and electrically insulated from the conductive pillars.
    Type: Grant
    Filed: June 16, 2023
    Date of Patent: October 15, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Jih-Kang Chen, Shih-Wei Yang, Tsai-Chen Sung
  • Patent number: 12113152
    Abstract: The light emitting device includes a substrate, a light-emitting semiconductor structure, conductive pillars, an insulating layer, and first and second electrodes. The light-emitting semiconductor structure includes a first-type semiconductor layer, a light-emitting layer and a second-type semiconductor layer disposed on the substrate from bottom to top. The conductive pillars are disposed in the light-emitting semiconductor structure. The conductive pillars penetrates is in contact with the second-type semiconductor layer and electrically connected to the substrate. A first portion of the insulating layer is disposed between the first-type semiconductor layer and the substrate, and a second portion of the insulating layer electrically insulates the first-type semiconductor layer and the light emitting-layer from the conductive pillars. The first electrode is electrically connected to the first-type semiconductor layer and electrically insulated from the conductive pillars.
    Type: Grant
    Filed: May 2, 2021
    Date of Patent: October 8, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Jih-Kang Chen, Shih-Wei Yang, Tsai-Chen Sung
  • Patent number: 12002914
    Abstract: A semiconductor light-emitting element includes: a semiconductor stack including an n-type layer and a p-type layer and having at least one n exposure portion being a recess where the n-type layer is exposed; a p wiring electrode layer on the p-type layer; an insulating layer (i) continuously covering inner lateral surfaces of at least one n exposure portion and part of a top surface of the p wiring electrode layer and (ii) having an opening portion that exposes the n-type layer; an n wiring electrode layer disposed above the p-type layer and the p wiring electrode layer and in contact with the n-type layer in the opening portion; and at least one first n connecting member connected to the n wiring electrode layer in at least one first n terminal region. The n wiring electrode layer and the p-type layer are disposed below at least one first n terminal region.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: June 4, 2024
    Assignee: NUVOTON TECHNOLOGY CORPORATION JAPAN
    Inventors: Yasutomo Mitsui, Yasumitsu Kunoh, Masanori Hiroki, Shigeo Hayashi, Masahiro Kume, Masanobu Nogome
  • Patent number: 11921395
    Abstract: A reflective active device array substrate includes a substrate, a plurality of active devices, a protective layer, and a plurality of metal oxide conductor layers. The active devices are dispersedly disposed on the substrate. The protective layer is disposed on the substrate and covers the active devices. The protective layer has a plurality of openings, and each of the openings exposes a source or a drain of the corresponding active device, respectively. The metal oxide conductor layers are disposed on the substrate and cover the protective layer. Each of the metal oxide conductor layers is electrically connected to the source or the drain of the corresponding active device through the corresponding opening.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: March 5, 2024
    Assignee: E Ink Holdings Inc.
    Inventor: Chien-Hsing Chang
  • Patent number: 11876148
    Abstract: A nitride semiconductor light-emitting element includes: an n-side nitride semiconductor layer; a p-side nitride semiconductor layer; and an active layer between the n-side nitride semiconductor layer and the p-side nitride semiconductor layer. The active layer includes: one or more well layers comprising a first well layer that is nearest to the n-side nitride semiconductor layer, and one or more barrier layers comprising a first barrier layer between the first well layer and the n-side nitride semiconductor layer. The first barrier layer comprises a Si-doped InGaN barrier layer and an undoped GaN barrier layer in this order from the n-side nitride semiconductor layer side.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: January 16, 2024
    Assignee: NICHIA CORPORATION
    Inventor: Takuya Okada
  • Patent number: 11870006
    Abstract: The present invention provides light-emitting devices with improved quantum efficiency. The light emitting diode structure comprising: a p-doped layer an n-doped layer; and a multiple quantum well structure sandwiched between the p-doped layer and n-doped layer, wherein the multiple quantum well structure comprising a quantum well disposed between n-doped barrier layers.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: January 9, 2024
    Assignee: VueReal Inc.
    Inventors: Jian Yin, Dayan Ban, Ehsanollah Fathi, Gholamreza Chaji
  • Patent number: 11393955
    Abstract: A light emitting diode (LED) including an epitaxial stacked layer, first and second reflective layers which are disposed at two sides of the epitaxial stacked layer, a current conducting layer and first and second electrodes and a manufacturing thereof are provided. The epitaxial stacked layer includes a first-type and a second-type semiconductor layers and an active layer. A main light emitting surface with a light transmittance >0% and ?10% is formed on one of the two reflective layers. The current conducting layer contacts the second-type semiconductor layer. The first electrode is electrically connected to the first-type semiconductor layer. The second electrode is electrically connected to the second-type semiconductor layer via the current conducting layer. A contact scope of the current conducting layer and the second-type semiconductor layer is served as a light-emitting scope overlapping the two layers, but not overlapping the two electrodes.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: July 19, 2022
    Assignee: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Kai-Shun Kang, Tung-Lin Chuang, Yu-Chen Kuo, Yan-Ting Lan, Chih-Ming Shen, Jing-En Huang
  • Patent number: 9024309
    Abstract: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, and a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the first oxide semiconductor layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: May 5, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Tomoya Futamura, Takahiro Kasahara
  • Patent number: 9012894
    Abstract: A light-emitting element includes a first electrode, a first light-emitting layer formed over the first electrode, a second light-emitting layer formed on and in contact with the first light-emitting layer to be in contact therewith, and a second electrode formed over the second light-emitting layer. The first light-emitting layer includes a first light-emitting substance and a hole-transporting organic compound, and the second light-emitting layer includes a second light-emitting substance and an electron-transporting organic compound. Substances are selected such that a difference in LUMO levels between the first light-emitting substance, the second light-emitting substance, and the electron-transporting organic compound is 0.2 eV or less, a difference in HOMO levels between the hole-transporting organic compound, the first light-emitting substance, and the second light-emitting substance is 0.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: April 21, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Tsunenori Suzuki
  • Patent number: 8987026
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type layer, a light emitting layer, a p-type layer, and a transparent electrode. The n-type layer includes a nitride semiconductor and has a thickness not more than 500 nm. The light emitting layer is provided on the n-type layer. The p-type layer is provided on the light emitting layer and includes a nitride semiconductor. The transparent electrode contacts the n-type layer. The n-type layer is disposed between the transparent electrode and the light emitting layer.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: March 24, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoharu Sugiyama, Tomonari Shioda, Shigeya Kimura, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8975145
    Abstract: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: March 10, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yu-Gwang Jeong, Young-Wook Lee, Sang-Gab Kim, Woo-Geun Lee, Min-Seok Oh, Jang-Soo Kim, Kap-Soo Yoon, Shin-Il Choi, Hong-Kee Chin, Seung-Ha Choi, Seung-Hwan Shim, Sung-Hoon Yang, Ki-Hun Jeong
  • Patent number: 8912541
    Abstract: One object of the present invention is to increase an aperture ratio of a semiconductor device. A pixel portion and a driver circuit are provided over one substrate. The first thin film transistor (TFT) in the pixel portion includes: a gate electrode layer over the substrate; a gate insulating layer over the gate electrode layer; an oxide semiconductor layer over the gate insulating layer; source and drain electrode layers over the oxide semiconductor layer; over the gate insulating layer, the oxide semiconductor layer, the source and drain electrode layers, a protective insulating layer which is in contact with part of the oxide semiconductor layer; and a pixel electrode layer over the protective insulating layer. The pixel portion has light-transmitting properties. Further, a material of source and drain electrode layers of a second TFT in the driver circuit is different from a material of those of the first TFT.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: December 16, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Miyuki Hosoba, Eriko Nishida
  • Patent number: 8901544
    Abstract: Articles utilizing strengthened glass substrates, for example, ion-exchanged glass substrates, in combination with organic molecules or polymers are described along with methods for making the articles. The articles are useful in electronics-based devices that utilize organic thin film transistors.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: December 2, 2014
    Assignee: Corning Incorporated
    Inventors: Mingqian He, Jianfeng Li, James Robert Matthews, Michael S Pambianchi
  • Patent number: 8895355
    Abstract: A method of arranging a diamagnetic rod includes levitating a diamagnetic rod above a contact line at which a first magnet contacts a second magnet, the first magnet and the second magnet having diametric magnetization in a direction perpendicular to the contact line.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: November 25, 2014
    Assignee: International Business Machines Corporation
    Inventors: Qing Cao, Oki Gunawan
  • Patent number: 8878213
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type layer, a light emitting layer, a p-type layer, and a transparent electrode. The n-type layer includes a nitride semiconductor and has a thickness not more than 500 nm. The light emitting layer is provided on the n-type layer. The p-type layer is provided on the light emitting layer and includes a nitride semiconductor. The transparent electrode contacts the n-type layer. The n-type layer is disposed between the transparent electrode and the light emitting layer.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: November 4, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoharu Sugiyama, Tomonari Shioda, Shigeya Kimura, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8872164
    Abstract: An organic light-emitting element includes an anode, a functional layer, and a hole injection layer between the anode and the functional layer. The functional layer contains an organic material. The hole injection layer injects holes to the functional layer. The hole injection layer comprises tungsten oxide and includes an occupied energy level that is approximately 1.8 electron volts to approximately 3.6 electron volts lower than a lowest energy level of a valence band of the hole injection layer in terms of binding energy.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: October 28, 2014
    Assignee: Panasonic Corporation
    Inventors: Satoru Ohuchi, Yoshiaki Tsukamoto, Takahiro Komatsu, Kei Sakanoue
  • Patent number: 8847249
    Abstract: A multicolored LED device made of a semipolar material having different indium containing regions provided on different spatial features of GaN material. Other materials such as non-polar materials can also be used.
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: September 30, 2014
    Assignee: Soraa, Inc.
    Inventors: James W. Raring, Daniel F. Feezell, Shuji Nakamura
  • Patent number: 8835964
    Abstract: A light-emitting device comprises a lattice structure to minimize the horizontal waveguide effect by reducing light traveling distance in the light-absorption medium of the light-emitting devices, and to enhance light extraction from the light-emitting layer. The lattice structure includes sidewalls and/or rods embedded in the light-absorption medium and dividing the light-absorption medium into a plurality of area units. The area units are completely isolated or partially separated from each other by the sidewalls. Also provided is a method of fabricating a light-emitting device that comprises a lattice structure, which lattice structure includes sidewalls and/or rods embedded in the light-absorption medium and dividing the light-absorption medium into a plurality of area units.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: September 16, 2014
    Assignee: InvenLux Corporation
    Inventors: Chunhui Yan, Jianping Zhang
  • Patent number: 8816387
    Abstract: A light emitting diode includes a first semiconductor layer, an active layer, a second semiconductor layer and a third semiconductor stacked in that order; a first electrode electrically connected to the first semiconductor layer; a second electrode electrically connected to the second semiconductor layer. The light emitting diode further includes a carbon nanotube layer. The carbon nanotube layer is enclosed in the interior of the first semiconductor layer. The carbon nanotube layer includes a number of carbon nanotubes.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: August 26, 2014
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Yang Wei, Shou-Shan Fan
  • Patent number: 8779463
    Abstract: A sapphire substrate having one principal surface on which a nitride semiconductor is grown, said one principal surface having a plurality of projections. Each of the projections has a generally pyramidal shape with a not truncated, more sharpened tip and with an inclined surface composed of a crystal growth-suppression surface that lessens or suppresses the growth of the nitride semiconductor and also which has an inclination change line at which an inclination angle discontinuously varies.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: July 15, 2014
    Assignee: Nichia Corporation
    Inventors: Junya Narita, Yohei Wakai, Takayoshi Wakaki
  • Patent number: 8766316
    Abstract: Provided is a semiconductor device. The semiconductor device comprises a support substrate; a bonding layer on the support substrate; and a plurality of semiconductor layers on the bonding layer, wherein the bonding layer includes a first bonding layer between the support substrate and the plurality of semiconductor layers and a second bonding layer between the first bonding layer and the plurality of semiconductor layers, wherein an at least one of the first and second bonding layers includes a multi layers, wherein the first and second bonding layers include a same material from each other, wherein the first and second bonding layers includes a different material from the plurality of semiconductor layers.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: July 1, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: June O Song
  • Patent number: 8741671
    Abstract: A method for manufacturing a light emitting device is disclosed. The disclosed method includes forming a first-conductivity-type semiconductor layer over a first substrate such that a first surface of the first-conductivity-type semiconductor layer is adjacent to the first substrate, disposing a second substrate on a second surface of the first-conductivity-type semiconductor layer opposite the first surface, separating the first substrate, disposing a third substrate on the first surface, separating the second substrate, and forming an active layer and a second-conductivity-type semiconductor layer over the second surface. In accordance with the method, it is possible to use a relatively inexpensive substrate. As a semiconductor layer is formed over a Ga-face of a gallium nitride semiconductor layer, an increase in light emission efficiency is achieved.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: June 3, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: JiHyung Moon, HwanHee Jeong, KwangKi Choi, JuneO Song, SangYoul Lee
  • Patent number: 8735890
    Abstract: In a display substrate and a method of manufacturing the display substrate, the display substrate includes a data line, a channel pattern, an insulating pattern and a pixel electrode. The data line extends in a direction on a base substrate. The channel pattern is disposed in a separate region between an input electrode connected to the data line and an output electrode spaced apart from the input electrode. The channel pattern makes contact with the input electrode and the output electrode on the input and output electrodes. The insulating pattern is spaced apart from the channel pattern on the base substrate and includes a contact hole exposing the output electrode. The pixel electrode is formed on the insulating pattern to make contact with the output electrode through the contact hole. Thus, a damage of the oxide semiconductor layer may be minimized and a manufacturing process may be simplified.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: May 27, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ki-Won Kim, Je-Hun Lee, Sung-Haeng Cho, Woo-Geun Lee, Kap-Soo Yoon, Do-Hyun Kim, Seung-Ha Choi
  • Patent number: 8728841
    Abstract: A nitride semiconductor light emitting device, and a method of manufacturing the same are disclosed. The nitride semiconductor light emitting device includes a substrate, an n-type nitride semiconductor layer disposed on the substrate and including a plurality of V-shaped pits in a top surface thereof, an active layer disposed on the n-type nitride semiconductor layer and including depressions conforming to the shape of the plurality of V-shaped pits, and a p-type nitride semiconductor layer disposed on the active layer and including a plurality of protrusions on a top surface thereof. Since the plurality of V-shaped pits are formed in the top surface of the n-type nitride semiconductor layer, the protrusions can be formed on the p-type nitride semiconductor layer as an in-situ process. Accordingly, the resistance to ESD, and light extraction efficiency are enhanced.
    Type: Grant
    Filed: February 2, 2012
    Date of Patent: May 20, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong Tak Oh, Yong Chun Kim
  • Patent number: 8686463
    Abstract: A capping system includes: a moving portion moving a stem, on which an optical semiconductor element is mounted, horizontally; a fixer fixing a cap having a window, on the stem; a camera taking an image of the cap and the stem from above the cap and the stem; a detector detecting whether the optical semiconductor element is present within a visual field of the camera; and a searching action controller controlling the moving portion to move the stem so the detector searches the optical semiconductor element. The searching action controller causes searching radially and outwardly from a search starting point.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: April 1, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventor: Nobuyuki Kitajima
  • Patent number: 8680571
    Abstract: A light emitting diode (LED) capable of improving brightness by forming a InGaN layer having a low concentration of indium, and whose lattice constant is similar to that of an active layer of the LED, is provided. The LED includes: a buffer layer disposed on a sapphire substrate; a GaN layer disposed on the buffer layer; a doped GaN layer disposed on the GaN layer; a GaN layer having indium disposed on the GaN layer; an active layer disposed on the GaN layer having indium; and a P-type GaN disposed on the active layer. Here, an empirical formula of the GaN layer having indium is given by In(x)Ga(1?x)N and a range of x is given by 0<x<2, and a thickness of the GaN layer having indium is 50-200 ?.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: March 25, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Seong Jae Kim
  • Patent number: 8674338
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting portion. The light emitting portion is provided between the semiconductor layers and includes barrier layers and well layers alternately stacked. An n-side end well layer which is closest to the n-type semiconductor layer contains InwnGa1-wnN and has a layer thickness twn. An n-side end barrier layer which is closest to the n-type semiconductor layer contains InbnGa1-bnN and has a layer thickness tbn. A p-side end well layer which is closest to the p-type semiconductor layer contains InwpGa1-wpN and has a layer thickness twp. A p-side end barrier layer which is closest to the p-type semiconductor contains InbpGa1-bpN and has a layer thickness tbp. A value of (wp×twp+bp×tbp)/(twp+tbp) is higher than (wn×twn+bn×tbn)/(twn+tbn) and is not higher than 5 times (wn×twn+bn×tbn)/(twn+tbn).
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: March 18, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Toshiki Hikosaka, Shigeya Kimura, Hajime Nago, Shinya Nunoue
  • Patent number: 8674375
    Abstract: A light emitting diode (LED) includes a p-type layer of material, an n-type layer of material and an active layer between the p-type layer and the n-type layer. A roughened layer of transparent material is adjacent one of the p-type layer of material and the n-type layer of material. The roughened layer of transparent material has a refractive index close to or substantially the same as the refractive index of the material adjacent the layer of transparent material, and may be a transparent oxide material or a transparent conducting material. An additional layer of conductive material may be between the roughened layer and the n-type or p-type layer.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: March 18, 2014
    Assignee: Cree, Inc.
    Inventors: Steven P. Denbaars, James Ibbetson, Shuji Nakamura
  • Patent number: 8674382
    Abstract: A semiconductor light emitting device (10) comprises a semiconductor structure (12) comprising a first body (14) of a first semiconductor material (in this case Ge) comprising a first region of a first doping kind (in this case n) and a second body (18) of a second semiconductor material (in this case Si) comprising a first region of a second doping kind (in this case p). The structure comprises a junction region (15) comprising a first heterojunction (16) formed between the first body (14) and the second body (18) and a pn junction (17) formed between regions of the structure of the first and second doping kinds respectively. A biasing arrangement (20) is connected to the structure for, in use, reverse biasing the pn junction, thereby to cause emission of light.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: March 18, 2014
    Assignee: Insiava (Pty) Limited
    Inventors: Lukas Willem Snyman, Monuko Du Plessis
  • Patent number: 8642367
    Abstract: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: February 4, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yu-Gwang Jeong, Young-Wook Lee, Sang-Gab Kim, Woo-Geun Lee, Min-Seok Oh, Jang-Soo Kim, Kap-Soo Yoon, Shin-Il Choi, Hong-Kee Chin, Seung-Ha Choi, Seung-Hwan Shim, Sung-Hoon Yang, Ki-Hun Jeong
  • Publication number: 20140030836
    Abstract: A method of fabricating an electronic device includes providing a silicon carbide or diamond-like carbon donor body and implanting ions into a first surface of the donor body to define a cleave plane. After implanting, an epitaxial layer is formed on the first surface, and a temporary carrier is coupled to the epitaxial layer. A lamina is cleaved from the donor body at the cleave plane, and the temporary carrier is removed from the lamina. In some embodiments a light emitting diode or a high electron mobility transistor is fabricated from the lamina and epitaxial layer.
    Type: Application
    Filed: July 26, 2012
    Publication date: January 30, 2014
    Applicant: Twin Creeks Technologies, Inc.
    Inventors: Venkatesan Murali, Steve Babayan, Christopher J. Petti
  • Patent number: 8633508
    Abstract: A semiconductor device according to the embodiment includes a growth substrate; a first buffer layer having a compositional formula of RexSiy (0?x?2, 0?y?2) over the growth substrate; and a group III nitride-based epitaxial semiconductor layer having a compositional formula of InxAlyGa1-x-yN (0?x, 0?y, x+y?1) over the first buffer layer.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: January 21, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: June O Song
  • Patent number: 8629441
    Abstract: The semiconductor device includes a driver circuit including a first thin film transistor and a pixel including a second thin film transistor over one substrate. The first thin film transistor includes a first gate electrode layer, a gate insulating layer, a first oxide semiconductor layer, a first oxide conductive layer, a second oxide conductive layer, an oxide insulating layer which is in contact with part of the first oxide semiconductor layer and which is in contact with peripheries and side surfaces of the first and second oxide conductive layers, a first source electrode layer, and a first drain electrode layer. The second thin film transistor includes a second gate electrode layer, a second oxide semiconductor layer, and a second source electrode layer and a second drain electrode layer each formed using a light-transmitting material.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: January 14, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Miyuki Hosoba, Tatsuya Takahashi
  • Patent number: 8586965
    Abstract: A Group III nitride semiconductor light-emitting device includes a light-emitting layer having a multiple quantum structure including an AlxGa1-xN (0<x<1) layer as a barrier layer. When the light-emitting layer is divided into three blocks including first, second and third blocks in the thickness direction from the n-type-layer-side cladding layer to the p-type-layer-side cladding layer, the number of barrier layers are the same in the first and third blocks, and the Al composition ratio of each light-emitting layer is set to satisfy a relation x+z=2y and z<x where an average Al composition ratio of the barrier layers in the first block is represented as x, an average Al composition ratio of the barrier layers in the second block is represented as y, and an average Al composition ratio of the barrier layers in the third block is represented as z.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: November 19, 2013
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Yusuke Toyoda, Koji Okuno, Kazuki Nishijima
  • Patent number: 8574955
    Abstract: Provided is a light-emitting film having controllable resistivity, and a high-luminance light-emitting device, which can be driven at a low voltage, using such light-emitting film. The light-emitting film includes Cu as an addition element in a zinc sulfide compound which is a base material, wherein the zinc sulfide compound includes columnar ZnS crystals, and sites formed of copper sulfide on a grain boundary where the ZnS crystals are in contact with each other.
    Type: Grant
    Filed: November 15, 2011
    Date of Patent: November 5, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tomoyuki Oike, Tatsuya Iwasaki, Yoshihiro Ohashi
  • Patent number: 8569088
    Abstract: A semiconductor light-emitting element includes: a substrate; and a nitride semiconductor multilayer film provided on an upper surface of the substrate and including an active layer. A recess, a stepped portion, or a protruding portion is formed in an active layer or a layer that contacts a lower surface of the active layer. A ridge stripe, which has a front end facet and a rear end facet and serves as an optical waveguide, is formed in an upper part of the nitride semiconductor multilayer film. The distance from a lateral center of the ridge stripe to a lateral center of the recess, the stepped portion, or the protruding portion changes continuously or in stages from the front end facet toward the rear end facet. Bandgap energy of the active layer changes continuously or in stages from the front end facet toward the rear end facet.
    Type: Grant
    Filed: September 15, 2012
    Date of Patent: October 29, 2013
    Assignee: Panasonic Corporation
    Inventor: Kenji Orita
  • Patent number: 8558217
    Abstract: A light emitting diode includes a substrate, a carbon nanotube layer, a first semiconductor layer, an active layer, a second semiconductor layer, a first electrode, and a second electrode. The first semiconductor layer, the active layer, and the second semiconductor layer are stacked on one side of the substrate in that order. The first semiconductor layer is adjacent to the substrate. The carbon nanotube layer is located between the first semiconductor layer and the substrate. The first electrode is electrically connected to the first semiconductor layer. The second electrode is electrically connected to the second semiconductor layer.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: October 15, 2013
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Yang Wei, Shou-Shan Fan
  • Patent number: 8546839
    Abstract: A light emitting diode includes a substrate, a first semiconductor layer, an active layer and a second semiconductor layer. The first semiconductor layer, the active layer and the second semiconductor layer are stacked on one side of the substrate in that order. The first semiconductor layer is oriented to the substrate. A number of channels are defined between the first semiconductor layer and the substrate.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: October 1, 2013
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Yang Wei, Shou-Shan Fan
  • Patent number: 8546167
    Abstract: A nitride-based semiconductor light-emitting element includes an n-GaN layer 102, a p-GaN layer 107, and a GaN/InGaN multi-quantum well active layer 105, which is interposed between the n- and p-GaN layers 102 and 107. The GaN/InGaN multi-quantum well active layer 105 is an m-plane semiconductor layer, which includes an InxGa1-xN (where 0<x<1) well layer 104 that has a thickness of 6 nm or more and 17 nm or less, and oxygen atoms included in the GaN/InGaN multi-quantum well active layer 105 have a concentration of 3.0×1017 cm?3 or less.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: October 1, 2013
    Assignee: Panasonic Corporation
    Inventors: Ryou Kato, Shunji Yoshida, Toshiya Yokogawa
  • Patent number: 8524527
    Abstract: Methods, materials, apparatus and systems are described for implementing high-performance arsenic (As)-doped indium oxide (In2O3) nanowires for transparent electronics, including their implementation in transparent thin-film transistors (TTFTs) and transparent active-matrix organic light-emitting diodes (AMOLED) displays. In one implementation, a method of fabricating n-type dopant-doped metal oxide nanowires includes dispersing nanoparticle catalysts on a Si/SiO2 substrate. n-type dopant-doped metal oxide nanowires are grown on the Si/SiO2 substrate using a laser ablation process.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: September 3, 2013
    Assignee: University of Southern California
    Inventors: Chongwu Zhou, PoChiang Chen
  • Patent number: 8525195
    Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers, a light emitting portion, a multilayered structural body, and an n-side intermediate layer. The light emitting portion is provided between the semiconductor layers. The light emitting portion includes barrier layers containing GaN, and a well layer provided between the barrier layers. The well layer contains Inx1Ga1-x1N. The body is provided between the n-type semiconductor layer and the light emitting portion. The body includes: first layers containing GaN, and a second layer provided between the first layers. The second layer contains Inx2Ga1-x2N. Second In composition ratio x2 is not less than 0.6 times of first In composition ratio x1 and is lower than the first In composition x1. The intermediate layer is provided between the body and the light emitting portion and includes a third layer containing Aly1Ga1-y1N (0<y1?0.01).
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: September 3, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Nago, Koichi Tachibana, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
  • Publication number: 20130217164
    Abstract: An organic layer deposition apparatus and a method of manufacturing an organic light emitting display apparatus by using the organic layer deposition apparatus. An organic layer deposition apparatus includes: a carrier including a chuck on which a substrate is mounted to form an organic layer; a scanning unit including a deposition unit for discharging a deposition raw material, and a patterning slit sheet having a plurality of patterning slits, the patterning slit sheet being smaller than the substrate in at least one of a first direction or a second direction perpendicular to the first direction; and a chamber accommodating the carrier and the scanning unit, the scanning unit being arranged to be spaced apart from the substrate and movable relative to the carrier.
    Type: Application
    Filed: October 24, 2012
    Publication date: August 22, 2013
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventor: SAMSUNG DISPLAY CO., LTD.
  • Patent number: 8513660
    Abstract: A suspension or solution for organic optoelectronic device is disclosed in this invention. The composition of the suspension or solution includes at least one kind of micro/nano transition metal oxide and a solvent. The composition of the suspension or solution can selectively include at least one kind of transition metal oxide ions or a precursor of transition metal oxide. Moreover, the making method and applications of the suspension or solution is also disclosed in this invention.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: August 20, 2013
    Assignee: National Taiwan University
    Inventors: Jing-Shun Huang, Ching-Fuh Lin
  • Patent number: 8487341
    Abstract: Provided is a method of manufacturing a semiconductor device. In the method, a growth substrate provided with a single crystal semiconductor thin layer, a support substrate, and a temporary substrate are prepared, the growth substrate, the support substrate, and the temporary substrate are bonded to one another with the support substrate therebetween through functional wafer coupling layers, the growth substrate is lifted off from the single crystal semiconductor thin layer, and the temporary substrate is lifted off from the support substrate.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: July 16, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventor: June O Song
  • Patent number: 8487335
    Abstract: Disclosed herein is a light emitting device including: an organic layer sandwiched between a first electrode and a second electrode to serve as an organic layer including a light emitting layer for emitting monochromatic light at one location; a first light reflection boundary face provided on a side close to the first electrode to serve as a boundary face for reflecting light emitted from the light emitting layer so as to radiate the reflected light from a side close to the second electrode; and a second light reflection boundary face, a third light reflection boundary face and a fourth light reflection boundary face which are sequentially provided at positions separated away from each other in a direction from the first electrode to the second electrode on the side close to the second electrode.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: July 16, 2013
    Assignee: Sony Corporation
    Inventor: Toshihiro Fukuda
  • Patent number: 8461569
    Abstract: A semiconductor device includes a quantum dot and a plurality of layers, wherein said plurality of layers includes: a first layer; a stressor layer; and a patterned layer wherein said stressor layer overlies said first layer and said patterned layer overlies said stressor layer; wherein said stressor layer has a substantially different lattice constant to said first layer and said patterned layer and has a pit provided in said layer; said quantum dot lying above said patterned layer aligned with said pit.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: June 11, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Joanna Krystyna Skiba-Szymanska, Andrew James Shields
  • Publication number: 20130134452
    Abstract: Provided is a display device including: a substrate; and multiple pixels provided on the substrate, the pixels each having an organic EL element obtained by laminating a lower electrode provided on the substrate, an organic compound layer, and an upper electrode in the stated order, and the lower electrode including an electrode independently placed for each of the pixels, in which: the lower electrode is formed of a first lower electrode layer provided on the substrate and a second lower electrode layer provided on the first lower electrode layer; the organic compound layer and the upper electrode cover the first lower electrode layer and the second lower electrode layer; and charge injection property from the second lower electrode layer into the organic compound layer is larger than charge injection property from an end portion of the first lower electrode layer into the organic compound layer.
    Type: Application
    Filed: November 6, 2012
    Publication date: May 30, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Canon Kabushiki Kaisha
  • Patent number: 8441029
    Abstract: To suppress adhesion of impurities to a semiconductor light emitting element, there is provided a nitride-based semiconductor light emitting element including: a laminated body having a first cladding layer, an active layer formed over the first cladding layer, and a second cladding layer formed over the active layer; and a dielectric film with a thickness of 3 ?m or more that is formed on the side surface of the laminated body on the side where light is emitted and that covers at least a first side surface of the active layer.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: May 14, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Chiaki Sasaoka
  • Publication number: 20130105824
    Abstract: Devices incorporating a single to a few-layer MoS2 channels in combination with optimized substrate, dielectric, contact and electrode materials and configurations thereof, exhibit light emission, photoelectric effect, and superconductivity, respectively.
    Type: Application
    Filed: October 26, 2012
    Publication date: May 2, 2013
    Inventors: Makarand Paranjape, Paola Barbara, Amy Liu, Marcio Fontana
  • Patent number: 8421115
    Abstract: A semiconductor material includes a matrix semiconductor includes constituent atoms bonded to each other into a tetrahedral bond structure, and a heteroatom Z doped to the matrix semiconductor, in which the heteroatom Z is inserted in a bond so as to form a bond-center structure with an stretched bond length, and the bond-center structure is contained in a proportion of 1% or more based on the heteroatom Z.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: April 16, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazushige Yamamoto, Tatsuo Shimizu