Abstract: An object is to provide a semiconductor device that can realize a function of a thyristor without complication of the process. A semiconductor device including a memory circuit that stores a predetermined potential by reset operation and initialization operation is provided with a circuit that rewrite data in the memory circuit in accordance with supply of a trigger signal. The semiconductor device has a structure in which a current flowing through the semiconductor device is supplied to a load by rewriting data in the memory circuit, and thus can function as a thyristor.

Abstract: A pixel structure for an LCD panel comprises at least one gate line, a storage line, a lower-substrate pixel electrode and a first switch unit. The at least one gate line is configured to input a scanning signal to the first switch unit; the first switch unit is connected to the at least one gate line, the storage line and the lower-substrate pixel electrode respectively, and is configured to receive the scanning signal and transfer an electric signal from the storage line to the lower-substrate pixel electrode according to the scanning signal. The pixel structure and the LCD panel comprising the pixel structure can reduce the number of pads to simplify design of the peripheral circuit; and because the data line is not used for signal transferring; even disconnection of the data line will not affect the curing effect of the UV process.

Abstract: Disclosed is a semiconductor device 100A that has first lightly doped drain regions 31A1 and 32A1 between a source region 34A1 and a channel region 33A1 of a first conductive-type driver circuit TFT 10A1 and/or between a drain region 35A1 and the channel region 33A1 of the first conductive-type driver circuit TFT 10A1, and second lightly doped drain regions 31C and 32C between a source region 34C and a channel region 33C of a first conductive-type pixel TFT 10C and/or between a drain region 35C and the channel region 33C of the first conductive-type pixel TFT 10C, in which the first lightly doped drain regions 31A1 and 32A1 have first conductive-type impurities n1 at a first impurity concentration C1, and the second lightly doped drain regions 31C and 32C have first conductive-type impurities n1 at the first impurity concentration C1 and second conductive-type impurities p2 at a second impurity concentration C2.

Abstract: A flat panel display device with oxide thin film transistors and a fabricating method thereof are disclosed. The flat panel display device includes: a substrate; gate lines and data lines formed to cross each other and define a plurality of pixel regions on the substrate; the thin film transistors each including an oxide channel layer which is formed at an intersection of the gate and data lines; a pixel electrode and a common electrode formed in the pixel region with having a passivation layer therebetween; and step coverage compensation patterns formed at a step portion formed by the gate line and a gate electrode of the thin film transistor.

Abstract: A pixel array substrate includes a pixel region and a circuit region adjacent to the pixel region. A plurality of display pixel units are disposed in the pixel region and a plurality of dummy pixel units are disposed in the circuit region. Each of the dummy pixel units includes a data line, a scan line, a plurality of switching elements and a plurality of pixel electrodes. The switching elements are electrically connected to the scan line and data line. The pixel electrodes are electrically connected to the switching elements. Particularly, electrostatic currents in the pixel region can be dissipated by the dummy pixel units in the circuit region. The dummy pixel units preserve the continuity of electricity in the pixel array substrate and function as an inner short ring. Therefore, the area of the circuit region on the pixel array substrate is larger.

Abstract: A pixel array substrate includes a pixel region and a circuit region adjacent to the pixel region. A plurality of display pixel units are disposed in the pixel region and a plurality of dummy pixel units are disposed in the circuit region. Each of the dummy pixel units includes a data line, a scan line, a plurality of switching elements and a plurality of pixel electrodes. The switching elements are electrically connected to the scan line and data line. The pixel electrodes are electrically connected to the switching elements. Particularly, electrostatic currents in the pixel region can be dissipated by the dummy pixel units in the circuit region. The dummy pixel units preserve the continuity of electricity in the pixel array substrate and function as an inner short ring. Therefore, the area of the circuit region on the pixel array substrate is larger.

Abstract: A method for manufacturing a thin film transistor includes a first process of forming a gate electrode on a substrate; a second process of forming a gate insulation film so as to cover the gate electrode; a third process of forming a source electrode and a drain electrode on the gate insulation film; a fourth process of forming a semiconductor layer connected to the source electrode and the drain electrode; a fifth process of forming a protection film so as to overlap a portion of the source electrode and the drain electrode immediately above the semiconductor layer; and a sixth process of patterning the semiconductor layer using the protection film as a mask.

Abstract: A semiconductor device (18) includes: a gate electrode (102) formed on a substrate (101); a semiconductor layer (104) formed above the gate electrode (102) and including a source region, a drain region, and a channel region; a source electrode (106) connected to the source region above the semiconductor layer (104); and a drain electrode (107) connected to the drain region above the semiconductor layer (104). The semiconductor layer (104) has, at a portion overlapping the drain electrode (107), a protrusion that protrudes outward along an extending direction of a drain line drawn out from the drain electrode (107). At an outside of the channel region sandwiched between the drain electrode (107) and the source electrode (106), the semiconductor layer (104) has an adjustment portion where an outer boundary of the semiconductor layer (104) is positioned more inward than an outer boundary of the gate electrode (102).

Abstract: A semiconductor having an active layer; a gate insulating film in contact with the semiconductor; a gate electrode opposite to the active layer through the gate insulating film; a first nitride insulating film formed over the active layer; a photosensitive organic resin film formed on the first nitride insulating film; a second nitride insulating film formed on the photosensitive organic resin film; and a wiring provided on the second, nitride insulating film. A first opening portion is provided in the photosensitive organic resin film, an inner wall surface of the first opening portion is covered with the second nitride insulating film, a second opening portion is provided in a laminate including the gate insulating film, the first nitride insulating film, and the second nitride insulating film inside the first opening portion, and the semiconductor is connected with the wiring through the first opening portion and the second opening portion.

Abstract: A substrate includes an active layer, a gate electrode, source and drain electrodes, first and second insulating layers, a first line and a second line on a same layer as the gate electrode, the first line and the second line include a same material as the gate electrode and are aligned in a first direction, a third line crosses the first line, the third line is on a same layer as the source and drain electrodes, includes a same material as the source and drain electrodes, and is aligned in a second direction, a repair line on a same layer as the active layer, the repair line includes a same material as the active layer, a pixel electrode in the pixel region, and the pixel electrode is on a same layer as a lower electrode of the gate electrode and includes a same material as the lower electrode.

Abstract: An organic light-emitting display device includes a gate electrode, a source electrode, and a drain electrode on a substrate, a gate interconnection line connected to the gate electrode, a source and drain interconnection line connected to the source and drain electrodes, a first test pad electrically connected to the source and drain interconnection line, and a second test pad electrically connected to the gate interconnection line. The second test pad is at a same level as the first test pad, and the gate electrode is on a different layer than the source and drain electrodes.

Abstract: A thin film semiconductor device formed as integrated circuits on an insulating substrate with bottom gate type thin film transistors stacked with gate electrodes, a gate insulating film and a semiconductor thin film in the order from below upward. The gate electrodes comprise metallic materials with thickness less than 100 nm. The gate insulating film has a thickness thicker than the gate electrodes. The semiconductor thin film comprises polycrystalline silicon crystallized by a laser beam. By reducing thickness of metallic gate electrodes, thermal capacity becomes small and difference in thermal condition on the metallic gate electrodes and on the insulating substrate made of glass or the like becomes small. This invention relates to the task of uniforming and optimizing recrystallization by a laser anneal treatment provided for the semiconductor thin film which works as an active layer of the bottom gate type thin film transistors.

Abstract: The present invention provides a highly controllable device for exposure from the back side and an exposure method, and also provides a method of manufacturing a semiconductor device using the same. The present invention involves exposure with the use of the back side exposure device of which a reflecting means is disposed on the front side of a substrate, apart from a photosensitive thin film surface by a distance X (X=0.1 ?m to 1000 ?m), and formation of a photosensitive thin film pattern in a self alignment manner, with good controllability, at a position a distance Y away from the end of a pattern. The invention fabricates a TFT using that method.

Abstract: An array substrate for a liquid crystal display device comprises: gate and data lines crossing each other on a substrate to define a pixel region; a common line spaced apart from and parallel with the gate line; a thin film transistor in the pixel region and connected to the gate and data lines; a passivation layer on the thin film transistor; and pixel and common electrodes alternately arranged to produce an in-plane electric field, wherein each of the pixel and common electrodes has a double-layered structure of which the lower layer is formed of reflective conductive material and the upper layer is formed of transparent conductive material.

Abstract: A conventional setting voltage was a value with an estimated margin of a characteristic change of a light emitting element. Therefore, a voltage between the source and drain of a driver transistor Vds had to be set high (Vds?Vgs?VTh+a). This caused high heat generation and power consumption because a voltage applied to the light emitting element. The invention is characterized by feedbacking a change in a current value in accordance with the deterioration of a light emitting element and a power source voltage controller which modifies a setting voltage. Namely, according to the invention, the setting voltage is to be set in the vicinity of the boundary (critical part) between a saturation region and a linear region, and a voltage margin for the deterioration is not required particularly for an initial setting voltage.

Abstract: An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.

Abstract: A semiconductor device includes an oxide semiconductor film in which a channel portion is formed and a gate portion arranged to be opposed to the channel portion. A drain portion in which the oxide semiconductor film has been subjected to resistance reduction process and an intermediate area which is provided between the drain portion and the channel portion and has not been subjected to resistance reduction process are formed in the oxide semiconductor film, and the semiconductor device includes a conductive film to block resistance reduction process to the intermediate area at least at a part.

Abstract: An electro-optical device includes a display unit in which a plurality of pixel circuits is arranged; and a driving circuit that is disposed to be distanced from the display unit and outputs a signal for driving the plurality of pixel circuits. The display unit and the driving circuit are formed on a first surface of a semiconductor substrate. Each of the pixel circuits has a first transistor, the driving circuit has a second transistor, and the first transistor is formed in a first well and a first substrate potential is supplied. The second transistor is formed in a second well, the first well has the same conductivity type as the second well has, and the first well and the second well are separated from each other.

Abstract: A thin-film transistor array substrate is disclosed. In one embodiment, the transistor includes a capacitor including a lower electrode disposed on the same layer as an active layer and an upper electrode disposed on the same layer as a gate electrode. The transistor may also include a first insulating layer disposed between the active layer and the gate electrode and between the lower and upper electrodes, the first insulating layer not being disposed on a perimeter of the lower electrode. The transistor may further include a second insulating layer between the first insulating layer and the source and drain electrodes, the second insulating layer not being disposed on perimeters of the upper and lower electrodes.

Abstract: A thin-film transistor array substrate and a fabrication method thereof according to an embodiment of the present invention are disclosed to form an interlayer insulating layer, thereby reducing a failure occurred during the process subsequent to a gate electrode. The thin-film transistor disclosed according to the present invention may include a substrate, a gate electrode formed on the substrate, a planarized insulating layer formed at a lateral surface portion of the gate electrode and at an upper portion of the substrate, a gate insulating layer formed on the planarized insulating layer containing an upper portion of the gate electrode, an active layer formed at an upper portion of the planarized insulating layer located at an upper side of the gate electrode, and a source electrode and a drain electrode formed on the active layer and separated from each other based on a channel region.

Abstract: Exemplary embodiments of the invention disclose a method of manufacturing a thin film transistor array panel having reduced overall processing time and providing a uniform crystallization. Exemplary embodiments of the invention also disclose a crystallization method of a thin film transistor, including forming on a substrate a semiconductor layer including a first pixel area, a second pixel area, and a third pixel area. The crystallization method includes crystallizing a portion of the semiconductor layer corresponding to a channel region of a thin film transistor using a micro lens array.

Abstract: The present invention provides an active matrix substrate that enables to suppress variation in the pixel potential even if an alignment shift is present. The active matrix substrate of the present invention includes a plurality of pixel electrodes arranged in a matrix; and a source wiring running in a column direction, wherein the source wiring has a first side portion running along one side in a column direction of at least one pixel electrode of the plurality of pixel electrodes, a crossing portion running across the pixel electrode, and a second side portion running along another side in the column direction of the pixel electrode, the first side portion and the second side portion are connected to each other via the crossing portion, and at least one crossing portion is provided on each of at least two pixel electrodes aligned in the column direction out of the plurality of pixel electrodes.

Abstract: This disclosure provides systems, methods and apparatus for fabricating thin film transistor devices. In one aspect, a substrate having a source area, a drain area, and a channel area is provided. The substrate also includes an oxide semiconductor layer, a first dielectric layer overlying the channel area of the substrate, and a first metal layer on the dielectric layer. Hydrogen ions are implanted with a plasma-immersion ion implantation process in the oxide semiconductor layer overlying the source area and the drain area of the substrate. The hydrogen ion implantation forms a doped n-type oxide semiconductor in the oxide semiconductor layer overlying the source area and the drain area of the substrate.

Abstract: A thin-film transistor (TFT) array substrate includes an active layer on a substrate and a lower electrode of a capacitor on the same level as the active layer, a first insulation layer on the active layer and the lower electrode and having a first gap exposing an area of the lower electrode; a gate electrode of the TFT on the first insulation layer, and an upper electrode of the capacitor on the lower electrode and the first insulation layer, the upper electrode having a second gap that exposes the first gap and a portion of the first insulation layer; a second insulation layer disposed between the gate electrode and source electrode and drain electrodes, and not disposed on the upper electrode, in the first gap of the first insulation layer, or in the second gap of the lower electrode.

Abstract: A thin-film transistor array substrate, an organic light-emitting display having the same, and a method of manufacturing the organic light-emitting display are disclosed. In one embodiment, the thin-film transistor array substrate includes a buffer layer formed on a substrate, a first insulating layer formed on the buffer layer, a pixel electrode formed on the first insulating layer using a transparent conductive material, an intermediate layer that covers an upper side and outer side-surfaces of the pixel electrode and includes a organic light-emitting layer, a gap formed by etching the first insulating layer and the buffer layer at a peripheral of the pixel electrode, and a facing electrode that is formed on an upper side and outer side-surfaces of the pixel electrode to cover the intermediate layer and the gap.

Abstract: Disclosed is an active matrix substrate (20a) that includes: an insulating substrate (10a); a first thin film transistor (5a) that is formed on the insulating substrate (10a) and that includes a first oxide semiconductor layer (13a) having a first channel region (Ca); a second thin film transistor (5b) that is formed on the insulating substrate (10a) and that includes a second oxide semiconductor layer (13b) having a second channel region (Cb); and an interlayer insulating film (17) that covers the first oxide semiconductor layer (13a) and the second oxide semiconductor layer (13b). A channel protective film (25), which is formed of a material different from that of the interlayer insulating film (17), is provided between the second oxide semiconductor layer (13b) and the interlayer insulating film (17) on the second channel region (Cb) in the second oxide semiconductor layer (13b).

Abstract: A display substrate for a display device includes a substrate, a switching device, a gate line, a data line, a pixel electrode, a plurality of common electrodes. The switching device includes an active pattern, a gate insulation layer, a gate electrode, a source electrode and a drain electrode. The gate line is electrically connected to the source electrode, and the data line is electrically coupled to the gate electrode. The pixel electrode is electrically connected to the drain electrode, and the common electrodes are disposed on the pixel electrode. A coupling capacitance among the common electrodes and the data line can be prevented and/or reduced to prevent a signal delay of the data line. Further, an aperture ratio of the display substrate can be improved by changing a layout of the data line and the gate line.

Abstract: An etching composition, a method of forming a metal pattern using the etching composition, and a method of manufacturing a display substrate are disclosed. The etching composition includes about 0.1% by weight to about 25% by weight of ammonium persulfate, about 0.1% by weight to about 25% by weight of an organic acid, about 0.01% by weight to about 5% by weight of a chelating agent, about 0.01% by weight to about 5% by weight of a fluoride compound, about 0.01% by weight to about 5% by weight of a chloride compound, about 0.01% by weight to about 2% by weight of an azole-based compound and a remainder of water. Thus, a copper layer may be stably etched to improve a reliability of manufacturing the metal pattern and the display substrate.

Abstract: An OLED device includes an active layer on a substrate; a first insulating layer covering the active layer, and including a first opening and a first insulation island in the first opening, separated from an inner surface of the first opening; a gate electrode on the first insulating layer including gate bottom and top electrodes; a pixel electrode on the first insulation island on the same layer as the gate bottom electrode; source and drain electrodes insulated from the gate electrode and electrically connected to the active layer; a second insulating layer between the gate and the source and drain electrodes, and including a second opening exposing the pixel electrode; a light-reflecting portion in the openings, and surrounding the pixel electrode; an intermediate layer on the pixel electrode and including an organic emissive layer; and an opposite electrode facing the pixel electrode with the intermediate layer interposed between them.

Abstract: A display substrate includes a gate line, a gate insulation layer, a data line, a switching element, a protection insulation layer, a gate pad portion and a data pad portion. The gate insulation layer is disposed on the gate line. The switching element is connected to the gate line and the data line. The protection insulation layer is disposed on the switching element. The gate pad portion includes a first gate pad electrode which makes contact with an end portion of the gate line through a first hole formed through the gate insulation layer, and a second gate pad electrode which makes contact with the first gate pad electrode through a second hole formed through the protection insulation layer. The data pad portion includes a data pad electrode which makes contact with an end portion of the data line through a third hole formed through the protection insulation layer.

Abstract: A substrate and a delamination film are separated by a physical means, or a mechanical means in a state where a metal film formed over a substrate, and a delamination layer comprising an oxide film including the metal and a film comprising silicon, which is formed over the metal film, are provided. Specifically, a TFT obtained by forming an oxide layer including the metal over a metal film; crystallizing the oxide layer by heat treatment; and performing delamination in a layer of the oxide layer or at both of the interface of the oxide layer is formed.

Abstract: A pixel structure includes a first patterned metal layer, a gate insulating layer, a semiconductor channel layer, a second patterned metal layer, a passivation layer, and a conducting layer. A gate line of the second patterned metal layer is electrically connected by the conducting layer to a gate extension electrode of the first patterned metal layer. A source electrode of the second patterned metal layer is electrically connected by the conducting layer to a second data line segment of the first patterned metal layer. A method for fabricating a pixel structure is also disclosed herein.

Abstract: A liquid crystal display includes a substrate and a display region on the substrate. The display region has one or more gate lines; a gate insulating layer; a semiconductor layer; one or more pairs of source and drain electrodes, each pair being one source electrode and one corresponding drain electrode; and one or more data lines, each comprising one or more of the source electrodes. A passivation layer overlies the data lines and the drain electrodes and has a plurality of contact holes; and one or more color filters overlie the passivation layer and have a plurality of through holes. In the display region, in top view, the semiconductor layer has the same shape as the data lines and the drain electrodes except over each region between each source and corresponding drain electrode, and the contact holes' edges are aligned with the through holes' edges.

Abstract: An organic light-emitting display device includes a capacitor lower electrode that includes a semiconductor material doped with ion impurities. A first insulating layer covers an active layer and the capacitor lower electrode. A gate electrode includes a gate lower electrode formed of a transparent conductive material and a gate upper electrode formed of metal. A pixel electrode is electrically connected to the thin film transistor. A capacitor upper electrode is at the same level as the pixel electrode. An etch block layer is formed between the first insulating layer and the capacitor upper electrode. Source and drain electrodes are electrically connected to the active layer. A second insulating layer has an opening completely exposing the capacitor upper electrode. A third insulating layer exposes the pixel electrode. An intermediate layer includes an emissive layer. An opposite electrode faces the pixel electrode.

Abstract: An organic light emitting display apparatus includes a substrate on which a display area and a non-display area are defined, a first electrode on the substrate, an intermediate layer on the first electrode, the intermediate layer includes an organic emission layer, a second electrode on the intermediate layer, a plurality of pad units on the non-display area, and an insulating layer on the pad units. The insulating layer includes contact holes overlapping upper surfaces of the pad units and grooves adjacent to the contact holes.

Abstract: A metal line 731 is formed in a linear area S of an insulative substrate 720, and moreover a metal line 732 is formed generally parallel to the metal line 731 with a specified distance thereto. The metal line 731 is connected to an n-type semiconductor core 701 of bar-like structure light-emitting elements 710A to 710D, and the metal line 732 is connected to a p-type semiconductor layer 702. By dividing the insulative substrate 720 into a plurality of divisional substrates, a plurality of light-emitting devices in each of which a plurality of bar-like structure light-emitting elements 710 are placed on the divisional substrates are formed.

Abstract: A TFT array substrate includes a pixel region and a wiring region disposed outside the pixel region. The wiring region has a wiring layer including scan or data wirings. A repair wiring layer including repair wiring is disposed insulatedly below or above the wiring layer. A scan or data wiring has a first intersection and a second intersection with a repair wiring section of the repair wiring. When the scan or data wiring is broken, a repair wiring section is cut off the repair wiring by a first cut-off point and a second cut-off point, and the broken scan or data wiring is electrically connected to the repair wiring section through soldering the first intersection and the second intersection. Thus, products that would otherwise be rejected in the manufacturing process of LCD panels can be repaired, which decreases the reject ratio, increases the yield and saves the production cost.

Abstract: A display substrate includes first, second, and third insulating layers in a display area thereof. The first and third insulating layers are in not only the display area but also a pad area adjacent to the display area and including a pad therein. Thus, defects of the display panel may be reduced.

Abstract: A display device includes a display element, a thin-film transistor for controlling light emission from the display element, and a signal line connected to the thin-film transistor. The thin-film transistor includes a gate electrode formed on an insulating substrate, a gate insulating film formed on the substrate so as to cover the gate electrode, a channel layer formed on the gate insulating film, and a source electrode and a drain electrode connected to the channel layer. A mounting terminal part of the signal line is formed by laminating a metal oxide layer on a copper layer; its cross section is trapezoidal; and the side surface and the periphery of the top surface of the mounting terminal part are covered with a protective film.

Abstract: A liquid crystal display device includes a pair of transparent substrates facing each other through a liquid crystal layer disposed therebetween; a gate insulating film formed so as to cover a gate electrode formed in the pixel regions, disposed closer to the liquid crystal layer, of one of the transparent substrates; a semiconductor film provided on the gate insulating film, for forming a thin-film transistor; a first electrode provided on the semiconductor film through the first insulating film and the second insulating film; a second electrode provided on the first electrode through a third insulating film; and a contact hole formed collectively in the first insulating film, the second insulating film, and the third insulating film on the first electrode, where a second electrode is formed on the contact hole. A floating electrode is formed in the peripheral region of the contact hole.

Abstract: A method of manufacturing a display substrate is disclosed. In one embodiment, an electrode layer may be formed on a base substrate including a first cell area, a second cell area and an intervening area between the first and the second cell areas. First electrodes may be formed in display regions of the first and the second cell areas by patterning the electrode layer. The electrode layer in an intervening area may be removed. Source electrodes and drain electrodes of thin film transistor may be formed in the first and the second cell areas where the first electrodes are formed.

Abstract: The present invention provides a thin film transistor (TFT) manufacturing method and a TFT, a source electrode or drain electrode of the TFT is electrically connected to a data line directly during a forming process by providing a through hole in a surface above the data line of the TFT, so as to save the process cost. Further, the source electrode and drain electrode of the TFT are also manufactured with poly-silicon rather than metal material used in prior art, processing steps are simplified, thereby further saving the process cost.

Abstract: A semiconductor device, disposed on a substrate, includes a first channel layer, a patterned doped layer, a gate insulating layer, a conducting gate electrode, a second channel layer, a first electrode and a second electrode, and a third electrode and a fourth electrode. The first channel layer is disposed on the substrate and in a first region. The patterned doped layer includes a doped gate electrode disposed in a second region, and two contact electrodes electrically connected to two sides of the first channel layer, respectively. The conducting gate electrode is disposed on the gate insulating layer in the first region. The second channel layer is disposed on the gate insulating layer in the second region. The first electrode and the second electrode are electrically connected to the contact electrodes, respectively. The third electrode and the fourth electrode are electrically connected to two sides of the second channel layer, respectively.

Abstract: A composition for removing a photoresist, the composition including about 1% by weight to about 10% by weight of tetramethyl ammonium hydroxide (“TMAH”), about 1% by weight to about 10% by weight of an alkanol amine, about 50% by weight to about 70% by weight of a glycol ether compound, about 0.01% by weight to about 1% by weight of a triazole compound, about 20% by weight to about 40% by weight of a polar solvent, and water, each based on a total weight of the composition.

Abstract: A thin film transistor and a method for manufacturing the same are provided. A top-gate thin film transistor is fabricated by a process using two gray-tone photomasks and a lift-off method. Therefore, the method can save cost of photomasks and processes comparing to a conventional fabrication method.

Abstract: The present invention provides a pixel structure including a substrate, a patterned electrode disposed on the substrate, a first insulating layer disposed on the patterned electrode, a common electrode disposed on the first insulating layer, a second insulating layer disposed on the common electrode, and a drain disposed on the second insulating layer. The first insulating layer has a first through hole, and the second insulating layer has a second through hole. The drain includes a first portion electrically connected to the patterned electrode via the first through hole and the second through hole, and a second portion extending onto the common electrode. The common electrode is coupled with the patterned electrode to form a first storage capacitor and is coupled with the second portion to form a second storage capacitor.

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes a substrate; a gate line disposed on the substrate; a gate insulating layer disposed on the gate line; a semiconductor disposed on the gate insulating layer; a data line disposed on the semiconductor and including a source electrode; a drain electrode disposed on the semiconductor and facing the source electrode; a first electrode disposed on the gate insulating layer; a protection electrode disposed on the data line; a passivation layer disposed on the first electrode and the protection electrode; and a second electrode disposed on the passivation layer, wherein the protection electrode comprises the same material as the first electrode.

Abstract: An organic light emitting diode display device includes: a switching thin film transistor in a pixel region, the switching thin film transistor including a switching semiconductor layer of polycrystalline silicon; a driving thin film transistor connected to the switching thin film transistor, the driving thin film transistor including a driving semiconductor layer of polycrystalline silicon layer; and a light emitting diode connected to the driving thin film transistor, wherein a direction of a channel of the switching thin film transistor is parallel to a first direction, and a direction of a channel of the driving thin film transistor is perpendicular to the first direction.

Abstract: A liquid crystal display device includes a pair of transparent substrates disposed facing each other through a liquid crystal layer; a gate insulating film formed so as to cover a gate electrode formed in the pixel regions of one of the pair of the transparent substrates closer to the liquid crystal layer; a switching element made of a thin-film transistor placed on the gate insulating film; a first electrode placed on the switching element through first and second insulating films; and a second electrode placed on the first electrode through a third insulating film. The liquid crystal display device generates an electric field in parallel with the pair of the transparent substrates and between the first and second electrodes. The second insulating film is formed of an SOG material having Si—O bonds.

Abstract: In an organic light-emitting display device and a method of manufacturing the same, the display device may include: a thin-film transistor including an active layer, a gate electrode including a first electrode which includes nano-Ag on an insulating layer formed on the active layer and a second electrode on the first electrode, a source electrode, and a drain electrode; an organic light-emitting device including a pixel electrode electrically connected to the thin-film transistor and formed of the same layer as, and using the same material used to form, the first electrode, an intermediate layer including an emissive layer, and an opposite electrode covering the intermediate layer and facing the pixel electrode; and a pad electrode formed of the same layer as, and using the same material used to form, the first electrode in a pad area located outside of a light-emitting area.