Abstract: A power converter circuit includes an input and an output. A supply circuit is configured to receive an input signal from the input and to generate a number of supply signals from the input signal. A number of converter units are provided. Each of the plurality of converter units is configured to receive one of the plurality of supply signals and to output an output signal to the output.

Abstract: A multi-level, step-up converter circuit includes an inductor including one terminal in communication with an input voltage supply. N transistor pairs are connected in series, where N is an integer greater than one. First and second transistors of a first pair of the N transistor pairs are connected together at a node. The node is in communication with another terminal of the inductor. Third and fourth transistors of a second pair of the N transistor pairs are connected to the first and second transistors, respectively. (N?1) capacitors have terminals connected between the N transistor pairs, respectively. An output capacitor has a terminal in communication with at least one transistor of the N transistor pair.

Abstract: A power converting circuit includes an upper gate switch, a transistor, a current source circuit, a comparator circuit, a delay circuit, and a pulse width modulation signal generating circuit. The transistor and the current source circuit provide a reference signal. The comparator circuit generates a comparing signal according to the reference signal and an output signal provided by the upper gate switch. The delay circuit generates a delay signal according to the comparing signal and a clock signal. The pulse width modulation signal generating circuit generates a control signal for the upper gate switch according to the delay signal and the clock signal for configuring the conduction status of the upper gate switch. The power converting circuit adjusts the conduction time of the upper gate switch according to the reference signal and the output signal.

Abstract: A control circuit for a step-up converter includes a soft start module configured to control states of N transistor pairs of the step-up converter, where N is an integer greater than two. A driver module is in communication with the soft start module and configured to generate a first signal when N transistor pairs of the step-up converter are ready to switch. A first charging circuit is configured to charge (N?1) capacitors of the step-up converter to an input voltage of the step-up converter in response to the first signal and to generate a second signal when charging is complete. A second charging circuit is configured to sequentially charge the (N?1) capacitors of the step-up converter to (N?1) predetermined voltage values in response to the first signal and the second signal and before operation of the step-up converter begins.

Abstract: Efficiency of a switch mode power supply (SMPS) is optimized by operating the SMPS in an asynchronous mode when current being supplied therefrom is less than a certain current value and operating the SMPS in a synchronous mode when the current being supplied therefrom is equal to or greater than the certain current value. When the SMPS is operating in the synchronous mode high-side and low-side power transistors alternately turn on and off. When the SMPS is operating in the asynchronous mode only the high-side power transistor turns on and off and the low-side power transistor remains off. When charging a battery with the SMPS discharge of the battery is eliminated when operating in the asynchronous mode at a low current output.

Abstract: Embodiments of systems, methods and apparatuses of a voltage regulator are disclosed. One apparatus of the voltage regulator includes a series switch element, wherein the series switch element comprises a plurality of partitioned series switch elements, a shunt switch element, and a switching controller. The switching controller is operative to control the series switch element and the shunt switch element in an idle state, wherein none of the plurality of partitioned series switch elements are active, control the series switch element and the shunt switch element in a burst state, wherein N of the plurality of partitioned series switch elements are active, and control the series switch element and the shunt switch element in a transition state, wherein M of the plurality of partitioned series switch elements are active, and wherein M is less than N.

Abstract: A fixed voltage generating circuit includes a current mirror, a differential pair, and a resistor coupled to the current mirror. A node of the resistor is coupled to a voltage source. The differential pair includes two resistors coupled to the voltage source to enable the differential pair outputting a stable output voltage.

Abstract: Power converters that produce less noise are disclosed. For example, in an embodiment, power converter can include a first inductor magnetically coupled to a second inductor, wherein a first end of the second inductor is electrically open and a second end of the second inductor is electrically coupled to ground via a second capacitor, a transistor electrically connected to the first inductor, and control circuitry to control switching of the transistor, wherein when the transistor is repeatedly switched on and off by the control circuitry, a current loop is formed through the transistor, the second capacitor, the first inductor and the second inductor, the current loop causing a reduced amount of switching noise to be generated by the power converter.

Abstract: Embodiments of signal bias generators and regulators are described generally herein. Other embodiments may be described and claimed.

Abstract: There are provided a bias circuit and an amplifier having a current limit function, including: a control voltage generating unit generating a control voltage using a reference voltage; a bias voltage generating unit generating a bias voltage according to the control voltage; and a bias current limit unit controlling the control voltage according to a bias current of the bias voltage generating unit.

Abstract: The disclosure is directed to a multi-phase electric power conversion device coupled between a power source and a load. The device includes a first regulator phase and a second regulator phase arranged in parallel, so that a first phase current and a second phase current are controllably provided in parallel to satisfy the current demand requirements of the load. Each phase current is based on current generated in an energy storage device within the respective phase. The regulator phases are asymmetric in that the energy storage device of the second regulator phase is configured so that its current can be varied more rapidly than the current in the energy storage device of the first regulator phase.

Abstract: Various embodiments include apparatus, systems, and methods having a reference node to receive a reference voltage, a first node to provide a signal, and a circuit. Such a circuit may include a second node to receive different voltages greater than the reference voltage and to cause the signal at the first node to switch between a first voltage greater than the reference voltage and a second voltage greater than the reference voltage. Other embodiments including additional apparatus, systems, and methods are described.

Abstract: The disclosed embodiments provide a synchronous switching converter that converts a DC input voltage into a DC output voltage. This synchronous switching converter includes a high-side switching MOSFET coupled between an input node and a first node. The converter also includes a low-side switching MOSFET coupled between the first node and a ground node and is in series with the high-side switching MOSFET. This converter additionally includes a bootstrap capacitor coupled to the high-side switching MOSFET to provide turn-on voltage for the high-side switching MOSFET. Furthermore, the converter includes a main refresh circuit coupled to the bootstrap capacitor and is configured to refresh the bootstrap capacitor during a first operating mode of the synchronous switching converter. Moreover, the converter includes an auxiliary refresh circuit coupled to the main refresh circuit and the bootstrap capacitor and is configured to refresh the bootstrap capacitor during a second operating mode of the converter.

Abstract: A method and apparatus for a boost converter topology for low battery voltage support. In the method, an input voltage is boosted by closing first through third switches and then opening a fourth switch to charge a capacitor. The first and second switches are then opened. The voltage is then doubled by closing the third and fourth switches to discharge the first capacitor into a second capacitor and charging a third capacitor. A further embodiment provides an additional method for selectively boosting an input voltage to an electronic device. The method first characterizes the efficiency of a circuit, and then determines a crossover point for a ratio of output voltage to input voltage, and then enabling or disabling a voltage boost converter based on the crossover point.

Abstract: Techniques for optimizing the trade-off between minimizing switching losses and minimizing conduction losses in a buck converter. In an aspect, each of a high-side switch and a low-side switch may be implemented as a plurality of parallel-coupled transistors, each transistor having an independently controllable gate voltage, allowing adjustment of the effective transistor size. In response to the target voltage of the buck converter corresponding to a relatively high voltage range, more high-side switch transistors and fewer low-side switch transistors may be selected. Similarly, in response to the target voltage corresponding to a relatively low voltage range, more low-side switch transistors and fewer high-side switch transistors may be selected. In an aspect, the techniques may be applied during a pulse-frequency modulation mode.

Abstract: The present invention provides a power supply for processor and control method thereof. The power supply comprises a reference adjusting circuit and a voltage regulator. The reference adjusting circuit is configured to receive a VID code from a processor, and adjust a reference voltage based on the VID code. The voltage regulator is coupled to the reference adjusting circuit and converts an input voltage into an output voltage in accordance to the reference voltage. The reference adjusting circuit adjusts the reference voltage in a plurality of steps until the reference voltage reaches a target value corresponding to the VID code. The reference adjusting circuit adjusts the reference voltage by a preset value during each step, and proceeds to adjust the reference voltage by a next step only after the output voltage reaches a predetermined scope of the reference voltage.

Abstract: Systems and methods for reducing current imbalance between parallel bridge circuits used in a power converter of a power generation system, such as a wind driven doubly fed induction generator (DFIG) system, are provided. The power converter can include a plurality of bridge circuits coupled in parallel to increase the output power capability of the system. Each of the bridge circuits can include a pair of switching elements, such as insulated gate bipolar transistors (IGBTs), coupled in series with one another. The switching elements of the parallel bridge circuits can be controlled, for instance, using control commands (e.g. pulse width modulation commands) according to a substantially non-interleaved switching pattern. The timing of the control commands according to the substantially non-interleaved switching pattern can be adjusted to reduce current imbalance between the parallel bridge circuits.

Abstract: Techniques for generating a boost clock signal for a boost converter from a buck converter clock signal, wherein the boost clock signal has a limited frequency range. In an aspect, the boost clock signal has a maximum frequency determined by Vbst/T, wherein Vbst represents the difference between a target output voltage and a battery voltage, and T represents a predetermined cycle duration. The boost converter may include a pulse insertion block to limit the minimum frequency of the boost clock signal, and a dynamic blanking/delay block to limit the maximum frequency of the boost clock signal. Further techniques are disclosed for generally implementing the minimum frequency limiting and maximum frequency limiting blocks.

Abstract: A power converter includes a plurality of switches that interconnect first and second input terminals of the power converter with first and second output terminals of the power converter. The switches are switched to convert power from the input terminals to the output terminals. During the switching, voltage spikes are mitigated by a first RLC branch connected from the first input terminal to the first output terminal and by a second RLC branch connected from the second input terminal to the second output terminal.

Abstract: A power driving device includes six semiconductor switches and three reverse breakdown diodes. The semiconductor switches has a first end and a second end respectively, and the semiconductor switches are three upper arm semiconductor switches and three lower arm semiconductor switches, wherein end first ends of the upper arm semiconductor switches are electrically connected together, and the second ends electrically connected to each coil of a three-phase coil assembly; the second ends of the lower arm semiconductor switches electrically connected together, and the first ends electrically connected to the second ends of the upper arm semiconductor switches respectively; each diode has an anode and a cathode, wherein the anodes are electrically connected to the second ends of the upper semiconductor switches respectively, and the cathodes are electrically connected to the first ends of the upper arm semiconductor switches respectively.

Abstract: A load control device includes an input and an output connectable to an AC source and an AC load, respectively, with one or more supply lines each corresponding to a phase in the load connecting the input and output. Line-side switches are connected between a line terminal and load terminal, and floating-neutral side switches are connected to the load terminal at one end and at a common neutral connection at another end. A controller determines a direction of current flow on each of the supply lines, determines a switching pattern for each of the line-side switches and each of the floating-neutral side switches based on the determined direction of current flow, and causes each of the line-side switches and floating-neutral side switches to operate in an On condition or an Off condition according to the determined switching pattern, such that a controlled uninterrupted current is provided to the AC load.

Abstract: There is provided a voltage control circuit that is applicable to a LED device, a power supply or the like. The voltage control circuit includes: a voltage dividing unit dividing a supply voltage into a first voltage and a second voltage different from each other; a shunt regulator adjusting the first voltage according to the second voltage; and an output circuit unit outputting the voltage regulated by the shunt regulator.

Abstract: An electronic circuit includes a driver circuit having an output terminal that can be coupled to a load to drive the load. A control circuit may be coupled to the driver circuit for controlling the driver circuit. A transistor may be coupled in series between the driver circuit and the output terminal. The transistor may have a first terminal coupled to the driver circuit and a second terminal coupled to the output terminal. A biasing circuit may be coupled to a gate terminal of the transistor and configured to bias the transistor to a conducting state. The biasing circuit may have sufficient drive strength to maintain the transistor in the conducting state in the presence of electromagnetic interference.

Abstract: A semiconductor device includes a first transistor connected to an internal voltage terminal and a first node at which a first resistance unit is connected. The first resistance unit includes a resistor connected between the first node and a node from which a monitoring voltage is provided for controlling the first transistor. This resistance unit also includes a first resistance adjustment unit connected in parallel with the first resistor. Also included is a second resistance unit having a third resistor connected between the monitor node and a second node which is connected to a ground potential and a second resistance adjustment unit connected in parallel with the third resistor. A comparator comparing the monitor node voltage to a reference is provided with an output terminal connected the first transistor. Also included is a control circuit to control the resistance adjustment units.

Abstract: An energy storage arrangement for an electric load which exchanges electrical power with an energy supply network, has two connections in the form of a load to the parallel circuit and for the energy supply network, a converter which is switched between the connections, is voltage-impressed and contains an energy store. The energy store is designed to store an energy amount which exceeds that necessary for the regular operation of the converter by a multiple. An arc furnace which is fed as a load from an energy supply network contains such an energy storage arrangement.

Abstract: A soft-start circuit is provided. The soft-start circuit generates an output voltage at an output terminal. The soft-start includes a transistor, a capacitor, and a current source. The transistor has a first terminal receiving an input voltage, a second terminal coupled to the output terminal, and a control terminal. The capacitor is coupled between the second terminal and the control terminal of the transistor. The current source is coupled between the control terminal of the transistor and a ground terminal. The capacitor and the current source modulate the output voltage by modulating a driving voltage at the control terminal to perform a soft-start operation of the output voltage.

Abstract: The invention provides a current control circuit and a current control method. The current control circuit controls a current supplied to a current-controlled device according to a conduction control signal. The current control circuit includes: a conduction control switch coupled to the current-controlled device, for determining whether to conduct the current according to the conduction control signal; and a plurality of current control switches connected to one another in series and coupled to the conduction control switch, for controlling a magnitude of the current.

Abstract: A power control system includes a first switch configured to receive electrical power from a power source and selectably provide the electrical power to a load. A current limiter is intermediate the first switch and the load. A second switch is also configured to receive electrical power from the power source and selectably provide electrical power to the load. The power control system includes a soft-start operating mode wherein the first switch is activated to provide the electrical power to the load, current provided to the load being limited by the current limiter. The second switch is also activated to provide the electrical power to the load, the second switch being activated a predetermined period of time after activation of the first switch. The first and second switches are also deactivated while the voltage of the power source exceeds a predetermined level.

Abstract: In one embodiment, a source driving circuit configured for a switching power circuit, can include: (i) a source transistor coupled between a source of a main power transistor and ground, where the source transistor can be controlled by a PWM control signal; (ii) the main power transistor being on when the source transistor is on and a gate-source voltage of the main power transistor exceeds a conduction threshold voltage; (iii) a source diode having an anode coupled to the main power transistor source, and a cathode coupled to a delay circuit and a power supply capacitor; and (iv) the delay circuit controlling the main power transistor to turn off a delay time after the source transistor is turned off, where the delay time allows charging of the power supply capacitor such that a voltage across the power supply capacitor is at least a level of a reference voltage.

Abstract: According to one embodiment, a voltage regulator includes an output transistor, a voltage detector, a controller, and a discharge circuit. The output transistor is connected between a power supply terminal and an output terminal. The voltage detector is connected between the output terminal and a ground terminal. The voltage detector is configured to divide an output voltage between the output terminal and the ground terminal according to an inputted voltage switching signal and generates a first voltage on the ground terminal side and a second voltage having a polarity the same as a polarity of the first voltage and having an absolute value lower than or equal to an absolute value of the first voltage. The controller is configured to detect a difference between the first voltage and a reference voltage and control the output transistor.

Abstract: A reactor 1A of the present invention includes a sleeve-like coil 2, a magnetic core 3A having an inner core portion 31 disposed inside the coil 2 and an outer core portion 32A disposed outside the coil 2 to form a closed magnetic path with the inner core portion 31. The outer core portion 32A is a mold product (a hardened mold product) of a mixture of magnetic powder and resin, and structured by a combination of two radially divided pieces 321 and 322 that can be separated in the radial direction of the coil 2. Since the outer core portion 32A is structured by a plurality of divided pieces, the manufacturing time per divided piece can be shortened and excellent productivity of the reactor 1A is exhibited. When the hardened mold product is formed by injection molding, further excellent productivity is exhibited. Since the seam portion of the radially divided pieces 321 and 322 does not break the magnetic flux, no gaps that divide the magnetic flux occur between the divided pieces 321 and 322.

Abstract: A matrix converter includes input terminals, output terminals, a power conversion circuit, and a snubber circuit. The power conversion circuit includes bidirectional switches of which each includes antiparallel connection circuits connected serially. The snubber circuit is connected to the bidirectional switches. The snubber circuit includes first diodes, a capacitor, a second diode, and third diodes. The first diodes are respectively corresponded to the bidirectional switches. A first connecting point of each the first diode is connected to a connection point between the two unidirectional switching elements constituting the bidirectional switch. A first connecting point of the capacitor is connected to a second connecting point of each the first diode. First and second connecting points of the second diode are connected to a second connecting point of the capacitor and the corresponding output terminal. The bidirectional switches, the first diodes, and the second diode are arranged in one power module.

Abstract: There is provided a universal power supply apparatus including a power supply unit switching input power into driving power having a preset voltage level and supplying the driving power, a power recognition unit outputting a recognition voltage having a preset voltage level to an output terminal from which the power is output to recognize connection of a device, controlling a power output of the power supply unit according to a detected rated output, and recognizing disconnection of the device after the connection of the device according to a power state of the driving power of the power supply unit, and a detection unit providing a detection voltage having a preset voltage level to the output terminal.

Abstract: The present invention relates to a protection circuit for protecting a half-bridge circuit. The protection circuit detects an incorrect response of the half-bridge by monitoring the current of a first switch at a series resistor of a second switch. The protection circuit has a detector for detecting the voltage across the resistor and an evaluation circuit which is designed in such a manner that it evaluates an output signal from the detector after the first switch has been switched on and provides a fault signal at an output when the voltage across the resistor is greater than the threshold voltage.

Abstract: A converter and switch mode power supply providing a high voltage signal. Generally described, the converter reduces the driver size required to generate high voltages. A controller which continuously operates the quadratic converter can reduce hard switch losses, electromagnetic interference, and component stress. The controller can utilize soft switching which improves efficiency, eliminates the need for snubbers, and reduces rating requirements. In one illustrative embodiment, the converter can include dual inductors with a single switch architecture. The switch can allow electric energy to be charged within each of the inductors during an “on” state of the switch, while said electric energy can be discharged delivering the same during an “off” state of the switch. A pulse train signal can be fed into the switch so that the converter provides a peak voltage much greater than the voltage placed into the converter.

Abstract: A synchronous DC-DC converter having a soft-stop function includes an output stage for supplying an output voltage, wherein the output stage includes a high-side transistor for charging the output voltage and a low-side transistor for discharging the output voltage; an output control circuit, coupled to the output stage, for controlling the high-side transistor and the low-side transistor of the output stage; at least one protection device, for controlling the high-side transistor to be turned off when a specific situation occurs, in order to stop supplying the output voltage; and a soft-stop control circuit, coupled to the output control circuit, for controlling the low-side transistor of the output stage to be turned on when the protection device controls the high-side transistor to be turned off or the synchronous DC-DC converter is disabled, in order to discharge the output voltage.

Abstract: A configurable-voltage converter circuit that may be CMOS and an integrated circuit chip including the converter circuit and method of operating the IC chip and circuit. A transistor totem, e.g., of 6 or more field effect transistors, PFETs and NFETs, connected (PNPNPN) between a first supply (Vin) line and a supply return line. A first switching capacitor is connected between first and second pairs of totem PN FETs pair of transistors. A second switching capacitor is connected between the second and a third pair of totem FETs. A configuration control selectively switches both third FETs off to float the connected end of the second capacitor, thereby switching voltage converter modes.

Abstract: The invention proposes a voltage regulating device having a switch in an electrical circuit between a first node (30, 140) and a second node (40, 130), comprising a first field effect transistor (21, 110) and a second field effect transistor (22, 120) connected in cascade. The switch is controlled by: —setting the gate (G1,G3) of the first transistor to a first electrical potential, and, —to close the switch, setting the gate (G2, G4) of the second transistor to the first potential, or —to open the switch, setting the gate of the second transistor to the electrical potential of the second node, with the difference between the first potential and the second potential then being adapted to allow opening the first transistor and the second transistor. The switch can be used in a switched-mode power supply.

Abstract: A power control circuit includes a plurality of transistors coupled between a power supply node and a gated power supply node, wherein the gate electrode of a first transistor of the plurality of transistors is coupled to receive a power control signal, wherein, in response to assertion of the power control signal, the first transistor is placed into a conductive state; a first voltage comparator, wherein, in response to assertion of the power control signal, places a second transistor of the plurality of transistors in a conductive state when a voltage on the gated voltage supply node reaches a first reference voltage; and a second voltage comparator, wherein, in response to assertion of the power control signal, places a third transistor of the plurality of transistors in a conductive state when the voltage on the gated voltage supply node reaches a second reference voltage different from the first reference voltage.

Abstract: A power supply circuit is provided which includes a first booster to boost a power supply voltage supplied from a battery and generate a first boosted voltage, a second booster to boost the power supply voltage at a higher multiplication factor than the first booster and generate a second boosted voltage, a power supply selection circuit to output the first boosted voltage or the second boosted voltage, a first smoothing capacitor placed at an output end of the power supply selection circuit, and a second smoothing capacitor placed at an output end of the second booster.

Abstract: Systems and methods for low-power voltage tamper detection are described. In some embodiments, an integrated circuit may include source-follower circuitry configured to produce a scaled down supply voltage. The integrated circuit may also include undervoltage detection circuitry coupled to the source-follower circuitry, the undervoltage detection circuitry configured to output a first signal having a first logic value if the scaled down supply voltage is greater than a low threshold voltage or a second logic value if the scaled down supply voltage is smaller than the low threshold voltage. Additionally or alternatively, the integrated circuit may include overvoltage detection circuitry coupled to the source-follower circuitry, the overvoltage detection circuitry configured to output a second signal having the first logic value if the scaled down supply voltage is smaller than a high threshold voltage or the second logic value if the scaled down supply voltage is greater than the high threshold voltage.

Abstract: A packaged device includes a first die, a second die, and specially spaced and positioned sets of package terminals. The first die includes a pulse-width modulator (PWM), a processor, a timer, high-side drivers, low-side drivers, and a fault protection circuit. The second die includes ultra-high voltage high-side drivers. In an ultra-high voltage application, the PWM and external circuitry together form a switching power supply that generates a high voltage. The high voltage powers external high-side transistors. The processor and timer control the ultra-high voltage high-side drivers, that in turn supply drive signals to the external high-side transistors through the package terminals. External low-side transistors are driven directly by low-side drivers of the first die. If the fault protection circuit detects an excessive current, then the fault protection circuit supplies a disable signal to high-side and low-side drivers of both dice.

Abstract: Data may be encoded onto a direct current power line by modulating the current on that direct current power line. One method of modulating the current is by placing an inductor on the power line and then using a controlled transistor that turns on and turns off. The inductor will ensure that current keeps flowing but the transistor will induce changes in the current pattern. The excess current from when transistor is turned off must be diverted. Furthermore, to create symmetrical current changes, the inductor should be reverse biased. Thus, a circuit is created that sinks the excess current from when the transistor is turned off and used to reverse bias the inductor.

Abstract: A control circuit for a power converter is disclosed, having a shared pin, a driving circuit, a current source, a sampling circuit, and a signal processing circuit. The shared pin is used for coupling with an output end of the power converter through a resistor. The driving circuit is used for conducting a switch of the power converter. The current source provides a current to the resistor through the shared pin. The sampling circuit samples the signal on the shared pin for generating a first sampling value and a second sampling value. When the difference between the first sampling value and the second sampling value is less than a predetermined value, the signal processing circuit configures the driving circuit to adjust at least one of the conduction time and the conduction frequency of the switch according to an output signal of the power converter received from the shared pin.

Abstract: A method of regulating a supply voltage (Vgg) provided to a load circuit. The method can include generating at least one reference voltage (Vr1, Vr2, Vr3) having a negative voltage-temperature coefficient. The method further can include applying the reference voltage as a bias voltage (Vbias) to a current sink that is electrically coupled in parallel with a path of a leakage current (Ileak) drawn by the load circuit. A related voltage regulator can include a current sink that is electrically coupled in parallel with a path of a leakage current drawn by a load circuit, and a bias control circuit that generates at least one reference voltage having a negative voltage-temperature coefficient and applies the reference voltage as a bias voltage to a current sink.

Abstract: A system includes: a first converter for receiving a pre-stage input DC voltage from a power source, and providing a pre-stage output DC voltage including a first DC voltage or a second DC voltage; a modulator the modulator controlling the first converter; a second converter, coupled to the first converter; and a controller, the controller controlling an operation mode of the second converter and notifying the modulator about the operation mode of the second converter. The modulator and the controller receive an external voltage indication signal indicating whether the pre-stage output DC voltage is the first DC voltage or the second DC voltage. The modulator controls the first converter to output the pre-stage output DC voltage based on the voltage indication signal. The modulator notifies the controller about whether the pre-stage output DC voltage reaches a target level.

Abstract: A control circuit for a power converter includes a shared pin, a driving circuit, a current source, a sampling circuit, and a signal processing circuit. The shared pin is coupled with an output end of the power converter through a resistor. The driving circuit conducts a switch of the power converter. The current source provides a current to the resistor through the shared pin. The sampling circuit samples the signal on the shared pin for generating a first sampling value and a second sampling value. The signal processing circuit calculates a first difference between the first sampling value and a first reference value, and a second difference between the second sampling value and a second reference value. When the difference between the first difference and the second difference is less than a predetermined value, the signal processing circuit may therefore configure the conduction time or frequency of the switch.

Abstract: Apparatus and method for controlling inductor current in a switch mode power supply. In one embodiment, a switch mode power supply includes an inductor, a high-side switch coupled to the inductor, a low-side switch coupled to the inductor, and a controller. The controller is coupled to at least one of the high-side switch and the low-side switch. The controller includes a first capacitor and a current source. The controller is configured to control timing of current switching to the inductor by enabling current flow through the at least one of the high-side switch and the low-side switch based on time to charge the first capacitor via the current source. The time is a function of voltage across the inductor.

Abstract: The present disclosure provides a mirror device with illumination comprising a transparent conductive substrate, an isolation layer, a mirror layer and a light emitting diode (LED) layer. The isolation layer, formed on a surface of the transparent conductive substrate, divides the surface of the transparent conductive substrate into at least one first region and at least one second region. The mirror layer formed on the transparent conductive substrate within the at least one first region, while the LED layer is formed on the transparent conductive substrate within the at least one second region, wherein the mirror layer and the LED layer are electrically isolated from each other. In another embodiment, the present disclosure further provides a mirror box having the mirror device with illumination disposed therein so that the mirror device can be easily carried and kept in the pocket, or purse of user.

Abstract: Exemplary embodiments are directed to devices and method for operating a charge pump. A method may include activating a first switch coupled between a capacitor and a ground voltage over a first period of a charging phase. The first period may coincide with a non-overlapping time between the charging phase and an output phase. The method may also include activating a second switch coupled between the capacitor and an input voltage over a second period of the charging phase, wherein the first period begins prior to the second period. Further, the method may include deactivating the second switch over a third period of the charging phase and deactivating the first switch over a fourth period of the charging phase, wherein the third period begins prior to the fourth period.