Using A Three Or More Terminal Semiconductive Device As The Final Control Device Patents (Class 323/311)
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Publication number: 20090096438Abstract: A voltage control circuit accepts an input voltage and produces a regulated output voltage. Embodiments provide improved responsiveness to variations in input voltage, load current, and ambient temperature. Exemplary embodiments include an NPN transistor connected between the input and output terminals, which is controlled by a feedback circuit. In an embodiment, the feedback circuit includes a PMOS transistor and in another embodiment the feedback circuit includes a PNP transistor.Type: ApplicationFiled: September 24, 2008Publication date: April 16, 2009Inventors: Kazuhiko Yamada, Shigemitsu Horikawa
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Publication number: 20090066311Abstract: A pre-conditioner circuit comprising first and second pre-conditioner modules (10, 12), each having an input (Vin1, Vin2) and an output (Vout1, Vout2), the outputs (Vout1, Vout2) being coupled to respective load modules (14, 16). The output (Vout1, Vout2) of each pre-conditioner module (10, 12) is serially connected to the input (Vin2, Vin1) of the other pre-conditioner module (12, 10), such that an arbitrary series of parallel connection of the load modules (14, 16) can be achieved, depending on the rout voltage (Vin). Thus, low voltage components can be used in pre-conditioner modules (10, 12) and the load modules (14, 16), without the need for over-dimensioning.Type: ApplicationFiled: November 3, 2005Publication date: March 12, 2009Applicant: KONINKLIJKE PHILIPS ELECTRONICS, N.V.Inventor: Peter Luerkens
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Publication number: 20090066312Abstract: A reference voltage generation circuit for outputting a reference voltage from an input voltage includes a specific voltage output unit for outputting a specific voltage from the input voltage; a first circuit section for outputting the reference voltage with a positive temperature property from the specific voltage output from the specific voltage output unit; and a second circuit section for setting a level of the reference voltage output from the first circuit section. The specific voltage output unit is formed of a regulator circuit having a first terminal connected to a power source. The first circuit section is formed of a bi-polar transistor element connected to a second terminal of the regulator circuit. The second circuit section is formed of a resistor connected to the second terminal of the regulator circuit, a collector terminal of the bi-polar transistor element, and an emitter terminal of the bi-polar transistor element.Type: ApplicationFiled: August 21, 2008Publication date: March 12, 2009Inventor: Akira Nagumo
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Publication number: 20090001957Abstract: A method and apparatus for supplying a voltage in an information handling system. A modulated voltage signal output circuit linked to an amplitude control element. The amplitude control element linked to a voltage output circuit, the output circuit including one or more electrical energy-storage elements to receive an electrical current. The voltage output circuit having one or more electronic switches to alter the current passing to the energy-storage element(s) to provide a modulated voltage output.Type: ApplicationFiled: June 29, 2007Publication date: January 1, 2009Applicant: DELL PRODUCTS L.P.Inventors: Leszek Brukwicz, Ayedin Nikazm
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Patent number: 7472030Abstract: In a system for performing a dual mode single temperature trim upon an electronic device to remove combined mismatch and process variation errors, a dynamic element matching control is configured for enabling dynamic element matching of components of the electronic device. A process trim module is configured for performing a process trim to remove a temperature dependant error from the electronic device while the dynamic element matching is enabled within the electronic device. A mismatch trim module is configured for performing a mismatch trim to remove a mismatch error from the electronic device after the process trim has been performed. The mismatch trim is performed on a portion of the electronic device for which the dynamic element matching has been disabled. Additionally, the mismatch trim is performed at substantially an equivalent temperature to a temperature at which the process trim was performed.Type: GrantFiled: August 4, 2006Date of Patent: December 30, 2008Assignee: National Semiconductor CorporationInventor: Eric Scheuerlein
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Publication number: 20080315854Abstract: An I/O regulating circuitry is provided. The I/O regulating circuitry omits the ESD device in a CMOS process with a minimized critical dimension to reduce chip size while still maintaining electrostatic discharge immunity. The I/O regulating circuitry is applied in MLC flash memory applications and the flash controller thereof.Type: ApplicationFiled: February 27, 2008Publication date: December 25, 2008Applicant: SILICON MOTION, INC.Inventor: Te-Wei Chen
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Publication number: 20080309307Abstract: A switching regulator having first and second power switches. The first power switch has at least two transistors connected in series, the transistors having a first maximum voltage across their terminals which is less than the input voltage of the regulator. The transistors have at least a first node at the point where they are connected, and a first control circuit controls the voltage at the first node so that the voltages across the terminals of the transistors of the first power switch do not exceed the first maximum voltage. The second power switch also has at least two transistors connected in series, the transistors having a maximum voltage across their terminals that is less than the input voltage. The transistors have at least a second node at the point where they are connected, and a second control circuit controls the voltage at the second node so that the voltages across the terminals of the transistors of the second power switch do not exceed the second maximum voltage.Type: ApplicationFiled: December 4, 2006Publication date: December 18, 2008Applicant: NXP B.V.Inventor: Zhenhua Wang
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Patent number: 7463013Abstract: A regulated mirror current source circuit has an output transistor, a regulator for controlling the output circuit, and a current mirror having two or more current paths. The first path of the mirror is coupled in series with a current path of the output circuit, and the second path is coupled to the regulator, to provide feedback. The feedback can provide better precision, or reduced component area. The circuit can include cascode transistors, and the regulator can have integral control. The output transistor gate-source voltage is overdriven to reduce “on” resistance of the output transistor. When the output transistor is a high voltage transistor, its area can be reduced without sacrificing compliance.Type: GrantFiled: November 21, 2005Date of Patent: December 9, 2008Assignee: AMI Semiconductor Belgium BVBAInventor: Jan Plojhar
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Patent number: 7459961Abstract: A voltage-insensitive circuit includes a second circuit, and a biasing means for providing a constant bias current to the second circuit, the bias current being insensitive to power fluctuations of the voltage-insensitive circuit.Type: GrantFiled: October 31, 2006Date of Patent: December 2, 2008Assignee: Avago Technologies Wireless IP (Singapore) Pte. Ltd.Inventors: Sang Hwa Jung, Jung-Hyun Kim, Moon-Suk Jeon, Woo-Yeon Hong
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Publication number: 20080284405Abstract: The conventional cascode circuit can be improved by adding another transistor in series. The added transistor may use the body effect to reduce supply voltage variations across the cascode transistor as the supply voltage varies. The added transistor reduces impact ionization in the cascode transistor.Type: ApplicationFiled: May 17, 2007Publication date: November 20, 2008Applicant: National Semiconductor CorporationInventor: Perry Scott Lorenz
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Publication number: 20080278137Abstract: Provided herein are circuits and methods to generate a voltage proportional to absolute temperature (VPTAT) and/or a bandgap voltage output (VGO). A circuit includes a group of X transistors. A first subgroup of the X transistors are used to produce a first base-emitter voltage (VBE1). A second subgroup of the X transistors are used to produce a second base-emitter voltage (VBE2). The VPTAT can be produced by determining a difference between VBE1 and VBE2. Which of the X transistors are in the first subgroup and used to produce the first base-emitter voltage (VBE1), and/or which of the X transistors are in the second subgroup and used to produce the second base-emitter voltage (VBE2), change over time. Additionally, a circuit portion can be used to generates a voltage complimentary to absolute temperature (VCTAT) using at least one of the X transistors. The VPTAT and the VCTAT can be added to produce the VGO.Type: ApplicationFiled: April 29, 2008Publication date: November 13, 2008Applicant: INTERSIL AMERICAS INC.Inventor: Barry Harvey
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Patent number: 7433800Abstract: A system for measuring performance of a voltage regulator module (VRM) attached to a microprocessor includes: a voltage transient tester (VTT) fixture (5) for setting different working voltage levels of the VRM; an oscillograph (2) for measuring transient voltage levels of the VRM, and generating a transient voltage waveform according to the transient voltage levels; an voltmeter (3) for measuring steady voltage levels of the VRM under thermal effects generated by the microprocessor; a direct current (DC) electronic load (4) for educing load currents from the VRM; and a measurement control module (10) installed in a computer (1) for generating load current control signals, controlling the DC electronic load to educe the load currents from the VRM according to the load current control signals, and generating a performance report of the VRM by integrating various measurement results.Type: GrantFiled: June 12, 2006Date of Patent: October 7, 2008Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Ming-Shiu Ou Yang, Wei-Yuan Chen, Sung-Kuo Ku, Cho-Hao Wang
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Publication number: 20080211979Abstract: A power supply circuit of the present invention includes a voltage boosting capacitor, a first switch, a second switch, an addition comparison circuit, and a control circuit. The first switch charges the voltage boosting capacitor by applying a first voltage thereto. The second switch connects a second voltage serially to the voltage boosting capacitor that is already charged, thereby boosting the voltage therein. The addition comparison circuit adds up the voltage of the voltage boosting capacitor and the second voltage and compares the comparison result, with a predetermined threshold value. The control circuit controls the on/off state of the first switch according to the comparison result of the addition comparison circuit.Type: ApplicationFiled: February 14, 2008Publication date: September 4, 2008Applicant: NEC ELECTRONICS CORPORATIONInventor: Fumio Tonomura
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Publication number: 20080186003Abstract: Example embodiments relate to an internal power supply voltage generating device. The internal power supply voltage generating device may include a start-up voltage generating part, a reference voltage generating part, and/or an internal power supply voltage generating part. The start-up voltage generating part may be configured to generate a start-up voltage using an external power supply voltage. The reference voltage generating part may be configured to generate a reference voltage using the start-up voltage. The internal power supply voltage generating part may be configured to generate an internal power supply voltage using the reference voltage and the external power supply voltage. The start-up voltage generating part may be turned off by the reference voltage generated by the reference voltage generating part. Example embodiments also relate to a method of generating an internal power supply voltage.Type: ApplicationFiled: October 19, 2007Publication date: August 7, 2008Inventors: Jong-Pil Cho, Chan-Yong Kim
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Patent number: 7352210Abstract: An apparatus and method for regulating voltage levels. The apparatus includes a first transistor and a second transistor. The first transistor and the second transistor are each coupled to a first current source and a second current source. Additionally, the apparatus includes a third transistor coupled to the second transistor and configured to receive a first voltage from the second transistor, and a fourth transistor configured to receive the first voltage from the second transistor and generate an output voltage. Moreover, the apparatus includes an adaptive system coupled to the fourth transistor. Also, the apparatus includes a delay system coupled to the third transistor and configured to receive a sensing current from the third transistor and generate a delayed current associated with a predetermined time delay. Additionally, the apparatus includes a current generation system.Type: GrantFiled: December 5, 2006Date of Patent: April 1, 2008Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventor: Wenzhe Luo
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Publication number: 20080062087Abstract: In a plasma display and a voltage generator thereof, a first electrode of a transistor is coupled to a scan electrode. In addition, a cathode of a Zener diode is coupled to a second electrode of the transistor, and an anode of the Zener diode is coupled to a power source generating a scan voltage. A first resistor is coupled between the first electrode of the transistor and a control electrode of the transistor, and a second resistor is coupled between the control electrode of the transistor and the anode of the Zener diode. A final voltage during a reset period is generated by the power source generating the scan voltage.Type: ApplicationFiled: September 10, 2007Publication date: March 13, 2008Inventors: Jeong-Hoon Kim, Jung-Pil Park, Suk-Ki Kim, Jung-Soo An
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Publication number: 20080036441Abstract: An exemplary voltage regulating circuit (20) includes a voltage modulating unit (22, 24) and a voltage-dividing unit (26). The voltage-dividing unit includes a voltage divider (27) and at least one voltage stabilizing circuit (28) electrically coupled to the voltage divider. The voltage modulating unit transforms an input voltage to an operation voltage. The voltage divider divides the operation voltage into a plurality of sub-voltages, the at least one voltage stabilizing circuit stabilizes a corresponding one of the sub-voltages at a desired value, and the at least one voltage stabilizing circuit outputs the stabilized voltage.Type: ApplicationFiled: August 13, 2007Publication date: February 14, 2008Inventor: Huai Du
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Publication number: 20080007242Abstract: A regulator for generating, from a first power supply voltage exceeding the breakdown voltage of a low voltage transistor block, a second power supply voltage lower than or equal to the breakdown voltage of the low voltage transistor block, includes an operational amplifier including low voltage transistors and high voltage transistors. An operational amplifier including only low voltage transistors can be employed.Type: ApplicationFiled: June 4, 2007Publication date: January 10, 2008Inventors: Tomokazu Kojima, Takahito Kushima
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Patent number: 7259614Abstract: An auto voltage sense circuit uses voltage controlled current sources to generate a desired reference voltage level that closely tracks the variations and changes of a first voltage level and a second voltage level. The auto voltage sensing circuit includes a first voltage controlled current source operable to receive the first voltage level to generate a reference current that is proportional to the first voltage level. The auto voltage sensing circuit also includes a second voltage controlled current source operable to receive the second voltage level and the reference voltage to generate an output current that is proportional to the difference between the second voltage level and the reference voltage. The reference voltage causes the output current to be approximately equal to the reference current so as to generate a reference voltage that is proportional to the difference between the second voltage level and the first voltage level.Type: GrantFiled: July 22, 2005Date of Patent: August 21, 2007Assignee: Integrated Device Technology, Inc.Inventors: William G. Baker, Timothy Gillespie
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Patent number: 7190189Abstract: An apparatus and method for regulating voltage levels. The apparatus includes a first transistor and a second transistor. The first transistor and the second transistor are each coupled to a first current source and a second current source. Additionally, the apparatus includes a third transistor coupled to the second transistor and configured to receive a first voltage from the second transistor, and a fourth transistor configured to receive the first voltage from the second transistor and generate an output voltage. Moreover, the apparatus includes an adaptive system coupled to the fourth transistor. Also, the apparatus includes a delay system coupled to the third transistor and configured to receive a sensing current from the third transistor and generate a delayed current associated with a predetermined time delay. Additionally, the apparatus includes a current generation system.Type: GrantFiled: February 17, 2005Date of Patent: March 13, 2007Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventor: Wenzhe Luo
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Patent number: 6919811Abstract: A detection circuit is configured to detect the presence of a power source by comparing two input voltages (VIN1, VIN2). An example detection circuit is arranged, such that the first input voltage (VIN1) may operate above the process limit for transistor breakdown, while the second input voltage (VIN2) should be maintained below the transistor breakdown voltage. The detection circuit includes a built-in offset voltage (VOS) for hysteresis such that the detection signal is activated when VIN1>VIN2+VOS. The detection circuit is useful for providing an enable signal in a battery charger application. It is envisioned that the detection circuit is also useful in other applications where detection of a power source is required, and where detection of one voltage relative to another may be desired.Type: GrantFiled: May 30, 2003Date of Patent: July 19, 2005Assignee: National Semiconductor CorporationInventors: Vladislav Potanin, Elena Potanina
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Patent number: 6538495Abstract: A pair of complementary current sources includes a reference current source, and two complementary current mirrors having the same number of branches provided with bipolar mirror transistors. The bases of the mirror transistors of the complementary mirrors are connected to a common node. One of the complementary mirrors is connected to the reference source. An intermediate current mirror includes a first slave branch connected to the other complementary current mirror, a second slave branch connected to the reference source, and a master branch connected to the output of a trimming circuit for trimming the complementary currents for substantially equalizing the base currents of the mirror transistors of the complementary current mirrors. The input of the trimming circuit is connected to the common node.Type: GrantFiled: December 6, 2001Date of Patent: March 25, 2003Assignee: STMicroelectronics S.A.Inventors: Frédéric Goutti, Jérôme Bourgoin
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Patent number: 6411154Abstract: A bias circuit (200, FIG. 2) includes a first bipolar junction transistor (BJT) (240), which provides, to an external transistor (204), a biasing voltage (294) equal to the first BJT's base-emitter junction voltage plus a biasing voltage at the first BJT's base (244). A current multiplying mirror circuit (250) senses a fraction of the first BJT's collector current, and produces a current equal to the collector current. This mirror current flows through a second BJT (230). A voltage at the collector (232) of the second BJT is divided, producing the biasing voltage at the base (244) of the first BJT. This biasing voltage has a temperature coefficient with an opposite sign and a same magnitude as a temperature coefficient of the first BJT's base-emitter junction voltage, resulting in a near zero temperature coefficient for the biasing voltage (294).Type: GrantFiled: February 20, 2001Date of Patent: June 25, 2002Assignee: Semiconductor Components Industries LLCInventor: Frantisek Mikulenka
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Publication number: 20020050811Abstract: The invention relates to a circuit generating a voltage signal which is independent of temperature and has low sensitivity to variations in process parameters, comprising at least an output MOS transistor through which an output current flows, it being connected to a first voltage reference and having a gate terminal connected to a bias network, in turn connected between a second voltage reference and the first voltage reference. The circuit of this invention includes a bias network comprising at least first and second MOS transistors connected in a diode configuration, connected in series between said first and second voltage references, and connected to the second voltage reference through a current generator element having a thermal gradient that approximates the thermal gradient of a MOS transistor.Type: ApplicationFiled: August 1, 2001Publication date: May 2, 2002Applicant: STMicroelectronics S.r.l.Inventor: Claudio Serratoni
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Patent number: 6320361Abstract: An output buffer device having first and second supply voltage references, the first voltage reference being lower in value than the second voltage reference. The output buffer device includes first and second complementary MOS transistors, which transistors are connected in series together between one of the supply voltage references and a further voltage reference, have gate terminals connected together and to an input terminal of this buffer device, and have drain terminals connected together and to an output terminal of the buffer device. Advantageously, the first transistor is connected to the first supply voltage reference. Furthermore, the output buffer device comprises at least one additional drive MOS transistor of the same type as the first MOS transistor and placed between the second supply voltage reference and the output terminal of the buffer device.Type: GrantFiled: December 13, 2000Date of Patent: November 20, 2001Assignee: STMicroelectronics S.R.LInventors: Vincenzo Dima, Lorenzo Bedarida, Antonino Geraci, Simone Bartoli
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Patent number: 6236195Abstract: The invention relates to a circuit for correcting variation in voltage. A voltage variation correction in this invention has an output terminal for outputting a given voltage, a transistor connected between a power supply voltage and the output terminal, a capacitor connected between a control electrode of the transistor and the output terminal and a resistor connected between the control electrode of the transistor and the power supply voltage.Type: GrantFiled: February 18, 2000Date of Patent: May 22, 2001Assignee: Oki Electric Industry Co., Ltd.Inventor: Shigeru Nagatomo
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Patent number: 6191967Abstract: A device selectively supplying a high voltage and a ground level voltage to electrodes of an electroluminescent display panel. The voltage supply device includes a first and a second transistor connected in series, and outputs the high voltage upon turning on the first switching transistor and the ground level voltage upon turning on the second switching transistor. The device includes a circuit for selecting either an operation mode under which the device is normally operated with the high voltage or a test mode under which the device is tested under a low test voltage. The mode selection is performed by an external signal supplied to the device. Under the test mode, the switching transistors are turned on with a low gate voltage by operation of a circuit built in the device. Accordingly, the voltage supply device normally operated under the high voltage is easily tested under the low test voltage.Type: GrantFiled: May 19, 1999Date of Patent: February 20, 2001Assignee: Denso CorporationInventors: Osamu Katayama, Takahiro Iwamura, Tetsuo Hirano
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Patent number: 6051965Abstract: A two-terminal paired circuit is disclosed which comprises two sets of differential pairs wherein a first set of the differential pair includes two transistors collectors of which are connected to a pair of input terminals and to a bias circuit serving also as a DC shift, bases of which are connected to the bias circuit to apply a voltage feedback from the collectors to the bases and emitters of which are connected to a constant current source and have an impedance element connected therebetween, a second set of the differential pair includes two transistors collectors of which are connected to a pair of output terminals and to a bias circuit serving also as a DC shift, bases of which are connected to the bias circuit to apply a voltage feedback from the collectors to the bases and emitters of which are connected to a constant current source and have an impedance element connected therebetween, and the voltage feedbacks together with the two sets of differential pairs are applied symmetrical with respect to lType: GrantFiled: October 13, 1998Date of Patent: April 18, 2000Assignee: Sony CorporationInventors: Atsushi Hirabayashi, Kosuke Fujita, Kenji Komori, Norihiro Murayama
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Patent number: 5856742Abstract: A circuit for generating a bandgap voltage that is insensitive to temperature. The circuit includes an amplifier with a feedback loop having a high impedance output current mirror controlled by transistors connected to an output from the amplifier. The current mirror provides proportional currents to a pair of resistors that are connected to inputs to the amplifier, a first input receiving a temperature sensitive voltage from a first of the resistors, and a second input receiving a voltage that is a combination of a temperature sensitive voltage across a second of the resistors and a temperature sensitive offsetting voltage. The second resistor may be tapped to provide a selectable bandgap voltage. A reference voltage for operating the generator may be obtained from a voltage division of supply voltage by two resistors of the same type.Type: GrantFiled: June 12, 1997Date of Patent: January 5, 1999Assignee: Harris CorporationInventors: Salomon Vulih, Stanley Frank Wietecha, John A. Olmstead, Thomas D. Housten
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Patent number: 5828182Abstract: The present invention is directed to a power supply circuit for controlling a load which, for example, includes both a gas-discharge lamp and an auxiliary load. The power supply circuit includes a ballast circuit for limiting current supplied to the gas discharge lamp. The auxiliary load, such as an occupancy sensor, is connected to receive an alternating current signal from a transformer winding, inductor coil, or other suitable portion of the ballast circuit. The power supply circuit includes a rectifier for rectifying the alternating current signal to provide a stable, low-voltage direct current signal to drive the auxiliary load.Type: GrantFiled: April 23, 1996Date of Patent: October 27, 1998Assignee: Electronic Lighting IncorporatedInventors: John R. Shannon, Jeffrey Michael Dixon, Hubertus Notohamiprodjo
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Patent number: 5821741Abstract: A temperature set point circuit employs a pair of bipolar transistors operated at unequal current densities, with the difference between the transistors' base-emitter voltages appearing across a trim resistor connecting their emitters. A pair of trim resistors, one of which may be external to an integrated circuit embodiment of the set point circuit, forms a resistor divider with the inter-base resistor and are selected to produce a desired temperature trip-point.Type: GrantFiled: February 7, 1997Date of Patent: October 13, 1998Assignee: Analog Devices, Inc.Inventor: A. Paul Brokaw
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Patent number: 5814980Abstract: A voltage regulating system and method are disclosed for use in an integrated circuit. The voltage regulating system can operate with a supply voltage ranging from 2.9 to 5.5 volts. The voltage regulating system includes a differential amplifier which is connected in series to a linear amplifier. The circuit contains level shifters so that the voltage regulator can operate with very low supply voltages.Type: GrantFiled: September 3, 1996Date of Patent: September 29, 1998Assignee: International Business Machines CorporationInventor: Scott C. Lewis
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Patent number: 5781002Abstract: Efficient very low dropout (i.e., approximately equal to about V.sub.CESAT of the output transistor) dual supply voltage regulator circuits and methods are provided. The voltage regulators are capable of providing very low dropout irrespective of supply sequencing. Traditional supply sequencing problems are overcome by including an anti-latch circuit that monitors the output power supply during power-on. The anti-latch circuit is also coupled to any location in the regulator circuit where the drive current can be inhibited whenever the output power monitor senses that the output power supply is not fully operational. The anti-latch circuit operates to prevent drive current from being supplied to the output transistor unless output power is available so that the substrate of the regulator is not permitted to become forward biased (and thus prevents the establishment of an undesired latch condition).Type: GrantFiled: August 7, 1997Date of Patent: July 14, 1998Assignee: Linear Technology CorporationInventor: Dennis P. O'Neill
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Patent number: 5745563Abstract: A subscriber line circuit for a telephone network having current controlled switches and current sources. Methods of making and using the components are also disclosed.Type: GrantFiled: February 25, 1992Date of Patent: April 28, 1998Assignee: Harris CorporationInventor: John S. Prentice
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Patent number: 5616971Abstract: A power switching circuit includes a power switching NPN transistor (1) having its collector electrode coupled to a reference potential terminal (17) and its emitter electrode coupled to an output terminal (7). A driver circuit (5) is provided having an input coupled to a supply terminal (6) and a driving current output coupled to the base electrode of the power transistor (1). A PNP transistor(4) has its emitter electrode coupled to the output terminal(7), its base electrode coupled to a reference voltage terminal (9) for receiving, in operation, a voltage which is positive relative to the reference potential and its collector electrode coupled to the base electrode of an NPN transistor (2). The NPN transistor (2) has its collector electrode coupled to the collector electrode of the power transistor (1) and its emitter electrode coupled to the base electrode of the power transistor (1).Type: GrantFiled: October 6, 1995Date of Patent: April 1, 1997Assignee: Motorola, Inc.Inventor: Petr Kadanka
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Patent number: 5493155Abstract: This electric power supply system includes an air conditioner serving as load, a solar photovoltaic cell for supplying power to the air conditioner, and a system power control circuit and further including a commercial power source for use in combination with the solar photovoltaic cell for supplying additional power when insufficient, power is supplied from the solar photovoltaic cell to the air conditioner. In an operation state of the air conditioner, the system power control circuit operates to regulate an operating point of the solar photovoltaic cell and variably regulate the supplied power from the solar photovoltaic cell while comparing required power of the air conditioner with the supplied power from the solar photovoltaic cell.Type: GrantFiled: November 28, 1994Date of Patent: February 20, 1996Assignees: Sharp Kabushiki Kaisha, The Kansai Electric Power Co., Inc.Inventors: Mitsuo Okamoto, Hirokazu Kodama, Tsukasa Takebayashi, Kouji Minamino, Yoshikazu Tsuyuguchi, Shigeru Ohmori
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Patent number: 5399914Abstract: A current source circuit includes at least three pairs of bipolar transistors of the same polarity type. The first transistors of each pair are connected in one series circuit string emitter to collector. The second transistors of each pair are connected in another circuit string. The first-pair second transistor is connected emitter to collector with the second-pair second transistor while the emitter of the second-pair second transistor is connected to the base of the third-pair second transistor which serves as the output transistor. The first transistors of the first and third pairs have their bases connected respectively with their collector. The bases of the two second-pair transistors are cross coupled with the collectors of the second-pair transistors.Type: GrantFiled: October 18, 1993Date of Patent: March 21, 1995Assignee: Allegro Microsystems, Inc.Inventor: Richard Brewster
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Patent number: 5392205Abstract: A regulated charge pump (43) includes a charge pump core (114) having a charging capacitor (80). An output voltage on a first terminal (72) of the charging capacitor (80) is transferred to a holding capacitor (81). A second terminal (73) of the charging capacitor (80) is alternatively connected to positive and negative power supply voltage terminals in response to non-overlapping clock signals. The first terminal (72) of the charging capacitor (80) is connected through first (150) and second (151) transistors to the positive power supply voltage terminal. A proportional portion (112) provides a coarse regulation by biasing the first transistor (150) proportional to a comparison between a predetermined fraction of an output voltage and a reference voltage. An integrating portion (113) provides a precise regulation by biasing the second transistor (151) proportional to an integrated difference between the output voltage and a reference voltage.Type: GrantFiled: November 7, 1991Date of Patent: February 21, 1995Assignee: Motorola, Inc.Inventor: Mauricio A. Zavaleta
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Patent number: 5305259Abstract: A power source voltage tracking circuit, for providing a given voltage which is lower than power source voltage, containing a first node for applying a power source voltage, a second node and an output line, a load connected between the first node and the output line to precharge the output line with the given voltage, elements connected between said first node and said second node to charge the second node, and elements to discharges the output line charged with the given voltage in response to the charging voltage of the second node.Type: GrantFiled: May 31, 1989Date of Patent: April 19, 1994Assignee: SamSung Electronics Co. Ltd.Inventor: Byung-Yoon Kim
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Patent number: 5296800Abstract: The invention relates to a regulated DC power supply circuit comprising a full wave rectification stage for rectifying an AC input and a regulating stage for regulating an output voltage from the rectification stage. The regulating stage has a primary voltage regulating circuit and a secondary voltage regulating circuit. The primary voltage regulating circuit includes a series pass element, such as a MOSFET device, connected to operate continuously in source-follower mode. A primary voltage reference element, such as a zener diode, provides a gate reference for the series pass element. The secondary voltage regulating circuit is cascaded to the primary voltage regulating circuit in a voltage sharing configuration. The power supply circuit is therefore capable of handling input voltages over 1 kV, which exceed the maximum voltage rating of the MOSFET device. The invention extends to a DC voltage regulator, which includes the regulating stage without the rectification stage.Type: GrantFiled: January 30, 1992Date of Patent: March 22, 1994Assignee: Circuit Breaker Industries LimitedInventors: Ivan N. Bjorkman, Klaus J. R. Nusse
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Patent number: 5235520Abstract: Disclosed is an integrated circuit which comprises: a constant voltage circuit including a reference voltage generator, a feedback amplifier, a differential amplifier having an input for receiving an output signal of the reference voltage generator as a reference signal and another input for receiving an output of the feedback amplifier as a negative feedback signal, and a monochannel output driver driven in accordance with an output of the differential amplifier; a circuit load connected to an output of the constant voltage circuit; and an MOS transistor connected in parallel to the circuit load and arranged so as to be driven when a heavy load is periodically driven.Type: GrantFiled: October 11, 1990Date of Patent: August 10, 1993Assignee: Seiko Epson CorporationInventor: Hideaki Yokouchi
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Patent number: 5028822Abstract: A circuit arrangement for processing sampled analogue electrical signals comprises means for combining (9) in predetermined proportions on input sample current in the present sample period with current(s) derived from input sample current(s) in one or more preceding sample periods and means for deriving the processed output signal as or from the combined current produced by the combining means in successive sample periods. The circuit arrangement further comprises means for scaling a current which comprises a first branch (T1) for receiving a current to be scaled, second and third branches (T2,T3) for producing first and second sub-output currents which are proportional to the received current, means for forming the difference (2) between the first and second sub-output currents, and means for feeding the difference current to the output (3) of the current scaling means.Type: GrantFiled: November 22, 1989Date of Patent: July 2, 1991Assignee: U.S. Philips CorporationInventor: John B. Hughes
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Patent number: 5023476Abstract: An integrated semiconductor device is disclosed which has a highly-integrated circuit formed on a substrate. A constant voltage generator is connected to the integrated circuit, for receiving an externally-supplied d.c. power supply voltage to produce a regulated d.c. voltage, the potential level of which is lower than the external power supply voltage and remains substantially constant irrespective of the external power supply voltage. A mode-change controller is connected in parallel with the voltage generator, for supplying the output d.c. voltage of the voltage generator to the integrated circuit as an internal power supply voltage in a normal operation mode. When the device is subjected to an accelerated test using an increased power supply voltage, a switching transistor is rendered conductive under the control of a control circuit, thereby allowing the external power supply voltage to be directly applied to the integrated circuit.Type: GrantFiled: January 23, 1989Date of Patent: June 11, 1991Assignee: Kabushiki Kaisha ToshibaInventors: Yohji Watanabe, Tohru Furuyama
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Patent number: 5021729Abstract: A differential, voltage-controlled current source, employing operational amplifiers as the active elements, provides an essentially symmetrical, differential, high impedance drive to a load, the drive being isolated from any circuit common or system ground. Because of the "floating" differential drive and the identical source impedances of the two outputs, errors from common mode voltages are eliminated.Type: GrantFiled: October 6, 1989Date of Patent: June 4, 1991Assignee: The United States of America as represented by the Administrator of the Administration National Aeronautics and SpaceInventor: John F. Sutton
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Patent number: 5012133Abstract: A circuit for processing sampled analog current signals, includes means for combining, in predetermined proportions, the input sample current in a present sample period with current(s) derived from input sample current(s) in one or more preceding sample periods, and apparatus for deriving the processed output signal from the combined current produced by the combining means in successive sample periods. The circuit consists of a plurality of circuit modules, for example, scaling, memory, and integrator modules, each of which may be capable only of processing unidirectional currents. In order to provide easy interconnection of the modules, each module is arranged to receive and deliver bidirectional currents and to generate internally bias currents to enable conversion from bidirectional to unidirectional currents and vice versa.Type: GrantFiled: February 13, 1990Date of Patent: April 30, 1991Assignee: U.S. Philips CorporationInventor: John B. Hughes
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Patent number: 4982306Abstract: In a method and device for limiting the starting current of a DC converter, at least one buffer capacitor is initially charged through a load resistor. The current going through the load resistor is measured with a monitor. The monitor switches on a DC converter and bridges the load resistor once a switching threshold is reached. A predetermined minimum current is used as the switching threshold.Type: GrantFiled: September 20, 1988Date of Patent: January 1, 1991Assignee: Siemens AktiengesellschaftInventors: Adam-Istvan Koroncai, Alexander Lechner
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Patent number: 4963873Abstract: A digital/analog converter designed for very high frequencies is described. It has a first stage, which is a standard stage, in which several parallel-mounted controllable loads deliver currents in geometrical progression in a current/voltage converting transistor. Each controllable load has an input transistor, to the gate of which a bit is addressed as well as a diode and a saturable resistor. The second stage is a shifter formed by a transistor mounted as a follower source, in series with at least one diode and one pull-back transistor, the source of which is at a negative potential. The voltage at the drain of the converting transistor is applied to the gate of the shifter transistor, and the output voltage at the drain of the pull-back transistor is looped to the gate of the converting transistor.Type: GrantFiled: November 17, 1988Date of Patent: October 16, 1990Assignee: Thomson Hybrides et MicroondesInventor: Pham N. Tung
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Patent number: 4914321Abstract: A BIMOS lever convertor (10) comprises a differential circuit having a common biasing network (14). A MOS transistor (16) in one portion of the differential circuit receives a MOS level input signal (32) and provides an ECL level output signal (34). The other portion of the differential circuit includes a bipolar transistor (18) that is biased by the MOS transistor (16). The bipolar transistor (18) operates to provide a complementary ECL level output signal (34') so as to provide a single ended MOS to differential ECL interface suitable for integration in an I.C.Type: GrantFiled: April 10, 1989Date of Patent: April 3, 1990Assignee: Motorola, Inc.Inventor: Darrell E. Davis
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Patent number: 4888738Abstract: A control circuit for erasing EEPROM memory cells is disclosed, including a charge pump having two switched constant current sources driven by opposing clocks. Current produced by the current sources is coupled to a node from where it is used to erase EEPROM memory cells. A switch is provided to isolate the device being erased by floating its source.Type: GrantFiled: June 29, 1988Date of Patent: December 19, 1989Assignee: Seeq TechnologyInventors: Ting-Wah Wong, Raul-Adrian Cernea
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Patent number: 4868416Abstract: The present invention includes circuitry wherein a pair of voltage supply terminals are included, with a first current source connected to one voltage supply terminal and a second current source connected to the other voltage supply terminal. A load connects the first and second currect sources. A field effect transistor has a first current handling terminal connected between the first current source and load, a second current handling terminal connected to the other voltage supply terminal, and a current control terminal connected between the load and the second current source. The second current source is of the type wherein the current thereacross is substantially independent of changes in voltage thereacross.Type: GrantFiled: December 15, 1987Date of Patent: September 19, 1989Assignee: Gazelle Microcircuits, Inc.Inventors: Mark E. Fitzpatrick, Gary R. Gouldsberry