Abstract: This document discusses, among other things, apparatus and methods for providing over-voltage transient protection of a voltage regulator. In an example, an apparatus can include a first transistor including a control node and first and second switch nodes, and a low-pass filter configured to couple to the control node of the first transistor and to switch the first transistor to a first state when a voltage change of the supply voltage exceeds a threshold. The first transistor, in the first state, can be configured to couple a control node of a second transistor to the supply voltage to protect components coupled to a regulator transistor.

Abstract: Provided is a single inductor multiple output (SIMO) direct current-to-direct current (DC/DC) converter that may perform DC/DC conversion by transferring, to output nodes, input current that is input and thereby stored in a single inductor. An output selection unit of the SIMO DC/DC converter may select, from output nodes, a first output node to be supplied with current from a driving unit, and provide output voltage of the first output node and reference voltage of the first output node to a hysteresis comparison unit. The hysteresis comparison unit may control on-time and/or inductor peak current by determining whether the output voltage of the first output node is higher than the reference voltage of the first output node by at least a first threshold, and whether the output voltage of the first output voltage is lower than the reference voltage of the first output voltage by at least a second threshold.

Abstract: A DC-to-DC converter includes first and second transistors that are connected in series between a supply voltage and ground and that are driven by PWM pulses. A junction of the transistors is connected to an inductance that is connected in series to a load. A first timing module determines a first time difference between a first edge of a first signal at the junction and a first edge of a second signal at a control terminal of the first transistor. A second timing module determines a second time difference between a second edge of the first signal and a second edge of the second signal. The first and second edges of the second signal respectively correspond to first and second edges of one of the PWM pulses. A delay module delays the first and second edges of the second signal respectively based on the first and second time differences.

Abstract: This disclosure describes a time varying power supply that may include a resonator circuit comprising an inductor having first and second terminals, a first capacitor coupled to the first terminal, and a second capacitor coupled to the second terminal, where the first capacitor produces a first time varying power supply output and wherein the second capacitor produces a second time varying power supply output. The time varying power supply may further include an exciter circuit comprising a first PFET and a first NFET coupled to the first terminal and a second PFET and a second NFET coupled to the second terminal. The first and second PFETs and the first and second NFETs may be coupled to a corresponding one of four non-overlapping clock phases.

Abstract: According to one embodiment, a switch includes a first element with a first withstand voltage, a second element whose withstand voltage is lower than the first withstand voltage, a diode which is connected between a positive electrode of the first element and a positive electrode of the second element in such a manner that a direction from the positive electrode of the second element toward the positive electrode of the first element is a forward direction and whose withstand voltage is equal to the first withstand voltage, a negative electrode of the first element and a negative electrode of the second element being connected, and a circuit configured to apply a positive voltage to the positive terminal output a pulse lower than the first withstand voltage when the first element goes off.

Abstract: A voltage generation circuit according to one embodiment includes a first booster circuit configured to generate a first voltage having a first voltage value, and a second booster circuit group including a plurality of second booster circuits, each second booster circuit configured to generate a second voltage having a second voltage value. The second booster circuits switch to be connected in series and are configured to be capable of generating the first voltage together with the first booster circuit in a change from a first state to a second state.

Abstract: The disclosed invention provides a controller that can prevent overshoot and undershoot from occurring when a voltage is switched to another voltage without using two types of regulators. Voltage regulators supply a power supply voltage to a CPU. An SVID interface receives a command to change the number of voltage regulators to be actuated among the voltage regulators from outside. A phase clock generating circuit makes a stepwise change of the number of voltage regulators to be actuated from the current number of regulators to the commanded number of regulators after change.

Abstract: This disclosure describes an invention that is a basic charge recycling gate 70 that includes a precharge node 75, a output charging network 78, an output pre-charge and null propagate network 77, an evaluation network 76, a first time varying power supply TVS0, a second time varying power supply TVS2, and a keeper circuit 79. Additionally, this disclosure describes an invention that is a time varying power supply 130 that includes a resonator circuit 131, an amplitude and power check circuit 135, one or more overshoot and an undershoot voltage clamps 1105 and 112, exciter circuits 137 and 136, and current monitor circuits 138 and 139. In addition, the invention includes frequency self tuning with the amplitude and power check circuit 135, capacitor banks 132 and 134, and the inductor tap select controller 133. Amplitude self tuning is provided by the amplitude sample and compare circuit 144. Further, a phase shift control circuitry 150 is also provided.

Abstract: The present invention relates to a switch controller, a switch control method, and a power supply including the switch controller. An exemplary embodiment of the present invention detects an on-time of a power switch of the power supply and decreases a frequency of a clock signal according to a period during which the detected on-time is shorter than or equal to the minimum on-time. According to the exemplary embodiment, switching of the power switch is controlled according to a clock signal, and the minimum on-time is an on period of the power switch that cannot be shortened.

Abstract: In accordance with an embodiment of the present invention, a bandgap voltage reference circuit includes a group of X current sources, a plurality of circuit branches, and a plurality of switches. Each of the X current sources (where X?3) produces a corresponding current that is substantially equal to the currents produced by the other current sources within the group. The plurality of circuit branches of the bandgap voltage reference circuit are collectively used to produce a bandgap voltage output (VGO). Each of the plurality of circuit branches receives at least one of the currents not received by the other circuit branches. The plurality of switches (e.g., controlled by a controller) selectively change over time which of the currents produced by the current sources are received by which of the plurality of circuit branches of the bandgap voltage reference circuit.

Abstract: A bootstrap circuit includes: a first switch element, coupled a clock signal; a second switch element, coupled to an operating voltage and the first switch element; a third switch element, coupled to the first switch element; a first charge storage unit, coupled to the second and third switch elements; and a voltage converting unit, coupled to the first charge storage unit as well as the first, second and third switch elements. When the clock signal is at a first logic state, the first charge storage unit is charged. When the clock signal is at a second logic state, a cross voltage of the first charge storage ensures that the voltage converting unit converts an input voltage to an output voltage.

Abstract: A power supply circuit for a remote load and a local controller includes a line connection receiving electrical power from an AC source. A load connection connects to the remote load. A switch is located between the line and load connections. Power is supplied to the load from the AC source through the switch. The switch is selectively opened and closed by the controller. A low voltage supply portion supplies power from the AC source to the controller. The low voltage supply portion includes an energy storage device for storing electrical energy for the controller. A current-limited earth ground portion conducts charging current from the energy storage device to earth and prevents charging current conducted to earth from exceeding a predetermined current level. An earth ground bypass portion conducts at least some of the charging current to the load when the switch located between the line and load is open.

Abstract: In order to reduce parasitic inductance of a main circuit in a power supply circuit, a non-insulated DC-DC converter is provided having a circuit in which a power MOS·FET for a high-side switch and a power MOS·FET for a low-side switch are connected in series. In the non-insulated DC-DC converter, the power MOS·FET for the high-side switch is formed by a p channel vertical MOS·FET, and the power MOS·FET for the low-side switch is formed by an n channel vertical MOS·FET. Thus, a semiconductor chip formed with the power MOS·FET for the high-side switch and a semiconductor chip formed with the power MOS·FET for the low-side switch are mounted over the same die pad and electrically connected to each other through the die pad.

Abstract: A power supply system includes an output node, an internal power supply unit, a boost storage unit, a charging path unit, and a discharging path unit. The output node is coupled to a load device. The internal power supply unit includes a gold capacitor unit for storing an internal storage voltage. The charging path unit is turned on in a charging period to store a boost supply voltage in the boost storage unit. The discharging path is turned on in a discharging period to provide a power signal for drive the load device according to the internal storage voltage and the boost supply voltage. The charging and discharging periods are non-overlapping.

Abstract: A power supply includes an output terminal, a power converting unit, an internal circuit and an internal power supplying unit. The output terminal outputs a first power. The power converting unit is coupled with the output terminal and receives the first power. The power converting unit converts the first power into a second power. The internal circuit is coupled with the power converting unit and receives the second power. The internal power supplying unit is coupled with the internal circuit.

Abstract: Provided are a coil component capable of contributing to improving productivity of a reactor, and a reactor exhibiting good productivity. A reactor 1A includes one coil 2 formed by spirally winding a wire 2w, and a magnetic core 3, which is disposed inside and outside the coil 2 and which forms a closed magnetic circuit. The magnetic core 3 includes an inner core portion 31 disposed inside the coil 2, and an outer core portion 32 disposed around the coil 2. The coil 2 and the inner core portion 31 constitute a coil component 2A held as an integral unit by a resin molded portion 20. A shape of the coil 2 is maintained by the resin molded portion 20. Since the coil component 2A includes a portion of the magnetic core 3, the number of components can be reduced, and the coil 2 and the inner core portion 31 can be easily placed into a case 4A when they are housed therein. The coil 2 is easier to handle because the coil shape is constantly maintained without expanding or contracting.

Abstract: A driver includes a first driver stage having at least one input node and at least one first output node. The first driver stage includes a T-coil structure that is disposed adjacent to the at least one first output node. The T-coil structure includes a first set of inductors each being operable to provide a first inductance. A second set of inductors are electrically coupled with the first set of inductors in a parallel fashion. The second set of inductors each are operable to provide a second inductance. A second driver stage is electrically coupled with the first driver stage.

Abstract: A control circuit includes: a first switching device that includes a source, a gate, and a drain; a negative voltage generating circuit that generates, from a pulse width modulation signal that controls the gate of the first switching device, a negative potential voltage which is equal to or smaller than a threshold of the first switching device; a gate control circuit that outputs a signal obtained by shifting a level of the pulse width modulation signal by an amount equal to the negative potential voltage to the gate of the first switching device; a second switching device that is disposed on a side of the drain of the first switching device; and a negative voltage detecting circuit that outputs a signal for turning ON the second switching device upon detecting that the negative potential voltage generated by the negative voltage generating circuit has reached a predetermined negative potential.

Abstract: A power control apparatus and an image forming apparatus including the same are disclosed. The power control apparatus can directly enable or disable a DC/DC converter for converting reference DC power to a secondary DC power without an additional microcomputer based power circuit by connecting an enable or disable operation of the DC/DC converter with an operation of a power button by a user. Accordingly, the number of components of a power control circuit can be reduced to decrease material cost and simplify the power control circuit. Furthermore, the power control apparatus and the image forming apparatus including the same can reduce unnecessary power consumption in a system off state.

Abstract: A power converter system for managing power between a power supply and a load, the system including: a first buck-boost circuit connected to the power supply; and a capacitor provided between the buck-boost circuit and the load to buffer power supply for the load. The system may include a second buck-boost circuit between the capacitor and the load. In another embodiment, a power converter system includes: a boost circuit connected to the power supply; a buck circuit connected to the load; and a capacitor provided between the boost circuit and the buck circuit to manage the supply of power to the load.

Abstract: A reference voltage generation circuit for outputting a reference voltage from an input voltage includes a specific voltage output unit for outputting a specific voltage from the input voltage; a first circuit section for outputting the reference voltage with a positive temperature property from the specific voltage output from the specific voltage output unit; and a second circuit section for setting a level of the reference voltage output from the first circuit section. The specific voltage output unit is formed of a regulator circuit having a first terminal connected to a power source. The first circuit section is formed of a bi-polar transistor element connected to a second terminal of the regulator circuit. The second circuit section is formed of a resistor connected to the second terminal of the regulator circuit, a collector terminal of the bi-polar transistor element, and an emitter terminal of the bi-polar transistor element.

Abstract: The switching power supply device is provided with a high-withstand voltage first transistor, a first electrode of which being connected to a first node; a low-withstand voltage second transistor, a first electrode of which being connected to a second electrode of the first transistor, and a second electrode of which being connected to a second node; and a drive circuit. Each of the first and second transistors has a parasitic diode connected in the forward direction between the second and first electrodes. The drive circuit, in a case where electrical current is to flow from the first node to the second node, turns on the first and second transistors, and, in a case where electrical current is to flow from the second node to the first node, turns on the first transistor, and turns off the second transistor.

Abstract: In one embodiment, a DC converter has a frequency adjusting device with a frequency selection circuit, a frequency change-over switch (17), a frequency generator (18), a threshold signal generator (19), a state machine (20) and a unit (21) for providing a ready signal (S3). The frequency selection circuit has an output (15), at which a control signal (S5) is provided, which is set up to select a frequency of the switching frequency signal (DCLK) of the DC converter. The invention further relates to a method for selecting a frequency of the DC converter.

Abstract: A power converter includes a control circuit provided with a set signal generator, a current command generator, a reset signal generator, a drive signal generator, and a pulse-width limiter. The set signal generator generates a set signal at every predetermined cycle. The current command generator generates a current command based on an output voltage command and an output voltage. The reset signal generator generates a reset signal based on an input current and the generated current command. The drive signal generator generates a drive signal which turns on in synchronisation with the generated set signal to turn on a switching element and which turns off in synchronization with the subsequently generated reset signal to turn off the switching element. The pulse-width limiter limits a pulse-width of the drive signal according to an input voltage and the output voltage, or according to the input voltage and the output voltage command.

Abstract: An equalization circuit, includes a first input terminal, a second input terminal, a first output terminal, a second output terminal, a first regulating circuit, a second regulating circuit, and a bias voltage generating circuit. The bias voltage generating circuit is connected with both the first regulating circuit and the second regulating circuit. The first regulating circuit includes a first field effect transistor (FET), a second FET, a third FET, a fourth FET, a first resistor connected with the first FET, a second resistor connected with the second FET, a third resistor connected with the third FET, a fourth resistor connected with the fourth FET, a fifth resistor connected with the third FET, a sixth resistor connected with the fourth FET, a first capacitor connected with the third FET, and a second capacitor connected with the fourth FET. An equalization system is further provided.

Abstract: A power supply converter (100) comprising a first FET (210) connected to ground (230), the first FET coupled to a second FET (220) tied to an input terminal (240), both FETs conductively attached side-by-side to a first surface of a metal carrier (120) and operating as a converter generating heat; and a packaged load inductor (110) tied to the carrier and an output terminal (241), the inductor package wrapped by a metal sleeve (113) in touch with the opposite surface of the metal carrier, the sleeve operable to spread and radiate the heat generated by the converter.

Abstract: Representative implementations of devices and techniques minimize hot carrier stress in a switched capacitor dc-dc converter. Multi-switch arrangements may be used in conjunction with a timing scheme to stage power switch operation.

Abstract: The short-circuit protection circuit includes a first logic circuit that outputs the first logic signal so as to turn off the fourth MOS transistor in a case where the first gate voltage signal has a value that turns on the first MOS transistor and the switching terminal has a terminal voltage between a predetermined first threshold value and the second potential. The short-circuit protection circuit includes a first detecting circuit that compares a first detected voltage between the second end of the first resistor and the first end of the third MOS transistor with a predetermined first reference voltage and outputs, in a case where the first detected voltage is closer to the second potential than the first reference voltage, a first detection signal indicating that the switching terminal and the second potential are short-circuited.

Abstract: In accordance with the present disclosure, a system and method for an interleaved, multi-stage phase array voltage regulator is described. The interleaved, multi-stage phase array voltage regulator includes a first phase array with a plurality of first power stages and a second phase array with a plurality of second power stages. The interleaved, multi-stage phase array voltage regulator may also include a voltage control loop that at least partially controls a duty cycle of the first phase array and the second phase array. Also, the interleaved, multi-stage phase array voltage regulator may include a current control loop that at least partially controls which of the plurality of first power stages and second power stages are active.

Abstract: In order to offer a power supply circuit that can minimize the drop in efficiency by reducing losses during voltage conversion, in an improved-power factor circuit, a control circuit performs a step-up operation in which a control signal for turning on a first switching element (Tr1) and switching a second switching element (Tr2) is output, and a step-down operation in which a control signal for turning off the second switching element (Tr2) and switching the first switching element (Tr1) is output.

Abstract: A boost device is coupled to a compensation device that is configured to be connected to a power system. The boost device includes multiple portions, each of the multiple portions including at least one electrical element, and a solid-state switching device electrically connected to the at least one electrical element. The solid-state switching device is connected in parallel with the at least one electrical element such that closing the solid-state switching substantially prevents current flow to the at least one electrical element.

Abstract: A semiconductor memory device includes a power supply circuit configured to supply an intermediate voltage between a power supply voltage and a ground voltage to each of a plurality of memory cells. The power supply circuit firsts generates a first intermediate voltage between the power supply voltage and the ground voltage and a second intermediate voltage between the power supply voltage and the ground voltage. In response to a first control signal, the first intermediate voltage is supplied to an output node and the second intermediate voltage stops. A connection control circuit connects the first output node and a second output node when the second intermediate voltage generating circuit stops its operation.

Abstract: In a power conversion apparatus, a main switching element in one main circuit is controlled to repeat an on-off state, and a diode in the other main circuit is used as a freewheeling diode. Multiple snubber circuits each having a resistor, a capacitor, and a second switching element which are serially coupled are coupled in parallel to the main circuit. The second switching elements are turned-on sequentially before the turn-on or turn-off of the main switching element that repeats the on-off state.

Abstract: A voltage regulator for a regulated voltage generator configured to generate an operating voltage and including a variable comparison voltage generator, a comparison voltage, a partition branch including a plurality of active devices of a resistive type to receive the operating voltage and supply an intermediate voltage correlated to the operating voltage, and a comparator, to receive the comparison voltage and the intermediate voltage and supply a regulation signal for the regulated-voltage generator.

Abstract: A microprocessor operated controller device and associated method for modifying an AC input power to provide a reduced power AC output power to a load when coupled to the controller device. The AC output power has a series of cut-out pulses in each half cycle of the AC output power waveform. The device includes a switching system having a plurality of switching elements for positioning the series of cut-out pulses in each half cycle of a waveform of the AC input power to result in said reduced power AC output power and a switch control system for coordinating opening and closing of the plurality of switching elements during positioning of the series of cut-out pulses. The switch control system includes a synchronization system for synchronizing the switching system with timing of each half cycle of the AC input power waveform.

Abstract: A maximum power point tracking circuit for an energy harvester device, the tracking circuit requiring nanoampere current in a standby mode, includes a maximum power point circuits utilizing a predetermined fraction of the open circuit input voltage to determine the maximum power point for energy harvester device. A circuit determines the predetermined fraction of the open circuit voltage of the energy harvester device.

Abstract: A hysteretic converter includes an inductor coupled between a source of voltage and a switch node. A low side switch is coupled between the switch node and a reference voltage. A high side switch is coupled between the switch node and the output of the converter. A driver controls the low side and high side switches, wherein the low side switch is turned on until the input current rises to a predetermined set point, the predetermined setpoint can be adapted to input current from the source of voltage.

Abstract: A voltage generator includes a controllable voltage divider, a pull-up circuit and a first pull-down circuit. The controllable voltage divider is utilized for generating an output voltage at an output node of the controllable voltage divider according to a first reference voltage, a second reference voltage, and a control signal, wherein the second reference voltage is lower than the first reference voltage. The pull-up circuit is coupled to the output node of the controllable voltage divider and the first reference voltage, and is utilized for selectively connecting the first reference voltage to the output node of the controllable voltage divider. The first pull-down circuit is coupled to the output node of the controllable voltage divider and the second reference voltage, and is utilized for selectively connecting the second reference voltage to the output node of the controllable voltage divider.

Abstract: A power loss control method comprises detecting a load condition of the MOS unit, and adjusting driving loss of the MOS unit based on the load condition. The driving loss of the MOS unit is configured to decrease when the MOS unit is at light load condition.

Abstract: A power-up initial circuit includes a power-up control unit, a first switch and a second switch. The power-up control unit is used for receiving a high voltage start-up signal, and generating a first power-up control signal. The first switch has a first terminal for receiving an external voltage, a second terminal for coupling to the power-up control circuit for receiving the first power-up control signal, and a third terminal. The second switch has a first terminal coupled to the third terminal of the first switch, a second terminal for coupling to the power-up control circuit for receiving the first power-up control signal, and a third terminal for coupling to a high voltage generator.

Abstract: A converting circuit for receiving an input voltage and generating an output current, including: a transistor, coupled to a supply voltage at a drain of the transistor, and a source of the transistor is coupled to a first voltage, and a gate of the transistor is coupled to the input voltage and a fixed voltage; and a resistor, coupled to the input voltage and the gate of the transistor, and the output current flows through the resistor, wherein the output current is related to the fixed voltage, the input voltage and the resistor.

Abstract: A standard cell circuit including an input terminal to which input an input signal is input; an output terminal to output an output signal; a first wiring conductor, connected to an external power supply that outputs a first power supply voltage; a second wiring conductor to supply a second power supply voltage that is lower than the first power supply voltage; a standard cell to operate at the second power supply voltage supplied from the second wiring conductor; and a conversion circuit, connected to the first wiring conductor and the second wiring conductor, to convert the first power supply voltage input from the first wiring conductor into the second power supply voltage for output to the second wiring conductor.

Abstract: An integrated circuit device has a primary voltage regulator and an ultra-low power secondary voltage regulator. The ultra-low power secondary voltage regulator supplies voltage to certain circuits used for providing data retention and dynamic operation, e.g., a real time clock and calendar (RTCC) when the integrated circuit device is in a low power sleep mode. The primary voltage regulator provides power to these same certain circuits when the integrated circuit is in an operational mode.

Abstract: A circuit, device, and method for controlling a buck-boost circuit includes a bootstrap capacitor voltage regulator circuit and a comparator circuit. The bootstrap capacitor voltage regulator circuit is electrically coupled to a buck-mode bootstrap capacitor of the buck-boost converter and to a boost-mode bootstrap capacitor of the buck-boost converter. The comparator circuit is configured to control the bootstrap capacitor voltage regulator circuit to maintain a voltage of the bootstrap capacitors above a reference threshold voltage by transferring an amount energy from one of the bootstrap capacitors to the other bootstrap capacitors based on the particular mode of operation of the buck-boost converter.

Abstract: A power converter includes a bypass circuit connected in parallel with a power stage of the power converter. The bypass circuit provides a lower loss current path in parallel with the power stage when an input voltage of the power converter exceeds a predetermined threshold. The power converter may be a boost power converter used in a vehicle to provide power from a main power bus of the vehicle to a subsystem of the vehicle such as an anti-lock brake system.

Abstract: A stepwise voltage ramp generator includes a tank capacitor, a terminal of which is coupled to a reference potential to be charged with a voltage ramp. A transistor couples the tank capacitor to a supply line. A diode-connected transistor, biased with a bias current is coupled to the transistor to form a current mirror. A by-pass switch is electrically coupled in parallel to the diode-connected transistor, and is controlled by a PWM timing signal, the duty-cycle of which determines a mean slope of the generated voltage ramp.

Abstract: A power converter has one set of two semiconductor switches performing switching actions, each of which is formed of an FET and a free wheel diode connected in anti-parallel to the FET, and a smoothing capacitor, and convers power by complementary switching actions of the FETs in the semiconductor switches. The power converter is provided with a current sensor that detects a direction of a current flowing through the semiconductor switches and a gate generation portion that skips ON signals of PWM gate signals of the semiconductor switches when the direction of the current flowing through the semiconductor switches is negative.

Abstract: Embodiments of the present invention, as further described below, provide active termination circuits that can be used with power transmitter circuits. Embodiments reduce power loss due to impedance matching and increase power efficiency in power transmitter circuits. In particular, embodiments provide active termination circuits that can be configured to draw minimal amounts of the output current generated by the power transmitter circuits. At the same time, embodiments achieve optimal impedance matching, thus enabling optimal power transfer to the load. Further, embodiments can be controlled adaptively in real time to reduce parasitic effects on power transfer and to optimize impedance matching. Embodiments can be implemented using various transistor technologies (e.g., MOSFET, BJT, etc.), and can be used with a variety of power transmitter circuits, including, for example, power DACs, analog/digital RF transmitters, and analog/digital PAs.

Abstract: The present invention discloses a switching regulator including: a power stage having an upper gate device and a lower gate device coupled with each other, for converting an input voltage to an output voltage and generating a phase voltage at a node between the upper gate device and the lower gate device; and a control circuit including: a switch operation circuit controlling the power stage, the switch operation circuit generating a test signal turning on the upper gate device for a period of time and then turning it off; and a comparator for generating a ready signal indicating that the input voltage is ready according to comparison between the phase voltage and a reference voltage after the upper gate device is turned off.

Abstract: A method for regulating a buck converter, in which the amount of the output volume is adjusted via a controlled switching, comprising a pulse sequence showing a pulse rate and being pulse width modulated, of a conductivity, which is switched serially and drops over an output voltage, and an arrangement with a control input and with a control output, between which an analog-to-digital converter, a non-linear amplifier, an IIR filter, and a pulse width modulation circuit is switched, allow a quick reaction upon a load transient by which the regulation of the output voltage at a buck converter occurs faster and with less overshooting. This is attained such that the sample rate is adjusted greater than the pulse rate and the pulse values of the pulse sequence are controlled during the cycle duration.