Abstract: In accordance with the teachings of the present invention, a temperature dependent voltage generator circuit is provided for generating an output voltage that changes proportionally with changes in the operating temperature of the temperature dependent voltage generator circuit. The temperature dependent voltage generator circuit includes binary weighted current sources and electronic switches that are selectively closed in order to produce a binary weighted current. The binary weighted current is adjustable such that the output voltage of the temperature dependent voltage generator circuit may be "nulled" or forced to zero at any given operating temperature.

Abstract: A power supply circuit for a non-threshold logic (NTL) circuit including a plurality of NTL gate circuits, includes a monitoring circuit, a reference circuit and a comparing and regulating circuit. The monitoring circuit outputs a monitor voltage substantially proportional with a first factor to a voltage variation between an NTL lower voltage on an NTL higher power supply line and an NTL higher voltage on an NTL higher power supply line. The reference circuit outputs a reference voltage substantially proportional with a second factor to the voltage variation. The comparing and regulating circuit compares the monitor voltage from the monitoring circuit and the reference voltage from the reference circuit, and regulates the NTL lower voltage in accordance with the comparing result such that the NTL lower voltage is equal to a predetermined voltage.

Abstract: A base current compensation circuit (10) generates a current that tracks a gain of a transistor (11). The compensation circuit (10) includes a current mirror formed by a mirror transistor (12) and an output transistor (14). The mirror transistor (12) is connected to the transistor (11) whose gain is tracked. A current source (16) and a feedback transistor (13) causes the mirror transistor (12) to draw a base current from the transistor (11) so that a collector current of the transistor (11) matches a reference current. The output transistor (14) amplifies the base current of the transistor (11) to generate the tracking current in the collector electrode of the output transistor (14).

Abstract: A voltage-to-current converter comprises a first MOS transistor for receiving a voltage signal at a first gate and transferring a current signal between a first drain and a first source, a second MOS transistor for receiving a biasing voltage at a second gate and transferring the current signal between a second drain and a second source, and a biasing circuit for applying the biasing voltage of V.sub.C +V.sub.T +kV.sub.DS to the second gate such that the second transistor provides a substantially constant drain-to-source resistance of 1/.beta.V.sub.C, where V.sub.C is a constant voltage, V.sub.T is a threshold voltage for the second transistor, V.sub.DS is a drain-to-source voltage for the second transistor, k is a constant in the range of 1/3 to 2/3, and .beta. is a gain for the second transistor.

Abstract: A compensation circuit (26, 27, 28, 29) supplies base currents to a plurality of current sources (22, 25) attached to a regulator (50), thereby reducing the load on the regulator and improving overall circuit performance. The compensation circuit measures a single base current, multiplies it by the number of current sources to be supplied, and then provides the multiplied current to a base bus (40) coupled to the bases of the plurality of current sources. The compensation circuit has a very high output impedance with essentially no variation with supply voltage.

Abstract: A constant current circuit of the invention supplies a constant current to a load. The constant current circuit is formed of a current source device for providing an input current having a predetermined value with temperature dependence, a voltage divider device connected to the current source device, and an output transistor device. A reference transistor device or an adjusting transistor device is attached to the current source device. In case the reference transistor device is used, the voltage divider device divides a reference voltage of the reference transistor device to thereby generate a control voltage. In case the adjusting transistor device is used, an adjusting voltage from the voltage divider device is supplied to the adjusting transistor device to generate a control voltage. The output transistor device is connected to the load for controlling an output current supplied to the load in response to the control voltage.

Abstract: A method and circuit for tuning an equivalent resistor in a filter so that the filter is insensitive to temperature changes in which an amplifier output is connected to a common gate of plural MOSFETs for providing equivalent resistances, and in which one input to the amplifier is connected to a reference resistor and the other input to the amplifier is connected to an equivalent resistor that includes one of the plural MOSFETs. An input current to the reference resistor and to the equivalent resistor's MOSFET is inversely proportional to the MOSFET's conduction parameter, k (i.e., .mu.C.sub.ox /2), so that both the inputs to the amplifier vary to change the amplifier output voltage to the common gate. The amplifier output changes render the filter insensitive to temperature changes.

Abstract: A current driver utilizes a variable current source and a pair of comparison stages to provide a pair of output transistors with a low quiescent current and the ability to quickly satisfy the current demands of an inductive load. When the voltage input to the current driver is approximately equal to the voltage across the load, the variable current source is set at a minimum value, thereby providing the output transistors with the low quiescent current. When the input voltage varies from the voltage across the load, the current flowing through the output transistors begins to change so that one of the output transistors has a greater current flow, depending on whether the driver is sourcing current to or sinking current from the load.

Abstract: A current source circuit according to the present invention is provided with an output terminal 100, a bias voltage source 21, N channel MOS transistors 2 and 1 and P channel MOS transistor 3. The source of transistor 2, the drain of transistor 1 and the drain of transistor 3 are connected to a common node, the drain of transistor 2 is connected to output terminal 100 and the gate of transistor 2 is connected to bias voltage source 21. Conductions of transistors 1 and 3 are dynamically controlled in response to an external signal. As a result, it is possible to implement a current source circuit having a small number of devices and enabling an operation at a high speed.

Abstract: A circuit for providing a reference current comprises first and second matched transistors, each of which has a control node and a controllable path and each of which is connected so that a current setting resistor is in the controllable path of the second matched transistor, the current setting resistor having a value, current set in the controllable path of the second matched transistor is related to a difference in voltage characteristics between the first and second matched transistors and to the value of the current setting resistor, and third and fourth matched transistors, each of the third and fourth matched transistors having a controllable path connected respectively to the controllable paths of the first and second matched transistors, and control electrodes of the third and fourth matched transistors connected together; a set of output transistors connected to the circuit to supply the reference current in dependence on a set current; and a fifth transistor having a controllable path between a bia

Abstract: A differential pair arrangement is disclosed which includes between the poles of a DC supply source the series connection of two parallel first branches and a common second branch. Each first branch includes the series connection of a first impedance Q2, Q3, RL/ Q2', Q3', RL', a main path of a transistor Q1/ Q1'and a second impedance RE/RE', the control electrodes of transistors Q1/ Q1' constituting respective input terminals IN1/ IN2 of the arrangement. The second branch includes a first current source (CCS). The arrangement further includes two third branches between the DC supply source poles, each consisting of the series connection of a second current source ICS/ICS', a respective transistor main path and a resistive impedance means R11, S11, R12, S12/ R11', S11', R12', S12'.

Abstract: A constant-current circuit which has four MOS transistors. The first and second MOS transistors are driven at a constant current ratio corresponding to a ratio of gate-width and gate-length ratios of the third and fourth MOS transistors. The third and fourth MOS transistors are configured as a current mirror circuit, and are chosen to have different gate-width and gate-length ratios from one another.

Abstract: A current mirror circuit includes four bipolar junction transistors. One transistor serves as an input device for conducting via its collector a majority of the reference current. Another transistor is connected as a compensation device, with its emitter connected to the base of the input device, its base connected to the collector of the input device for conducting a minority of the reference current, and its collector connected to conduct a portion of the output current. Two transistors are connected in cascode as output devices for conducting a portion of the output current. The first output device emitter and base are connected to the emitter and base, respectively, of the input device.

Abstract: A voltage regulator contains a reference which provides a value for comparison by an error amplifier which generates a control signal in response to the deviation of the output to the reference. As many stages of the circuit as possible are connected to fixed potential points. The fixed potential points are fixed with respect to the regulated output voltage. This provides a voltage regulator which is insensitive to interference signals from the unregulated supply voltage. The interference signals from the supply voltage are further buffered by using relatively small capacitors within the circuit, rather than a large external filter means.

Abstract: A current generator which includes a first bipolar transistor, the base of which is connected to a reference voltage and the emitter to ground through a first resistor. A first current mirror is connected to mirror the emitter current of this first transistor. The mirrored current is augmented by the base current of a second transistor (matched to the first transistor), and by current Vbe/R passed by a second resistor (matched to the first transistor), which is connected between the base and emitter of the second transistor. The current thus augmented drives a second current mirror. The output of the second mirror provides a precise reference current, determined by the reference voltage and the resistor magnitude.

Abstract: A transconductor circuit has first and second half cascode mirror circuits. Each half cascode mirror circuit has a cascode transistor, an active transistor, a base current compensating transistor, and a current source connected at one side to a supply voltage and at another side to the cascode transistor. The cascode and active transistors are connected in series between the current source and a first reference potential node. The base current compensating transistor is connected between the supply voltage and the base of the active transistor, and has its base connected between the current source and the cascode transistor. The bases of the cascode transistors of the first and second half cascode mirror circuits are connected to a second reference potential. First and second output mirror circuits are connected to mirror a current in a respective active transistor of the first and second half cascode mirror circuits.

Abstract: A constant current source that has a band-gap reference voltage source with three transistors, where the third transistor is connected with the input of a current balancing circuit whose output controls current sources for the first and second transistors of the band-gap reference voltage source as well as a current source for generating a constant output current and which can be connected via a resistor both with the operating voltage source and with the reference potential by the use of a switch. This circuit results in a low power consumption because it is switched on by the use of a switch only when required and in the switched-off state draws a minimum amount of leakage current.

Abstract: A voltage divider including a plurality of series connected depletion mode field effect transistors having their gates and sources biased to operate in saturation mode for the operating range of the divider, Preferably, the gates and sources are connected together, A series resistor adjusts the value of the divider element. A parallel resistor defines the output resistance of the divider element. The voltage divider may be used as a biasing network for stacked transistors. A buffer may be provided between the voltage divider and the control terminal of the stacked transistors. The voltage divider may be used to bias follower stages and the input stages of an operational amplifier.

Abstract: An IC type stabilized power source circuit being provided with n pieces of output transistors, each outputting to a common terminal; n pieces of over current detection circuits provided for the n pieces of the respective output transistors and outputting respective detection signals when the output currents flowing through the respective corresponding output transistors exceed predetermined rated current values set for the respective corresponding output transistors. N pieces of control circuits are provided for the n pieces of the over current detection circuits and when receiving the respective corresponding detection signals, each limiting the output currents to the respective corresponding output transistors in relation to the over current detection circuits from which the detection signals are received to respective values equal to or less then the respective predetermined rated current values.

Abstract: A constant-current source that contains two substantial identical field effect transistors as well as a simple resistance network. The actual saturation current of one of the field effect transistors is measured and converted by the resistance network into a control voltage for the other field effect transistor which produces the desired constant current. With such a circuit, production tolerances, especially tolerances for field effect transistor, as well as operation-dependent temperature variations can be compensated for within a wide range.

Abstract: A voltage to current converter which exhibits a well-defined substantially exponential voltage-current characteristic. First and second input bipolar transistors of the voltage to current converter each have an emitter, a base, and a collector. The first and second input bipolar transistors are coupled at their emitters, and may be biased with a pre-determined constant current source, and they accept a selectable differential input voltage at their bases. A reference current source is connected to the collector of the first input bipolar transistor, and all output current source is connected to the collector of the second input bipolar transistor. A feedback element, having a gain, is connected between the coupled emitters and the collector of the first input bipolar transistor. The feedback element senses a voltage at the collector of the first input bipolar transistor and regulates a voltage at the coupled emitters to maintain a constant current through said first input bipolar transistor.

Abstract: The PSRR (power supply rejection ratio) of a current mirror circuit is increased by cascoding the output transistor of the current mirror, and the precision of the circuit is enhanced by employing a frequency compensated gain stage utilizing a field effect transistor to drive a bipolar current output transistor.

Abstract: A bias voltage source (20) produces a variable bias voltage (VBREF) which regulates the bias currents in an array (30) of transistor current switch cells (34,36) in an digital-to-analog converter (DAC). The bias voltage (VBREF) is applied to the bases of the regulating transistors (Q8') in the cells (34,36) to regulate the bias currents in their respective main transistors (Q6',Q7') to values proportional to the main bias current (IBIAS). Each main transistor (Q6,Q6',Q7,Q7') and regulating transistor (Q8,Q8') is provided with a compensating transistor (Q10,Q10')(Q11,-Q11') which sinks the emitter-base current thereof and cancels deviation of the actual current gain from the design current gain. Another compensating transistor (Q9,Q9') is connected to each regulating transistor (Q8,Q8') to cancel the effect of base-emitter voltage variation with temperature.

Abstract: In addition to a Gilbert amplifier 101 which includes transistors 1 to 4, a current mirror circuit 102 is disposed. The internal structure of a current supply block 103 is modified. The current supply block 103 linearly converts an externally supplied control voltage Vcont by linear voltage/current conversion and determines a collector current (of a current amount IB) of a transistor 47. The same amount (=IB) of current as this collector current is developed as a collector current of a transistor 42 of the current mirror circuit 102. A collector of the transistor 42 is connected to a current source 45 of the current supply block 103 and an emitter of the transistor 3. Hence, assuming that a current value of the current source 45 is Io, an emitter current IA flowing through the transistor 3 is determined as IA=Io-IB. As a result, an output current I1 of the transistor 1 which has its base connected to the emitter of the transistor 3 changes in proportion to the control voltage Vcont.

Abstract: A control system (10) is provided which comprises a control circuit (12) and a driver circuit (14). The driver circuit (14) has a current reference circuit (36) which supplies a reference current (34) to an output current mirror circuit (32). The output current mirror circuit creates output currents which are proportional to the reference current (34). The reference current (34) represents a zero temperature coefficient.

Abstract: In order to obtain a constant current circuit which has an excellent constant current property and requires no plural bias circuits, a base of an NPN bipolar transistor (5) and a gate of an N-channel MOS transistor (6) are connected to a first terminal (1) in common. A collector of the transistor (5) is connected to a second terminal (2) and a source of a transistor (6) is connected to a third terminal respectively, while a voltage source (59) is connected between the first and third terminals. An emitter of the transistor (5) is connected with a drain of the transistor (6). Identical bias voltages are supplied to the base and the gate, while a gate-to-drain voltage of the transistor (6) is equal to a base-to-emitter voltage of the transistor (5). Thus, the transistor (6) operates in a pentode region, to serve as a constant current load for the transistor (5).

Abstract: A system for controlling a bipolar constant current when the current is being supplied to an active or reactive element. Tracking is extended to either sink or source modes. A switchable driven ground state is also provided. An operational amplifier buffer senses the voltage amplitude at the junction of the system output and active or reactive load element. This relatively low impedance output is summed or offset with a regulated voltage. This level is again buffered to present a low output impedance and series connected with a current limiting resistor.

Abstract: A differential voltage-current converter has two input transistors and two cross-coupled transistors arranged in a translinear loop, the difference voltage across the emitter resistors of the cross-coupled transistors being equal to the difference voltage across the input terminals. The difference current through the cross-coupled transistors is replicated in the output transistors, thereby enabling a larger output signal amplitude to be obtained. In order to increase the permissible input voltage the bases of the cross-coupled transistors are coupled to the input transistors via emitter-followers. By connecting the collectors of the emitter-followers to the collectors of the output transistors a compensation is obtained for the decreasing current gain at high frequencies.

Abstract: A charge pump (10) having a current source (12) and a current sink (14) is provided. Current source (12) generates one of two output currents using current mirror (16) and switch (18). Switch (18) selects between the two outputs based on a signal from source control (20). Current sink (14) generates one of two currents using current mirrors (44) and (46), and switch (48). Switch (48) selects from two currents generated by current mirrors (44) and (46).

Abstract: A subcircuit for discharging a capacitor at a preselected rate incorporates a first transistor and a second transistor connected with the emitter of the first transistor providing current to the collector of the second transistor. The base of the first transistor is connected to a capacitor to be discharged at a preselected rate. The base current of the first transistor discharges the capacitor as a function of the base current provided to the second transistor. In order to provide a current of very small magnitude to the base of the second transistor, a plurality of lateral PNP transistors are connected in a plural stage arrangement in order to take advantage of the current dividing characteristic of lateral PNP transistors. A collector of one lateral PNP transistor is connected to the emitter of another so that each stage of the subcircuit reduces the output current by a very precise ratio.

Abstract: An integrated transconductor circuit in which the input transistor(s) passes a current across a reference resistor. This conventional arrangement produces current error terms of Vbe/R and Ib. According to the present invention, these terms are compensated by providing a compensation resistor which is matched to the first resistor, and a compensation transistor which is matched to the input transistor, interconnected to feed the appropriate current components to the output. For even better compensation, an additional transistor is optionally added to remove the effect of base current of the compensation transistor. In differential embodiments, the compensation resistor may be bridged or split. Zero, one, or more stages of current mirroring can optionally be used to provide the desired output.

Abstract: A bipolar current source which provides negative and positive currents have been equalized by magnitude. During the majority of the time, the bipolar current source is operating both positive and negative currents are output by the circuit. For a small percentage of the time, both the negative and positive currents are fed into current equalizing circuitry. The current equalizing circuitry generates a feedback signal which is transmitted to either the positive or negative current sources and the magnitude of that current is adjusted until the magnitudes of the positive and negative currents are equal. The bipolar current source then resumes normal operation.

Abstract: A circuit is designed for regulating a power supply voltage. A regulator circuit (26) compares a power supply sample voltage VAR.sub.1 (34) and a reference voltage VREF (20) and corrects the power supply voltage VAR.sub.0 (30). The regulator circuit rate for correcting the power supply voltage varies with the regulator circuit power consumption. A circuit (160), responsive to a control signal (164), changes the regulator circuit power consumption.

Abstract: A current source for producing a current that is proportional to absolute temperature (i.e., "PTAT") is disclosed. The current source is based upon a circuit having a pair of current mirrors, one based upon MOS transistors and the other based upon bipolar transistors, where each of two legs in the current source include the series connection of one of the MOS transistors with one of the bipolar transistors. Further included in the disclosed circuit is a series connection of three MOS startup transistors, useful in starting up the current source in a non-critical manner. A startup current source, sourcing a non-critical startup current, turns on one of the MOS startup transistors that is connected in current mirror fashion with the MOS transistor current mirror, turning on both current mirrors. As the output current increases, the current through the MOS startup transistors also increases, until equilibrium is achieved.

Abstract: A cascode mirror circuit, referred to as a "half-cascode mirror", or "HCM" has first (cascode), second (active), and third (base control) transistors. The cascode and active transistors are connected in series at a first node, the series being connected between a second node and a reference potential. The cascode transistors has its base connected to a second reference voltage. The base control transistor is connected between the supply voltage and a base of the active transistors, with its base connected between the first reference current source and the cascode transistor. Depending upon the selection of input and output signal locations, the circuit can perform various functions, including the generation of an output circuit that varies linearly, logarithmically, or exponentially with an input current, and the generation of an output voltage that varies linearly with the input current.

Abstract: An internal power supply circuit includes a main internal power supply potential generating circuit for generating an internal power supply potential based on a prescribed reference potential, and an auxiliary internal power supply potential generating circuit which is activated in response to a control signal and when activated, generating an internal power supply potential together with the main internal power supply potential generating circuit. The auxiliary internal power supply potential generating circuit includes a P channel MOS transistor for driving, a differential amplifying circuit for controlling the driving transistor by comparing the internal power supply potential with the reference potential and a standby potential supplying circuit for applying a standby potential which is slightly higher than the threshold potential at the which the transistor is rendered conductive, to the gate of the driving transistor while the differential amplifying circuit is not activated.

Abstract: A driving circuit is provided for a power transistor connected to an inductive load. A detection resistor is placed between ground and the emitter of the power transistor. The driving circuit has a first portion which is capable of generating a first current which is a non-linear function of the voltage across the detection resistance. A second portion of the driving circuit is used to generate a base current for the power transistor that is proportional to the first current. The non-linear function of the first current compensates for the non-linear gain with respect to collector current of the power transistor.

Abstract: A bootstrap current reference circuit having an n-type negative resistance network, and a biasing device responsive to operating current of the n-type negative resistance network for biasing the network to operate as a current source at an operating point substantially in a region of a predetermined current peak associated with the n-type negative resistance network. In one embodiment the circuit includes a depletion-mode FET (DFET) and a stable trimmed n-type negative resistance device (ST-NNRD) connected in series with the source of the DFET. The gate of the DFET is feedback coupled to the output of the ST-NNRD so as to bias it in a region of operation in which it exhibits a large incremental resistance, thus bootstrapping the circuit to operate in a state substantially independent of fluctuations associated with supply voltage source. In an alternate embodiment, the circuit includes a ST-NNRD connected in series with the source terminal of a DFET.

Abstract: An integrated circuit voltage regulator employs a PNP pass transistor to produce a low dropout voltage. Saturation in the pass transistor produces excessive substrate current which appears in the form of wasted current which lowers the regulator efficiency. A current conducted by the sat catcher circuit is employed to avoid pass transistor saturation. The sat catcher is controlled dynamically so the dropout voltage is minimized and the voltage regulator maintains good performance at high regulator output currents.

Abstract: A switchable, uninterruptible, low-current reference generator with zero off-state current includes a cross-coupled, cascodeal .increment.V.sub.be current reference (70,72,74,76,78) for providing an output current, a current mirror (66,68) coupled in a cascode configuration with the current reference, and a start-up circuit (12) responsive to the absence of the output current for generating a start-up current (I.sub.58) to the current mirror. Start-up current is disabled when output current is restored, and the current mirror bootstraps the output current into regulation. Standby logic (10), comprising FET's configured as CMOS inverters, provides a TTL-compatible, active-low input, and switching FET's (60,80,90,92,94) responsive to the standby logic ensure that the reference generator draws no current in its off state. When the reference generator is turned on, a hysteresis circuit (98,52) coupled to the standby logic (10) increases the input voltage required for turn-off.

Abstract: A voltage/current converter includes a first differential pair including a first and second NPN transistor, a second differential pair including a third and fourth NPN transistor, a first resistor disposed between the emitters of the transistors of the first differential pair, a second resistor disposed between the emitters of the transistors of the second differential pair, third and fourth resistors disposed between the bases of the first and third transistors and of the second and fourth transistors, respectively, and a voltage negative feedback means disposed between the terminals of the second resistor and the bases of the transistors of the first differential pair in order to fix the voltage across the second resistor to a predetermined input voltage.

Abstract: A universal signal converter composed of a first current mirror having a first input terminal adapted to receive a first input signal and a first output terminal. A first common terminal is coupled to a first reference terminal. The signal converter is adapted to receive a second input signal via the first output terminal. The converter further comprises a second current mirror having a second input terminal coupled to a second reference terminal, a second output terminal adapted to supply a first output signal, and a second common terminal coupled to the first output terminal. A third current mirror has a third input terminal coupled to the second reference terminal and a third output terminal adapted to supply a second output signal. A third common terminal is coupled to the first input terminal and a bias current source is coupled between the second and the third input terminal and the second reference terminal.

Abstract: A current limiting circuit which includes a vertical MOS transistor as an output transistor has a clamping voltage that can be established with high accuracy, and once established, is less dependent on temperature. The gate of an output N-channel VDMOS transistor is connected to a constant-voltage circuit composed of an N-channel VDMOS transistor having the same characteristics as those of the output N-channel VDMOS transistor and two series-connected resistors which supply a divided voltage to the gate of the N-channel VDMOS transistor. The clamping voltage between the gate and source of the output N-channel VDMOS transistor can be adjusted based on the voltage divided by the resistors of the constant-voltage circuit. The temperature characteristics of the output N-channel VDMOS transistor and the constant-voltage circuit are held in phase with each other to reduce variations in the clamping voltage caused by temperature variations.

Abstract: A high-speed, fully-floating, current source/sink utilized a current mode operational amplifier to drive a power MOSFET without ringing or instability. The output of the current mode op amp is directly connected to the MOSFET gate. The current source relies on an optical link to enable an analog switch to generate carefully controlled pulse width characteristics at the positive input of the op amp.

Abstract: The invention provides a method and apparatus for precise modulation of a reference current. A current generating apparatus in accordance with the invention is provided on an integrated circuit chip and includes a series connected chain comprising in the recited order: (a) an externally-set reference current source; (b) a current-to-voltage (I/V) converter for converting the reference current into an on-chip reference voltage, V.sub.ref ; (c) a voltage-to-current (V/I) converter for converting the reference voltage V.sub.ref into an on-chip, internal reference current I.sub.iref ; (d) a single-ended, voltage-operated current switch for modulating the internal reference current I.sub.iref to produce therefrom a modulated current signal, I.sub.M ; (e) a current-driven filter which receives the modulated current signal I.sub.M and produces therefrom a filtered voltage signal, V.sub.F ; (f) a voltage-to-current (V/I) converter for converting the filtered output voltage signal V.sub.

Abstract: A circuit for temperature compensating the inverse saturation current of a bipolar transistor having a collector region, base and emitter regions defining a base-emitter junction is disclosed. A diode element having substantially said same saturation current is parallel-connected in reverse configuration to said base-emitter junction of the bipolar transistor. If the bipolar transistor is NPN type, the diode has an anode and cathode connected respective to the emitter and base regions of the transistor.

Abstract: In a power supply circuit formed into an IC for use in a battery-powered apparatus, an operating current line of a first circuit and that of a second circuit are connected in series to a power source. An output line of a constant voltage regulator is connected to the middle junction of the series circuits so as to reduce the current consumption.

Abstract: A current switch (30) includes a switching transistor (Q1) having a collector electrode for coupling to a first voltage source (Vcc), an emitter electrode, and a base electrode for receiving a control signal (V.sub.IN1). Switching transistor (Q1) is responsive to the control signal (V.sub.IN1) to turn on to produce a collector current (I.sub.CQ1). A bias circuit (26) is coupled to the emitter electrode of the switching transistor (Q1) for causing the collector current (I.sub.CQ1) of the switching transistor (Q1) to have a predetermined value. The bias circuit includes first and second transistors (Q3 and Q4) having base electrodes coupled in common. The first transistor (Q3) has a collector electrode coupled to the emitter electrode of the switching transistor (Q1) and an emitter electrode for coupling to a second voltage source (Vss). The second transistor has a collector electrode for coupling to a current source (24) and an emitter electrode for coupling to the second voltage source (Vss).

Abstract: A current sink includes an electronic component having a switched current path and a control terminal. The current path can be switched to a low-impedance condition by the control terminal to sink a current flowing into it. A component having a frequency-dependent passband is connected to the control terminal for passing signals of a predetermined frequency range.

Abstract: A modified Widlar current source (74) includes a first transistor (84) having a collector providing a first terminal of the current source (74), a base, and an emitter connected through a first resistor (85) to a second terminal of the current source (74). A second transistor (82) has a collector connected to a power supply voltage terminal through a second resistor (81) and to the base of the first transistor (84), a base connected to the collector thereof, and an emitter connected to the second terminal of the current source (74) through a third resistor (83). A switching portion (80) selectively reduces a resistance between the power supply voltage terminal and the collector of the second transistor (82) in response to a control signal. Thus, current is selectively reduced, such as during a non-switching time of a logic circuit (70).