With Additional Stage Patents (Class 323/314)
  • Patent number: 10915132
    Abstract: A low dropout (LDO) regulator is configured to generate an LDO voltage. The LDO regulator includes at least one current mirror and at least one resistor. The at least one current mirror operates in a sub-threshold region. A first terminal of the at least one resistor is directly coupled to the at least one current mirror. A second terminal of the at least one resistor is directly coupled to a power line.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: February 9, 2021
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventor: Yu-Hsuan Liu
  • Patent number: 10877501
    Abstract: The present invention discloses a power supply powering-on structure, which comprises an LDO module, a bandgap reference module, a voltage detection module, a bias module and a switch module; the working voltage of the LDO module, the voltage detection module and the bias module adopts external power supply voltage; the working voltage of the bandgap reference module adopts LDO output voltage; the switch module provides switching connection between the output of the bias module and the output of the bandgap reference module for a reference voltage input end and a bias current input end of the LDO module. The present invention can adopt internal power supply voltage to supply power to the bandgap reference module and can also solve the problem that the internal power supply voltage restricts the powering-on and starting of the bandgap reference module.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: December 29, 2020
    Assignee: Shanghai Huali Microelectronics Corporation
    Inventors: Ning Zhang, Yifei Qian
  • Patent number: 10852758
    Abstract: A reference voltage generator comprises: an amplifier; a capacitor network including one or more capacitors; and a switch control circuit to control connectivity of the capacitor network with respect to the input/output nodes of the amplifier. During operation, the switch control circuit controls connectivity of a first capacitor (in the capacitor network) in and out of a feedback path of the amplifier to produce a substantially constant reference voltage. For example, the reference voltage generator provides input offset voltage correction of the amplifier via repeatedly switching between: i) a first mode in which the first capacitor is absent from the feedback path of the amplifier during charging of the first capacitor, and ii) a second mode of inserting the charged first capacitor into the feedback path of the amplifier. Correction of the input offset voltage of the amplifier results in generation of a more accurate reference voltage over temperature.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: December 1, 2020
    Assignee: Infineon Technologies Austria AG
    Inventor: Salil A. Mahadik
  • Patent number: 10847218
    Abstract: A band-gap reference start-up circuit includes a pull-up unit, a bias current unit, and a start-up unit. The pull-up unit and the bias current unit are coupled to a control node. The start-up unit is coupled to a trigger terminal of the band-gap voltage reference circuit and the control node. During a start-up process of the band-gap voltage reference circuit, the bias current unit is enabled to generate a bias current for pulling down a voltage of the control node, the start-up unit is enabled to generate a start-up current for raising a voltage of the trigger terminal to enable the band-gap voltage reference circuit when the voltage of the control node is pulled down by the bias circuit unit, and the pull-up unit is enabled to generate the pull-up current for raising the voltage of the control node when the band-gap voltage reference circuit is enabled.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: November 24, 2020
    Assignee: eMemory Technology Inc.
    Inventor: Chien-Han Wu
  • Patent number: 10845838
    Abstract: A reference voltage generation circuit including: a first diode including a first conductive area; a second diode including a second conductive area that is larger than the first conductive area; a generation section configured to generate a reference voltage using a voltage based on the first diode and a voltage based on the second diode; and a first capacitor connected between a node of dividing resistors and an output of the generation section, the dividing resistors being connected between the output of the generation section and the second diode.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: November 24, 2020
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Hiroyuki Tanikawa
  • Patent number: 10771051
    Abstract: A semiconductor device and a method of generating a power on reset signal that can reliably perform power on reset on an internal circuit and subsequently cancel the reset state regardless of environmental temperature are provided. The semiconductor device according to the disclosure includes: a voltage divider circuit dividing a power supply voltage to obtain first and second voltages having different voltage values; a first transistor receiving the first voltage at the control electrode to generate a first current; a second transistor receiving the second voltage at the control electrode to generate a second current; a current comparing part comparing the first and second currents to generate a current comparison result signal representing a comparison result; and a reset signal generating part generating a power on reset signal having a first level that prompts reset or a second level that prompts reset cancelation based on the current comparison result signal.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: September 8, 2020
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Tetsuaki Yotsuji
  • Patent number: 10739808
    Abstract: The reference voltage generator includes an output terminal, first to fourth resistors, first to fourth transistors, and a diode unit. The first transistor is coupled to the second transistor. The first resistor is coupled between the second transistor and a second reference voltage terminal. The first resistor is also coupled to the first transistor. One terminal of the diode unit is coupled to the output terminal, and the other terminal of the diode unit is coupled to the second and third resistors. The second and third resistors are also coupled to the first and second transistors, respectively. The third transistor is coupled between the fourth resistor and the second reference voltage terminal, and includes a control terminal coupled to the second transistor. The fourth transistor is coupled between a first reference voltage terminal and the diode unit. The fourth transistor is also coupled to the fourth resistor.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: August 11, 2020
    Assignee: RichWave Technology Corp.
    Inventor: Kuang-Lieh Wan
  • Patent number: 10714944
    Abstract: A charging circuit includes a power conversion circuit, an inductor, and at least one conversion capacitor. The power conversion circuit includes a conversion switch circuit and a conversion control circuit. The conversion switch circuit includes an upper switch, a lower switch, and at least one auxiliary switch. In a switching conversion mode, the conversion control circuit operates the conversion switch circuit to switch the inductor to plural voltage levels repetitively for converting an input power to a charging power to charge a battery by switching power conversion. In a capacitive conversion mode, the conversion control circuit operates the conversion switch circuit to switch the conversion capacitor between two of voltage division nodes periodically for converting the input power to the charging power by capacitive power conversion.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: July 14, 2020
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Wei-Jen Huang, Tsung-Han Lee, Shun-Yu Huang, Chun-Kai Chang
  • Patent number: 10671109
    Abstract: A bandgap reference circuit includes a circuit for high-order temperature curvature compensation; and a circuit for low output impedance and current drive capability, wherein an output voltage of the bandgap reference circuit can be independently adjusted to be either above or below a silicon bandgap voltage without impacting temperature curvature.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: June 2, 2020
    Assignee: Vidatronic Inc.
    Inventors: Sameh Assem Ibrahim, Anand Veeravalli Raghupathy, Mostafa Mohamed Hesham Kamel Toubar, Moises Emanuel Robinson
  • Patent number: 10672572
    Abstract: An electrical switch responds to acoustic inputs. A microphone integrated into the electrical switch generates electrical signals in response to the acoustic inputs. A network interface integrated into the electrical switch provides addressable communication with controllers, computers, and other networked devices. The electrical switch may thus be installed or retrofitted into the electrical wiring of all homes and businesses. Users may thus speak voice commands, which are received by the electrical switch and sent for voice control of appliances and other automation tasks.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: June 2, 2020
    Assignee: AT&T INTELLECTUAL PROPERTY I, L.P.
    Inventor: John Willis
  • Patent number: 10635127
    Abstract: A reference voltage generator circuit is provided with a first voltage generator circuit that generates a first direct-current voltage; a second voltage generator circuit that generates a second direct-current voltage; and an operational amplifier that generates a voltage difference between the first and second direct-current voltages. The reference voltage generator circuit generates a reference voltage based on a band gap by controlling currents flowing in the first and second voltage generator circuits based on the voltage difference, and includes a third voltage generator circuit including a PNP bipolar transistor, which is connected in parallel with the first voltage generator circuit. The third voltage generator circuit generates a third direct-current voltage corresponding to a base current flowing in the PNP bipolar transistor, and applies it to the operational amplifier with the first direct-current voltage.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: April 28, 2020
    Assignee: RICOH ELECTRONIC DEVICES CO., LTD.
    Inventor: Yohkoh Hirose
  • Patent number: 10637344
    Abstract: A source-grounded amplifier circuit supplied with a signal of an error amplifier circuit, and an output transistor supplied with a control voltage of the source-grounded amplifier circuit are provided. The source-grounded amplifier circuit has, in a signal path, a current limiting circuit including a cascode circuit controlled by a voltage having a positive temperature coefficient. A voltage regulator capable of reducing a dropout voltage of an output voltage without exceeding a gate breakdown voltage of the output transistor is provided.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: April 28, 2020
    Assignee: ABLIC INC.
    Inventors: Tsutomu Tomioka, Masakazu Sugiura
  • Patent number: 10599176
    Abstract: A bandgap reference circuit and a high-order temperature compensation method are disclosed. The bandgap reference circuit includes: a starting circuit, a bias circuit and a high-order compensated bandgap reference voltage generating circuit, where a compensation method of the high-order compensated bandgap reference voltage generating circuit is to perform curvature correction by using a sub-threshold current of a CMOS transistor to obtain a high-order temperature-compensated bandgap reference voltage source circuit. The present circuit has the advantages that a manner not increasing circuit complexity can be adopted for implementation, the accuracy of a bandgap reference source can be greatly improved, and power consumption, chip area and cost are reduced.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: March 24, 2020
    Assignee: PURESEMI Co., Ltd.
    Inventors: Shuzhuan He, Zhaoyu Jiang, Junjie Chen
  • Patent number: 10574370
    Abstract: Advanced detectors for vector signaling codes are disclosed which utilize multi-input comparators, generalized on-level slicing, reference generation based on maximum swing, and reference generation based on recent values. Vector signaling codes communicate information as groups of symbols which, when transmitted over multiple communications channels, may be received as mixed sets of symbols from different transmission groups due to propagation time variations between channels. Systems and methods are disclosed which compensate receivers and transmitters for these effects and/or utilize codes having increased immunity to such variations, and circuits are described that efficiently implement their component functions.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: February 25, 2020
    Assignee: KANDOU LABS, S.A.
    Inventors: Brian Holden, Amin Shokrollahi, Anant Singh
  • Patent number: 10566936
    Abstract: Various technologies pertaining to a high-impedance current source are described herein. The current source outputs a substantially constant current by way of a first transistor that draws current from a supply. The current source is configured to feed-back noise from the supply to a feedback resistor at an input of an operational amplifier (op-amp) by way of a second transistor. The feedback resistor and the op-amp are configured such that responsive to receiving the supply noise feedback, the op-amp drives a gate voltage of the first transistor to cause the first transistor to reject the supply noise and cause the output of the current source to remain substantially constant.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: February 18, 2020
    Assignee: National Technology & Engineering Solutions of Sandia, LLC
    Inventor: Kurt O. Wessendorf
  • Patent number: 10554849
    Abstract: A photoelectric conversion device includes a plurality of light receiving elements, a plurality of A/D conversion units, and an offset giving unit. The light receiving elements are arrayed in one direction and each convert a light signal into an electrical signal. The A/D conversion units perform A/D conversion on the electrical signals output from the light receiving elements. The offset giving unit gives an offset voltage of a certain level to the electrical signals output from the light receiving elements without flowing a steady current before the electrical signals are input into the A/D conversion units.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: February 4, 2020
    Assignee: Ricoh Company, Ltd.
    Inventors: Hideki Hashimoto, Masamoto Nakazawa
  • Patent number: 10545522
    Abstract: A voltage reference circuit includes a bandgap circuit and a temperature compensation circuit. The temperature compensation circuit includes a first trim circuit, a second trim circuit, and a resistive digital-to-analog converter. The resistive digital-to-analog converter is coupled to the first trim circuit, the second trim circuit, and the bandgap circuit. The resistive digital-to-analog converter is configured to generate a temperature compensation voltage, and to provide the temperature compensation voltage to the bandgap circuit.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: January 28, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Sandeep Shylaja Krishnan
  • Patent number: 10541019
    Abstract: According to one embodiment, an apparatus is disclosed. The apparatus includes a first power supply having a first fixed voltage, a second power supply having a second fixed voltage, a plurality of circuits coupled to the first power supply via a first switch and the second power supply via a second switch, and a power control circuit configured to selectively enable one of the first switch and the second switch responsive to power demand information.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: January 21, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Dean Gans
  • Patent number: 10490994
    Abstract: A device for current sensing of a power transistor system having a power transistor, a first series circuit which includes a first transistor and a first resistance, the first resistance disposed in a load circuit of the first transistor, a second series circuit which has a second transistor and a second resistance disposed in a load circuit of the second transistor, the first series circuit, the second series circuit and the power transistor situated in parallel with one another, the first resistance connected to the first transistor in an electrically conductive manner when the first transistor is switched on, and the second resistance connected to the second transistor in an electrically conductive manner when the second transistor is switched on, and a gate terminal of the first transistor is connected in an electrically conductive manner to a gate terminal of the power transistor when the power transistor is switched on.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: November 26, 2019
    Assignee: Robert Bosch GmbH
    Inventors: Thomas Jacke, Werner Schiemann
  • Patent number: 10469069
    Abstract: A power semiconductor circuit includes a power semiconductor device for switching a load, and a comparator which is directly or indirectly connected to the power semiconductor device at a connection point for the load by means of a first input and to which a predefined or predefinable reference voltage can be fed at a second input, the power semiconductor device being activatable by means of an output of the comparator.
    Type: Grant
    Filed: June 14, 2017
    Date of Patent: November 5, 2019
    Assignee: VALEO SIEMENS EAUTOMOTIVE GERMANY GMBH
    Inventor: Carsten Kuring
  • Patent number: 10432155
    Abstract: A bias current generator is disclosed that include an operational amplifier that is self-biased during an inactive period with a bias current to bias a gate of an output transistor. Since the inactive period bias is close to an active period bias applied to the gate of the output transistor during active operation of the bias current generator, the speed of transition from the inactive period to the active period is enhanced by the self-biasing of the operational amplifier.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: October 1, 2019
    Assignee: DIALOG SEMICONDUCTOR (UK) LIMITED
    Inventor: Pranav Kotamraju
  • Patent number: 10433069
    Abstract: A charge pump assembly allowing MEMS microphones being temperature-compensated in a large temperature range and corresponding microphones are provided. An assembly includes a charge pump and a bias circuit electrically connected to the charge pump. A bias voltage provided by the bias circuit has a temperature dependence.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: October 1, 2019
    Assignee: TDK Corporation
    Inventor: Gino Rocca
  • Patent number: 10409312
    Abstract: A duty cycled voltage reference circuit is turned on and off synchronously with the operation of a second, reference-consuming, duty-cycled circuit to which it supplies a reference. When the reference consuming circuit no longer has need of the reference, the voltage reference circuit itself is then also powered down. The reference circuit is then powered back up for the next duty cycle sufficiently in advance of the reference consuming circuit such that any auto-zeroing and noise filtering operations required by the reference circuit are complete and a stable reference voltage is output at least simultaneously with, or slightly before, the reference consuming circuit begins to make use of the voltage reference signal. In this manner, synchronous duty-cycled operation of the voltage reference circuit with the reference-consuming circuit is obtained, with the consequence that power consumption by the reference circuit is reduced.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: September 10, 2019
    Assignee: Analog Devices Global Unlimited Company
    Inventor: Sanjay Rajasekhar
  • Patent number: 10386879
    Abstract: A bandgap reference voltage circuit includes a bandgap reference voltage generator and a startup current generator. The bandgap reference voltage generator is configured to generate a first voltage and a second voltage. The startup current generator includes a voltage comparator and a switch. The voltage comparator is connected to the bandgap reference voltage generator and is configured to compare the first voltage with the sum of the second voltage and an offset voltage and to generate a comparison result. The switch is connected between the voltage comparator and the bandgap reference voltage generator and is configured to selectively connect a supply voltage to the bandgap reference voltage generator based on the comparison result. A device that includes the circuit is also disclosed. A method of operating the circuit is also disclosed.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: August 20, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chen-Lun Yen, Cheng-Hsiung Kuo
  • Patent number: 10310528
    Abstract: A band gap circuit with offset voltage error correction including a diode junction circuit, an error amplifier, a current device, a bias current generator, a calibration circuit, and a mode control circuit. During a normal mode of operation, the error amplifier monitors feedback nodes of the diode junction circuit and drives the current device to provide a control current to the diode junction circuit. During a calibration mode, the current device is decoupled from the diode junction circuit and the inputs of the error amplifier are shorted together, the bias generator circuit sinks a bias current from the current device and separately sources a bias current to the diode junction circuit such that the error amplifier operates as a comparator, and the calibration circuit monitors the output of the current device while adjusting a trim current of the error amplifier to minimize an offset voltage error of the error amplifier.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: June 4, 2019
    Assignee: Silicon Laboratories Inc.
    Inventors: Mohamed Elsayed, Scott D. Willingham
  • Patent number: 10261538
    Abstract: A standard voltage circuit includes an operational amplifier, first and second diodes, a resistance element, and a dummy leak generation circuit. The first diode is electrically connected to a first node of a first line which is disposed on an output terminal side of the operation amplifier and is electrically connected to a first input terminal of the operation amplifier through the first node. The second diode is electrically inserted connected to a second node of a second line which is disposed on the output terminal side of the operation amplifier and is electrically connected to a second input terminal of the operation amplifier through the second node. The resistance element is electrically connected to the second node in series with the second diode. The dummy leak generation circuit is electrically connected to one of the first line and the second line.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: April 16, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Takeshi Ono
  • Patent number: 10242748
    Abstract: According to one embodiment, a voltage generation circuit includes a first boost circuit, a voltage division circuit, a first detection circuit, a capacitor and a first switch. The first boost circuit outputs a first voltage. The voltage division circuit divides the first voltage. The first detection circuit is configured to detect a first monitor voltage supplied to the first input terminal, based on a reference voltage which is supplied to a second input terminal of the first detection circuit, and to control an operation of the first boost circuit. The capacitor is connected between an output terminal of the first boost circuit and the first input terminal of the first detection circuit. The first switch cuts off a connection between the capacitor and the first detection circuit, based on an output signal of the first detection circuit, until the first voltage is output from the first boost circuit.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: March 26, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Tatsuro Midorikawa, Masami Masuda
  • Patent number: 10228715
    Abstract: A self-starting bandgap reference circuit comprises a bias current source configured to provide a bias current. A bandgap core coupled to the bias current source includes a first device configured to receive the bias current and provide a first current output based on the bias current and a second device configured to receive the bias current and provide a second current output based on the bias current. A difference mirror coupled to the first device and the second device receives the first current output and the second current output and is configured to provide a difference current between the second current output and the first current output that is a proportional-to-absolute temperature current. A voltage reference output and a current reference output coupled to the difference mirror receives the proportional-to-absolute temperature current and provides a voltage reference and a current reference based on the proportional-to-absolute temperature current.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: March 12, 2019
    Assignee: Intrinsix Corp.
    Inventor: Daniel J. Segarra
  • Patent number: 10224884
    Abstract: A circuit for implementing a multifunction output generator is described. The circuit comprises an amplifier circuit having a first input and a second input; a voltage generator coupled at a first node to a first input of the amplifier circuit; a controllable current source configured to provide a variable current to the first node; and a switching circuit enabling the operation of the amplifier circuit in a first mode for sensing a temperature and a second mode for providing a reference voltage. A method of implementing a multifunction output generator is described.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: March 5, 2019
    Assignee: XILINX, INC.
    Inventors: Umanath R. Kamath, John K. Jennings, Adrian Lynam
  • Patent number: 10211813
    Abstract: A control circuit disposed in a connection line including a first power pin and a second power pin and including a native N-type transistor, a first impedance unit, and a second impedance unit is provided. The native N-type transistor includes a first gate, a first drain and a first source. The first drain is coupled to the first power pin. The first impedance unit is coupled between the first source and the second power pin. The second impedance unit is coupled between the first drain and the first gate. When the voltage level of the first power pin is equal to a pre-determined level, the first gate of the native N-type transistor receives an adjusting signal to adjust an equivalent impedance of the native N-type transistor.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: February 19, 2019
    Assignee: VIA TECHNOLOGIES, INC.
    Inventor: Cheng-Chun Yeh
  • Patent number: 10175711
    Abstract: In some examples, a device includes a curvature-correction circuit including a first current source configured to generate a PTAT electrical current. In some examples, the curvature-correction circuit also includes three or more programmable current sources configured to generate three or more programmable electrical currents. In some examples, the curvature-correction circuit is configured to generate a PWL electrical current based on the PTAT electrical current and the three or more programmable electrical currents. In some examples, the device also includes a reference voltage circuit configured to generate a reference voltage signal based on the PWL electrical current.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: January 8, 2019
    Assignee: Infineon Technologies AG
    Inventors: Luca Petruzzi, Anthony Candage
  • Patent number: 10141924
    Abstract: A semiconductor circuit including a PMOS transistor that includes a first source connected to a power supply, a first drain, and a first gate to which a fixed potential is supplied; an output circuit that outputs a first output signal, which is a reset signal or a power-on signal, and that outputs a second output signal according to a potential of the first drain; a constant current source connected to the first drain; and an NMOS transistor that includes a second source to which a fixed potential is supplied, a second drain connected to the first drain, and a second gate to which the second output signal from the output circuit is applied.
    Type: Grant
    Filed: July 3, 2017
    Date of Patent: November 27, 2018
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Takashi Takemura
  • Patent number: 10139883
    Abstract: A power system includes a voltage detection IC which outputs a reset signal to a microcomputer when an input voltage is equal to or lower than a reset release voltage, releases outputting of the reset signal when the input voltage exceeds the reset release voltage, and outputs the reset signal to the microcomputer again after the input voltage exceeds the reset release voltage when the input voltage is equal to or lower than a reset detection voltage which is lower than the reset release voltage and a voltage conversion circuit which sets a first voltage associated with a change of a power voltage as the input voltage before start of operation of the microcomputer and sets a second voltage which is associated with a change of the power voltage and is lower than the first voltage as the input voltage after the start of operation the microcomputer.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: November 27, 2018
    Assignee: Alpine Electronics, Inc.
    Inventor: Hideaki Sato
  • Patent number: 10135615
    Abstract: Systems and methods for providing assistance for performing a physically unclonable function (PUF) are provided. Disclosed systems can include a PUF bitcell including at least two voltage-compensated proportional-to-absolute (PTAT) generators, each of which can be configured to generate a first voltage and a second voltage that is different from the first voltage by a voltage difference. The voltage difference can be resistant to temperature variations and variations, if any, in the supply voltage. The system can further include a comparator, which can be electrically coupled to each of the at least two PTAT generators, and can be configured to receive the first voltage and the second voltage generated therefrom, determine a polarity of each of the voltage differences, and generate a random bit.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: November 20, 2018
    Assignee: THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK
    Inventors: Mingoo Seok, Jiangyi Li
  • Patent number: 10133293
    Abstract: A circuit can have a low mirror input voltage and fast settling while providing a large current mirror gain. The circuit can include a current source, a first current mirror device having a first transistor and a second transistor and electrically coupled with the current source, a third transistor electrically coupled with the first transistor, a second current mirror device having a fourth transistor and a fifth transistor and electrically coupled between the third transistor and the second transistor, and an output device electrically coupled with the first and second current mirror devices.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: November 20, 2018
    Assignee: Avnera Corporation
    Inventors: Garry N. Link, Wai Lee
  • Patent number: 10113982
    Abstract: Technologies including NMR logging apparatus and methods are disclosed. Example NMR logging apparatus may include surface instrumentation and one or more downhole probes configured to fit within an earth borehole. The surface instrumentation may comprise a power amplifier, which may be coupled to the downhole probes via one or more transmission lines, and a controller configured to cause the power amplifier to generate a NMR activating pulse or sequence of pulses. Impedance matching means may be configured to match an output impedance of the power amplifier through a transmission line to a load impedance of a downhole probe. Methods may include deploying the various elements of disclosed NMR logging apparatus and using the apparatus to perform NMR measurements.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: October 30, 2018
    Assignee: VISTA CLARA INC.
    Inventors: David O. Walsh, Peter Turner
  • Patent number: 10095260
    Abstract: A start-up circuit arranged to initialize a circuit portion with a zero stable point and a non-zero stable point. The start-up circuit includes: a capacitive voltage divider including a first capacitor and a second capacitor that generate a divider bias voltage at a divider node; a differential amplifier including first and second amplifier inputs and an amplifier output connected to the divider node; a first driver transistor with its gate terminal connected to the divider node, and its drain terminal connected to a first start-up output and the first amplifier input; and a second driver transistor with its gate terminal connected to the divider node, and its drain terminal connected to a second start-up output and the second amplifier input. The differential amplifier controls the divider bias voltage and drives the circuit portion to the non-zero stable point.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: October 9, 2018
    Assignee: Nordic Semiconductor ASA
    Inventors: Phil Corbishley, Sebastian Ioan Ene
  • Patent number: 10095251
    Abstract: A voltage regulating circuit provides a feedback voltage and an output voltage based on a power voltage. The voltage regulating circuit includes a reference voltage generator and a compensating circuit. The reference voltage generator receives the power voltage, produces the feedback voltage, and includes an impedance having first and second terminals. The second terminal is coupled to a ground voltage and a first current flows through the impedance at the first terminal to produce the feedback voltage. The compensating circuit includes a negative threshold voltage (NVT) transistor having a source terminal, a drain terminal and a gate terminal. The source terminal receives a power voltage, the drain terminal is connected to the gate terminal and coupled to the first terminal of the impedance through a path to add a second current to the first current when the NVT transistor is turned on under an operational condition at the FF corner.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: October 9, 2018
    Assignee: United Microelectronics Corp.
    Inventors: Chai-Wei Fu, Cheng-Hsiao Lai, Ying-Ting Lin, Yuan-Hui Chen, Ya-Nan Mou, Yung-Hsiang Lin, Hsueh-Chen Cheng
  • Patent number: 10084402
    Abstract: A stepper motor control system includes stepper motor error reduction. For example, first and second power switches respectively energize and de-energize a stepper motor coil during each cycle for pulse-width modulating (PWM) the coil current. During a cycle including a zero crossing microstep, a calibrator detects a type of a body diode effect that occurs in the second power switch when the second switch stops de-energization of the coil. A selected offset is adjusted in response to the type of detection of the body diode effect of the second power switch. Adjusting the selected offset controls the trigger time for a comparator for comparing an offset reference voltage to a motor voltage developed in response to the coil current. Progressively adjusting the selected offset over successive cycles compensates for delays of components in the PWM control loop and reduces errors resulting from, for example, process, voltage, and temperature variations.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: September 25, 2018
    Assignee: Texas Instruments Incorporated
    Inventors: Sooping Saw, Anuj Jain, Jeffrey Okyere, Wen Chao Qu
  • Patent number: 10054968
    Abstract: An integrated circuit includes a reference voltage circuit. The reference voltage circuit includes a bipolar junction transistor (BJT) configured to receive a first current during a first phase of a clock cycle to generate a first base-emitter junction voltage, and receive a second current during a second phase of the clock cycle to generate a second base-emitter junction voltage. The reference voltage circuit includes a switched capacitor circuit configured to provide a reference voltage associated with the first base-emitter junction voltage and the second base-emitter junction voltage.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: August 21, 2018
    Assignee: XILINX, INC.
    Inventors: Umanath R. Kamath, John K. Jennings
  • Patent number: 10038426
    Abstract: A current reference circuit includes a voltage generating device, a resistor, one or more diodes, and a thermal bridge including one or more metal alloy contacts disposed on a substrate. The voltage generating device and the resistor have similar temperature coefficients. The diodes are thermally connected to the voltage generating device through the substrate. The metal alloy contacts are coupled between the diodes and the resistor. The diodes form a reverse bias junction when the compensation circuit is energized such that the thermal bridge may provide thermal conduction between the voltage generating device and the resistor.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: July 31, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Jacques Jean Bertin
  • Patent number: 10027291
    Abstract: A power amplification circuit that includes: a capacitor element in which a first metal layer, a first insulating layer, a second metal layer, a second insulating layer and a third metal layer are sequentially stacked, the capacitor element including a first capacitor in which the first metal layer serves as one electrode thereof and the second metal layer serves as another electrode thereof, and a second capacitor in which the second metal layer serves as one electrode thereof and the third metal layer serves as another electrode thereof; and a transistor that amplifies a radio-frequency signal. The radio-frequency signal is supplied to the one electrode of the first capacitor. The other electrode of the first capacitor and the one electrode of the second capacitor are connected to a base of the transistor, and the other electrode of the second capacitor is connected to the emitter of the transistor.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: July 17, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Satoshi Goto
  • Patent number: 10013013
    Abstract: One example discloses a voltage reference, including: a bandgap circuit core having a first intermediate bandgap voltage output, a second intermediate bandgap voltage output, and a bandgap voltage reference output; an amplifier having a first input, a second input, an input offset, an output, and an input_offset_trim; a trim controller; a switch matrix coupled between the bandgap circuit, the amplifier and the trim controller; wherein the switch matrix has a functional configuration and a calibration configuration; wherein in the functional configuration of the switch matrix, the first intermediate bandgap voltage output is coupled to the first input of the amplifier and the second intermediate bandgap voltage output is coupled to the second input of the amplifier; and wherein in response to the calibration configuration of the switch matrix, the trim controller is coupled to adjust the input offset of the amplifier using the input_offset_trim.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: July 3, 2018
    Assignee: NXP B.V.
    Inventors: Klaas Wortel, Jan Inghels, Henri Verhoeven
  • Patent number: 10007289
    Abstract: A high precision voltage reference circuit is disclosed which replaces two current bias sources, with a single current mirror. Curvature-error correction is established with a modified current mirror circuit. Another object of this disclosure is the addition of a MOSFET device, to alleviate the output voltage variation, due to the channel modulation effect of the origin of the voltage reference.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: June 26, 2018
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Susumu Tanimoto, Soichiro Ohyama
  • Patent number: 10001793
    Abstract: An apparatus is described comprising a bandgap reference circuit comprising: an amplifier including first and second inputs and an output; and a bandgap transistor coupled to the output of the amplifier at a control electrode thereof, the bandgap transistor being further coupled commonly to the first and second inputs of the amplifier at a first electrode thereof to form a feedback path. The apparatus further comprises a resistor coupled to the first electrode of the bandgap transistor.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: June 19, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Wei Lu Chu, Dong Pan
  • Patent number: 9984624
    Abstract: A semiconductor device includes first to fourth terminals, a switch circuit, and an integrating circuit. The integrating circuit includes an amplifier circuit having a (?) terminal, a first (+) terminal, and a second (+) terminal. The integrating circuit is configured to integrate an input signal of the (?) terminal using an average voltage of a voltage of the first (+) terminal and a voltage of the second (+) terminal as a reference voltage. The switch circuit is configured to electrically connect the (?) terminal to the second terminal, the first (+) terminal to the first terminal, the second (+) terminal to the third terminal the (?) terminal to the third terminal, the first (+) terminal to the second terminal, and the second (+) terminal to the fourth terminal. The present semiconductor device is used as a semiconductor device sensing a current flowing through a pixel in a display panel.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: May 29, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kei Takahashi, Roh Yamamoto
  • Patent number: 9983614
    Abstract: A reference circuit includes a bandgap core circuit and a cascode amplifier. The bandgap core circuit includes a first bipolar junction transistor (BJT), a second BJT having a control electrode coupled to a control electrode of the first BJT, a first resistor coupled to the first BJT and the second BJT, and a second resistor coupled to the second BJT. The cascode amplifier circuit includes a first branch coupled to the first BJT and a second branch coupled to the second resistor.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: May 29, 2018
    Assignee: NXP USA, INC.
    Inventors: John M. Pigott, Ivan Victorovich Kochkin, Hamada Ahmed
  • Patent number: 9966048
    Abstract: A memory is provided, which comprises an electrically erasable and programmable read only memory (EEPROM) configured to store an operation system and to be rewritable in response to a write operation signal, an address comparator configured to be connected to Inter Integrated Circuit (I2C) lines and output the write operation signal to the EEPROM in response to an external signal, a digital-to-analog converter (DAC) unit configured to determine whether to connect a DAC resistor and the I2C lines in response to the external signal and a pull-up resistor unit configured to be connected to the I2C lines.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: May 8, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yun Mi Kim, Ki Hyun Pyun, Sung Jun Kim, Min Young Park, Jeong Doo Lee, Kyung Hwa Lim
  • Patent number: 9953980
    Abstract: In an output amplifier stage of an operational amplifier circuit, the first p-well of the first nMOSFET and the second p-well of the second nMOSFET are connected to the fourth node. Further, the first n-well of the first pMOSFET and the second n-well of the second pMOSFET are connected to the fifth node. At least one of the fourth node and the fifth node is connected to an output terminal VOUT.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: April 24, 2018
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Takayuki Nakai
  • Patent number: 9886047
    Abstract: As one example of the invention disclosed herein, a reference voltage generation circuit has: a first reference voltage source generating a first reference voltage; a second reference voltage source generating a second reference voltage having a temperature response different from that of the first reference voltage; a first comparator comparing the first and second reference voltages to generate a first comparison signal; and a selector selectively outputting one of the first and second reference voltages as a reference voltage according to the first comparison signal.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: February 6, 2018
    Assignee: Rohm Co., Ltd.
    Inventors: Yusuke Yoshii, Yuki Inoue