Abstract: A circuit for generating reference voltage and reference current includes a band-gap reference circuit and a voltage-to-current converting circuit. The band-gap reference circuit is configured to generate a temperature-independent reference voltage by generating a first current with a positive temperature coefficient. The voltage-to-current converting circuit is coupled to a node of the band-gap reference circuit and configured to convert a voltage with a negative temperature coefficient at the node into a second current with a negative temperature coefficient. The band-gap reference circuit and the voltage-to-current converting circuit share a common current source having a feedback transistor through which a reference current flows. The reference current is divided into the first current of the band-gap reference circuit and the second current of the voltage-to-current converting circuit, thus having a temperature coefficient substantially equal to zero by combining the first current and the second current.

Abstract: Semiconductor circuit capable of mitigating unwanted effects caused by variations in a received input signal are provided, in which a main circuit receives an input signal and comprises a first current source coupled between a first node and a first power voltage to generate a first current according to a first bias voltage. A replica circuit is coupled to the main circuit to duplicate a variation in a voltage at the first node caused by a variation in the input signal and dynamically adjusts the first bias voltage according to the duplicated variation such that the first current is maintained at a constant.

Abstract: A test circuit provided to monitor a bandgap circuit that outputs a bandgap reference voltage The test circuit includes a reference voltage test module to output a first pass signal when an operating voltage of the bandgap circuit is greater than a first threshold voltage; an output test module to output a second pass signal when an output voltage of the bandgap circuit is greater than a second threshold voltage; and an overdrive test module to output a third pass signal when a minimum operating voltage of the test circuit is detected. Furthermore, a logic circuit is provided and coupled to outputs of each of the test modules. The logic circuit is further configured to output an operating signal, which indicates that the bandgap reference voltage is stable, after receiving the first, second, and third pass signals.

Abstract: A band-gap reference voltage source circuit is constituted of a diode-pair circuit connected to a reference voltage output terminal, a first differential amplifier including a first transistor and a first operational amplifier, and a second differential amplifier including a second transistor and a second operational amplifier. The second differential amplifier operates based on a bias voltage, which is lower than a predetermined voltage, so as to forcedly pull up the level of the reference voltage output terminal via the second transistor before the first differential amplifier starts to pull up the level of the reference voltage output terminal up to the predetermined voltage via the first transistor.

Abstract: One embodiment provides a reference current generation circuit. The circuit has first and second reference current generation circuits for generating first and second reference currents respectively, and a current output circuit for outputting a third reference current by adding the first and second reference currents. The first reference current generation circuit includes first and second current-voltage conversion circuits and a first current supply circuit. The first current supply circuit provides substantially equal amounts of current to the first and second current-voltage conversion circuits respectively. The second reference current generation circuit includes third to fifth current-voltage conversion circuits and a second current supply circuit.

Abstract: The present invention provides a bandgap reference circuit. The bandgap reference circuit includes a first bipolar junction transistor, a first resistor, for generating a proportional to absolute temperature current, a second resistor, for generating a complementary to absolute temperature current, a first operational amplifier, coupled with the first bipolar junction transistor and the first resistor, a second operational amplifier, coupled with the first bipolar junction transistor and the second resistor, and a zero temperature correlated current generator, for summing the proportional to absolute temperature current and the complementary to absolute temperature current, to generate a zero temperature correlated current.

Abstract: An internal source voltage generating circuit includes a comparison voltage generator which receives reference and internal source voltages, outputs to a second node a comparison voltage differentially amplified responsive to a voltage of a first node according to a difference between the reference and internal source voltages, and allows a driving current to flow from a third node to a fourth node. An internal voltage driver transfers an external source voltage to an output node responsive to the comparison voltage. A driving current generator increases the driving current flowing from the third node to the fourth node responsive to the voltage of the first node which rises when the internal source voltage abruptly drops. The internal source voltage generating circuit is insensitive to variation of an external source voltage, exhibits improved response time when an internal source voltage abruptly drops, and stably generates an internal source voltage.

Abstract: A dB-linear voltage-to-current (V/I) converter that is amenable to implementation in CMOS technology. In a representative embodiment, the dB-linear V/I converter has a voltage scaler, a current multiplier, and an exponential current converter serially connected to one another. The voltage scaler supplies an input current to the current multiplier based on an input voltage. The current multiplier multiplies the input current and a current proportional to absolute temperature and supplies the resulting current to the exponential current converter. The exponential current converter has a differential MOSFET pair operating in a sub-threshold mode and generating an output current that is proportional to a temperature-independent, exponential function of the input voltage.

Abstract: A cascode current mirror circuit and a bandgap circuit are provided. The circuits are used together and function as a reference voltage circuit. The reference voltage circuit outputs a reference current resistant to temperature variation and ripple-voltage. Accordingly, a voltage stabilizing/regulating circuit corrects error voltage precisely and promptly, and the resultant voltage is temperature insensitive and ripple-voltage-independent.

Abstract: A MOS resistor generates an output current based on a voltage induced across a drain and a source thereof. A gate bias voltage generator circuit generates a gate bias voltage so as to operate the MOS resistor in a strong-inversion linear region, and applies the gate bias voltage to a gate of the MOS resistor. A drain bias voltage generator circuit generates a drain bias voltage, and applies the drain bias voltage to the drain of the MOS resistor. An added bias voltage generator circuit generates an added bias voltage, which has a predetermined temperature coefficient and includes a predetermined offset voltage, so that the output current becomes constant against temperature changes. The drain bias voltage generator circuit adds the added bias voltage to the drain bias voltage, and applies a voltage of adding results to the drain of the MOS resistor as the drain bias voltage.

Abstract: A reference generator circuit generates a reference signal for use by a regulator in generating operational power for circuits and devices. A start-up circuit includes a self-biased voltage reference and a differential amplifier configured to generate a start-up signal to induce current flow in response to a voltage independent reference signal during a start-up phase of the circuit and cease inducing the current flow following the start-up phase of the circuit. The reference signal is generated by receiving a supply voltage and inducing current flow into a node of a bandgap reference circuit during a start-up phase of the bandgap reference circuit and ceasing inducing the current flow following the start-up phase of the bandgap reference circuit.

Abstract: Embodiments of the present invention include systems and methods for generating a curvature compensated bandgap voltage reference. In an embodiment, a curvature compensated bandgap reference voltage is achieved by injecting a temperature dependent current at different points in the bandgap reference voltage circuit. In an embodiment, the temperature dependent current is injected in the proportional to absolute temperature (PTAT) and complementary to absolute temperature (CTAT) current generation block of the bandgap circuit. Alternatively, or additionally, the temperature dependent current is injected at the output stage of the bandgap circuit. In an embodiment, the temperature dependent current is a linear piecewise continuous function of temperature. In another embodiment, the temperature dependent current has opposite dependence on temperature to that of the bandgap voltage reference before curvature compensation.

Abstract: A system includes a controllable voltage generator to generate a power supply voltage. The system also includes a system controller to determine a voltage level associated with the power supply voltage, and prompt the controllable voltage generator to generate the power supply voltage. The system includes a floating gate reference device to generate an absolute voltage reference based, at least in part, on the voltage level associated with the power supply voltage. The system can also include analog circuitry to perform one or more electrical operations responsive to the absolute voltage reference from the floating gate reference device.

Abstract: A current source providing an output current with a fixed current range includes a bias circuit, a resistor, a current mirror, and a controller. The bias circuit provides a first voltage weighted with a first tunable coefficient and a second voltage weighted with a second tunable coefficient. The resistor has a tunable resistance for determining a bias current according to a voltage difference between the first and the second voltages and the tunable resistance. The current mirror generates the output current according to the bias current. The controller adjusts the tunable resistance and one of the first and the second tunable coefficients to achieve a voltage-current coefficient with different values, while the bias current and the output current are kept within a fixed current range.

Abstract: A first resistance element is coupled between a first rectifying element and an output node at which a reference voltage is generated. Second and third resistance elements are coupled in series between a second rectifying element and the output node. A differential amplifier outputs a control voltage corresponding to a difference between a first voltage generated at a connection point of the first rectifying element and the first resistance element and a second voltage generated at a connection point of the second resistance element and the third resistance element. A control circuit supplies a control current corresponding to the control voltage from the differential amplifier. A start-up circuit causes, by supplying a start-up current to the output node in response to supply of a power supply voltage, transition from a first stable state to a second stable state.

Abstract: A system that has low power recovery capabilities, the system includes: a switch that is adapted to provide a gated power supply to a power gated circuit in response to a control current; and a control signal generator adapted to control an intensity of the control current in response to a reception of a low power period end indicator, a value of the continuous supply voltage at a port of the control signal generator, a value of the gated supply voltage and an output signal of a high switching point buffer that is inputted by the gated supply voltage.

Abstract: A bandgap reference circuit provided for generating an output reference substantially independent of temperature and power includes a first reference signal generator, a first impedance, a second reference signal generator and a second impedance. The first reference signal generator can generate a first reference signal proportional to absolute temperature. The second reference signal generator generates a second reference signal complementary to absolute temperature according to the first reference signal. The second impedance, the serially-coupled first impedance and second reference signal generator, and the first reference signal generator are coupled in parallel between two nodes. The bandgap reference circuit outputs the output reference voltage through the two nodes. According to an embodiment of the invention, the bandgap reference circuit can be implemented by an additional circuit of lower complexity to obtain a lower reference voltage.

Abstract: A bandgap reference voltage generating circuit, includes: at least two bipolar transistors; an operational amplifier; a first PMOS transistor; and a second PMOS transistor whose source is connected to the upper limit power supply voltage and which supplies the reference current to the bipolar transistors. Further, the bandgap reference voltage generating circuit includes a third PMOS transistor whose source is connected to the upper limit power supply voltage; a fourth PMOS transistor whose source is connected to the upper limit power supply voltage and gate is connected to a drain of the third PMOS transistor; a first NMOS transistor whose source is connected to the lower limit power supply voltage and drain is connected to a drain of the fourth PMOS transistor; and a second NMOS transistor whose drain is connected to the operational amplifier and gate is connected to the drain of the first NMOS transistor.

Abstract: A reference voltage generation circuit of the disclosure includes a first amplifier circuit and a second amplifier circuit. The first amplifier circuit includes a first input stage including two npn transistors or two NMOS transistors having base terminals or gate terminals to which a variable voltage and a predetermined lower limit voltage are inputted. A first output stage includes a pnp transistor or a PMOS transistor having an emitter terminal or a source terminal connected to an output terminal of a reference voltage. A first amplifier stage controls the first output stage for equalizing the higher one of the variable voltage and the lower limit voltage with the reference voltage.

Abstract: A semiconductor integrated circuit includes an internal reference voltage generation unit configured to generate an internal reference voltage; a high voltage generation unit configured to pump an external driving voltage based on the internal reference voltage applied from the internal reference voltage generation unit, and generate a high voltage having a specified level; and a reference voltage transfer unit configured to generate a test reference voltage from a reference voltage in a package test mode to correspond to a change in a driving operation of the external driving voltage applied from outside, and monitor and force the internal reference voltage.

Abstract: The clock circuit of an integrated circuit operates with tolerance of variation in power. A compensation circuit is powered by a supply voltage. The compensation circuit generates a compensated voltage reference, which is compensated for variation in the supply voltage. The compensated voltage reference is compared by comparison circuitry against an output of timing circuitry, to determine timing of the clock signal.

Abstract: A threshold voltage generating circuit includes a main control circuit and a biasing circuit connected with the main control circuit. The main control circuit includes a first switching element, a second switching element connected with the first switching element, a third switching element connected with the second switching element, and a first operational amplifier connected with the third switching element, wherein an output end of the first operational amplifier outputs a threshold voltage. The threshold voltage generating circuit can generate the more precise threshold voltage.

Abstract: This document discloses low variation resistor devices, methods, systems, and methods of manufacturing the same. In some implementations, a low-variation resistor can be implemented with a metal-oxide-semiconductor field-effect-transistor (“MOSFET”) operating in the triode (e.g., ohmic) region. The MOSFET can have a source that is connected to a reference voltage (e.g., ground) and a gate connected to a gate voltage source. The gate voltage source can generate a gate voltage that varies in proportion to changes in the temperature of an operating environment. The gate voltage variation can, for example, be controlled so that it offsets the changes in MOSFET resistance that are caused by changes in temperature. In some implementations, the gate voltage variation offsets the resistance variance by offsetting changes in transistor mobility that are caused by changes in temperature.

Abstract: A reference voltage generation circuit comprises: a first depletion mode FET; a second depletion mode FET; a first resistor; a first bipolar transistor; a second resistor; a second bipolar transistor; a third bipolar transistor; a third resistor; a third depletion mode FET having its drain connected to a second end of the first resistor and to the collector of the first bipolar transistor; and a fourth bipolar transistor having its base and collector connected to the gate and the source of the third depletion mode FET, and its emitter grounded, wherein source voltage of the second depletion mode FET is output as a reference voltage.

Abstract: An electronic device includes a cascade of a plurality of transistors. Each transistor of the cascade receives an input voltage at a first terminal of its source/drain channel and receives a sampling clock signal at a control gate. The second terminal of the source/drain path of a first transistor drives a sampling capacitor. The second terminal of the source/drain channel of each subsequent transistor is connected to a backgate of a previous transistor. The backgate of the last transistor is connected to a supply voltage level. The second terminals of the subsequent transistors may be connected to corresponding buffer capacitors. The backgate of the last transistor may be supplied with the input during sampling and the supply voltage level at other times.

Abstract: A reference voltage generation circuit includes a first current-mirror circuit including a first MOS transistor connected to a first power source and a second MOS transistor of the first conductive type connected to the first power source; a second current-mirror circuit including a third MOS transistor and a fourth MOS transistor; a first resistor connected to the first node; a first bipolar transistor having a collector connected to the first resistor, an emitter connected to a second power source, and a base connected to the first node; a second bipolar transistor having a collector connected to the second node, an emitter connected to the second power source, and a base connected to the first bipolar transistor; a fifth MOS transistor connected between the first power source and an output terminal; and a third resistor connected between the output terminal and the second power source.

Abstract: A circuit for generating a band gap reference voltage (VREF) includes circuitry (I3×7) for supplying a first current to a first conductor (NODE1) and a second current to a second conductor (NODE2). The first conductor is successively coupled to a plurality of diodes (Q0×16), respectively, in response to a digital signal (CTL-VBE) to cause the first current to successively flow into selected diodes. The second conductor is coupled to collectors of the diodes which are not presently coupled to the first conductor. The diodes are successively coupled to the first conductor so that the first current causes the diodes, respectively, to produce relatively large VBE voltages on the first conductor and the second current causes sets of the diodes not coupled to the first conductor to produce relatively small VBE voltages on the second conductor. The relatively large and small VBE voltages provide differential band gap charges (QCA-QCB) which are averaged to provide a stable band gap reference voltage (VREF).

Abstract: A low drop-out DC voltage regulator regulates a voltage from a DC supply and includes: a pass device controllable to maintain a voltage at an output of the regulator and arranged to provide a first current from the DC supply, at least part of said first current being provided to a load coupled to the output of the regulator; and a current regulator coupled to said pass device and to the output of the regulator. The current regulator is arranged to conduct a second current controllable such that the first current through said pass device remains constant irrespective of variations in a load current to said load.

Abstract: A reference voltage circuit that obtains a precisely constant voltage by compensating a temperature variation of a reference voltage circuit using band gap voltage. A p-type MOS transistor (PNP) outputs a reference voltage according to a control voltage, and provides respective PNPs having diode connections with currents corresponding to the reference voltage. A temperature compensation unit adds compensation currents proportional to the second power of absolute current to currents flowing in the respective PNPs, so that both voltages generated corresponding to the currents flowing in the respective PNPs become the same in the case where the band gap unit has temperature characteristics including a peak value. The band gap unit has a differential amplifier for outputting the control voltage. In the case where the band gap unit has a bottom value, the compensation unit subtracts the above compensation currents from the currents flowing in the respective PNPs.

Abstract: Low noise bandgap voltage references using a cascaded sum of bipolar transistor cross coupled loops. These loops are designed to provide the total PTAT voltage necessary for one and two bandgap voltage references. The PTAT voltage noise is the square root of the sum of the squares of the noise voltage of each transistor in the loops. The total noise of the reference can be much lower than approaches using two or 4 bipolar devices to get a PTAT voltage and then gaining this PTAT voltage to the required total PTAT voltage. The cross coupled loops also reject noise in the current that bias them. Alternate embodiments are disclosed.

Abstract: A temperature corrected voltage bandgap circuit is provided. The circuit includes first and second diode connected transistors. A first switched current source is coupled to the one transistor to inject or remove a first current into or from the emitter of that transistor. The first current is selected to correct for curvature in the output voltage of the bandgap circuit at one of hotter or colder temperatures.

Abstract: A system includes a device configured to operate in a first mode and a second mode. The device includes a first circuit configured to receive a first band gap voltage potential from a first band gap circuit when the device is operating in the first mode, and a second circuit configured to receive a second band gap voltage potential from a second band gap circuit when the device is operating in the second mode. The device is configured to generate a mode select signal to selectively turn on and off the first band gap circuit and the second band gap circuit. A calibration circuit is configured to compare the second band gap voltage potential to the first band gap voltage potential, output a calibration signal to the second band gap circuit to adjust the second band gap voltage potential based on the comparison, and turn off the first band gap circuit in response to the second band gap voltage potential being within a predetermined range of the first band gap voltage potential.

Abstract: A reference voltage circuit includes a first amplifier configured to output a reference voltage, a second amplifier coupled to the first amplifier, an offset adjustment voltage generation circuit, a first load device and a first pn junction device, and second and third load devices and a second pn junction device. The offset adjustment voltage generation circuit is configured to generate a voltage which is input to the third and fourth input terminals of the second amplifier, and reduce an offset voltage between the first and second input terminals of the first amplifier through the second amplifier. The first input terminal is coupled to a coupling node of the first load device and the first pn junction device, and the second input terminal is coupled to a coupling node of the second load device and the third load device.

Abstract: The circuit arrangement for the supply of voltage comprises a control arrangement (2), a charge pump (14), a comparator (25) and a ramp signal generator (30). A power supply voltage (Vdd) can be fed to the input of the charge pump (14). The input of the charge pump (14) is coupled to a first output (5) of the control arrangement (2), and comprises an output (17) for the supply of an output voltage (VHv). A first input (26) of the comparator (25) is coupled to the output (17) of the charge pump (14), while the output is coupled to a first input (3) of the control arrangement (2) in order to supply a comparator signal (Vc). The input of the ramp signal generator (30) is connected to a second output (6) of the control arrangement (2), while its output is connected to a second input (27) of the comparator (25) in order to deliver a reference output voltage (Vref_out).

Abstract: An integrated circuit has an untrimmed bandgap generation circuit; and a bandgap generation circuit coupled to the untrimmed bandgap generation circuit. The bandgap generation circuit has a current source controlled by the untrimmed bandgap generation circuit and coupled in series with a resistor and a first bipolar diode device, one or more of bipolar diode devices, each bipolar diode device coupled in parallel with the first bipolar diode device, wherein a trimmed bandgap reference voltage output of the integrated circuit is a function of the number of bipolar diode devices.

Abstract: Disclosed is an external regulator reference voltage generator circuit that precisely controls the supply voltage applied to core logic to optimize the operational characteristics of the core logic 120 without using excessive power. An adaptive voltage and scaling optimization circuit 124 is used to detect the operating parameters of the core logic 120 and generate a voltage control signal to control a reference voltage regulator. The reference voltage regulator generates a regulator reference voltage in response to the voltage control signal that controls an external regulator which, in turn, generates the supply voltage.

Abstract: A dimming buck type light emitting diode (LED) driving apparatus includes a main switch controlling a driving current flowing into an LED; a current detector detecting a driving current flowing into the LED; a power level determination unit determining a level of the driving power; a dimming capacitor for dimming control; a dimming control unit controlling charging and discharging of the dimming capacitor according to a power level determination signal and an enable signal; a reset circuit unit generating a reset signal according to a detection voltage from the current detector and a voltage of the dimming capacitor; a pulse generation unit generating a pulse signal; and a latch set by the pulse signal of the pulse generation unit and reset by the reset signal of the reset circuit unit to generate a switching signal, and turning on and off the main switch using the switching signal.

Abstract: The disclosure relates to a method for generating a setpoint voltage in an integrated circuit, comprising generating a substantially constant reference voltage, and generating from the reference voltage, a setpoint voltage comprising a component equal to the highest threshold voltage of all the CMOS transistors of a circuit of the integrated circuit and a component which may be equal to zero. The disclosure applies in particular to the provision of a power supply voltage of a circuit based on CMOS transistors.

Abstract: Bandgap reference circuit, comprising a voltage generator (VG) designed to produce a voltage or a current proportional to absolute temperature, a supply circuit (SC), designed to produce a supply for operating the voltage generator (VG), comprising a bias element (BS) and a control element (CS), and a bias circuit (BC), designed to produce a bias for operating the voltage generator (VG), comprising a bias element (BB) and a control element (CB). At least one of the control element (CS) of the supply circuit (SC) and the control element (CB) of the bias circuit (BC) comprises a pseudomorphic high-electron-mobility transistor or a hetero-junction bipolar transistor and/or at least one of the bias element (BS) of the supply circuit (SC) and the bias element (BB) of the bias circuit (BC) comprises a long-gate pseudomorphic high-electron-mobility transistor or a resistor.

Abstract: Provided is a reference voltage circuit capable of generating a temperature-independent reference voltage more stably. Each of N-type metal oxide semiconductor (NMOS) transistors (1) and (2) has a source and a back gate that are short-circuited, and hence threshold voltages (Vth1) and (Vth2) of the NMOS transistors (1) and (2) respectively depend only on process fluctuations in the NMOS transistors (1) and (2) and not on process fluctuations in other elements. As a result, a temperature-independent reference voltage (Vref) may be generated more stably.

Abstract: Disclosed is a start-up circuit that can stably and rapidly start up a bandgap reference voltage generating circuit when the bandgap reference voltage generating circuit is switched from a sleep mode to an operation mode, even if a difference in electrical characteristic, such as DC offset or the like, occurs due to, e.g, a physical difference between input transistors of an operational amplifier.

Abstract: A current supply circuit provides current that is substantially invariant with voltage supply and temperature changes. The current supply circuit has an input node connectable to a voltage supply and an output node operable to provide an output current. The current supply circuit includes a current source circuit coupled to a reference voltage node and configured to provide the output current at the output node, wherein a voltage at the reference voltage node controls current output of the current source circuit. The current supply circuit also includes a reference-setting circuit coupled to the reference voltage node and operable to establish a reference current level of the current source circuit, a common-emitter circuit coupled to the input node, and an emitter-follower circuit coupled to the input node, the emitter-follower circuit having an input coupled to an output of the common-emitter circuit and an output coupled to the reference voltage node.

Abstract: A charging circuit charges a secondary battery by using a first direct current power supply that generates and outputs a first voltage. A highest voltage among the first voltage of the first direct current power supply, a second voltage generated from power supplied from outside, and a secondary battery voltage of the secondary battery is supplied as a power supply to the charging circuit.

Abstract: A method of controlling a clock signal with a print controller is provided. In response to receiving an external signal, the print controller determines the number of cycles of a clock signal generated by a ring oscillator of the print controller during a predetermined number of cycles of the external signal or the number of cycles of the external signal during a predetermined number of cycles of the clock signal and outputs the determined number of cycles to an external circuit. In response to receiving a trim value from clock trim circuitry of the print controller which trims the frequency of the clock signal based on the determined number of cycles from the external circuit, the trim value is stored in memory of the print controller. The clock trim circuitry is controlled to trim the frequency of the clock signal generated by the ring oscillator using the trim value.

Abstract: A voltage generating circuit for generating a plurality of associated voltages includes a constant current source for generating a constant current; a plurality of resistors connected in series to the constant current source in series for generating a plurality of associated reference voltages; and a first controlled switch connected to a first resistor in parallel, wherein the plurality of associated reference voltages are changed by optionally conducting the first controlled switch to control the flow of the constant current through the first resistor.

Abstract: A chopper stabilized bandgap voltage reference circuit comprises current mirror circuitry mirroring first and second currents into first and second networks to generate a forward diode voltage signal and a PTAT (proportional to absolute temperature) component signal, and a third current having a derived temperature coefficient into a third network to generate a reference voltage signal for a regulator. An amplifier amplifies a differential signal of the forward diode voltage signal and the PTAT component signal to output a fourth current to control the first and second currents. According to a chopper clock, a modulator modulates the differential signal to be supplied to the amplifier and a demodulator demodulates the fourth current. A gain loop compensation circuit is coupled to the demodulator to compensate the amplifier, and filter the fourth current for noise components, and a bypass circuit is also provided to the third network for filtering the third current.

Abstract: A band gap reference circuit comprises a first branch (1) having a first transistor (Q1) and a first temperature-dependent resistive element (S0). A second branch of the band gap reference comprises a second transistor (Q2) having a different size compared to the first transistor (Q1). An output branch (3) comprises a second temperature-dependent resistive element (S1, S2), that second temperature-dependent resistive element being coupled to an output terminal (Vref). At least one of the first and second temperature-dependent resistive elements (S0, S1, S2) comprises a transistor (M2) being arranged in a current path of the respective branch (1, 3) and being controlled such that it operates in a linear region of its characteristics.

Abstract: Methods and apparatus are described that develop a reference voltage that is based on a difference between a threshold voltage of a first transistor and a threshold voltage of a second transistor, and further based on a difference between a gate overdrive voltage of the first transistor and a gate overdrive voltage of the second transistor.

Abstract: Provided is a band gap reference voltage circuit having an improved power supply rejection ratio. Owing to a voltage supply circuit (51), a power supply voltage (V5) does not depend on variation of a power supply voltage (Vdd). A voltage (V3?V2) which is generated across a resistor (41) and has a positive temperature coefficient is determined based not on the power supply voltage (Vdd) but on the power supply voltage (V5), and hence the voltage (V3?V2) does not depend on the variation of the power supply voltage (Vdd). As a result, the power supply rejection ratio of the band gap reference voltage circuit is improved.

Abstract: Embodiments of the invention concern a circuit for pulling a potential at a node towards a feed potential which is present at a potential feed. The circuit has a first transistor with a controllable conductive path and in addition a resistive element. The controllable conductive path of the first transistor and the resistive element are coupled in series between the potential feed and the node. Furthermore, the circuit has a control element configured to control the first transistor so that a resistance of the controllable conductive path of the first transistor can be changed depending on a voltage drop at the resistive element. Furthermore, a method for pulling a potential at a node towards a feed potential and an integrated circuit with a pad which is pulled to the feed potential in the absence of an information carrying signal which is received or send by a functional circuitry of the integrated circuit.