Instruments And Devices For Fault Testing Patents (Class 324/555)
  • Patent number: 8933721
    Abstract: An embodiment method of diagnosing a power source arrangement includes a plurality of n power sources connected in series between output terminals, wherein n?2. At least two different groups of power sources are selected from the power source arrangement. A voltage of each of the at least two different groups is measured between the output terminals. During the measurement of the voltage of one group, the power sources of the power source arrangement that do not belong to the one group are bypassed. The at least two measured voltages obtained through measuring the voltage of each of the at least two different groups or at least two voltages that are dependent on these at least two measured voltages are compared.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: January 13, 2015
    Assignee: Infineon Technologies Austria AG
    Inventor: Gerald Deboy
  • Patent number: 8933722
    Abstract: A measuring device is provided, the measuring device including: a power supply to provide electric power to a chip via at least one of a chip connection and a chip-carrier connection; a chip arrangement receiving portion configured to receive a chip arrangement, the chip arrangement including a chip and a plurality of chip-to-chip-carrier connections; a detection portion including: a plate; a detection circuit coupled to the plate and configured to detect an electrical signal from the plate; wherein the plate is configured such that it covers at least part of the chip arrangement; and wherein at least one chip-carrier connection is in electrical connection with the plate.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: January 13, 2015
    Assignee: Infineon Technologies AG
    Inventor: Ming Xue
  • Patent number: 8922224
    Abstract: An electronic system having a high speed signaling bus requiring training (calibration) of a calibrated item in a driver circuitry or a receiver circuitry for reliable operation. At manufacturing or in a secure location, secure calibration coefficients are determined for the electronic system and are stored in a non-volatile storage. During operation, the high speed signaling bus may be re-calibrated, resulting in a new currently active calibration coefficient for the calibrated item. A coefficient watchdog checks a new coefficient value selected by the re-calibration at present environmental conditions such as voltage and temperature against the secure calibration coefficients. If the new calibration coefficient value is the same as a calibration coefficient value in an acceptably close secure calibration coefficient, the new calibration coefficient is accepted; if not, a potentially probed warning is created by the coefficient watchdog.
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: December 30, 2014
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Ronald L. Billau, Roger J. Gravrok, Brian G. Holthaus, Darryl Solie
  • Patent number: 8912802
    Abstract: In a component-embedded circuit substrate having a plurality of capacitors embedded therein, the capacitors are connected in parallel, inspection electrodes are formed, and the inspection electrodes connect to respective terminal electrodes of the capacitor through via conductors. At the terminal electrodes of the capacitor, the connection position of the via conductors for connecting the inspection electrodes differs from the connection position of via conductors for connecting respective terminal electrodes of the capacitor.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: December 16, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Shigeo Sakurai, Tetsuo Saji
  • Patent number: 8912803
    Abstract: A DC high potential testing meter comprises first and second probes. The first probe comprises an insulated shield supporting an electrode extending from a distal end of the shield. A high voltage resistor and a high voltage diode in the shield are connected in series with the electrode. A capacitance formed by a metallic collar across the high voltage diode provides uniform voltage distribution along the high voltage diode. The second probe comprises an insulated shield supporting an electrode. A high voltage resistor in the shield is connected in series with the electrode. A meter comprises a housing enclosing an electrical circuit for measuring voltage across the electrodes and provides an output representing measured voltage.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: December 16, 2014
    Assignee: Honeywell International, Inc.
    Inventor: Vasu Mogaveera
  • Publication number: 20140361790
    Abstract: Provided is a test apparatus, a switch apparatus, and a drive circuit comprising a current source having one end thereof connected to a reference potential; a first switch connected between the current source and a first voltage source that outputs a first power supply voltage; a first output terminal that outputs a voltage between the first switch and the first voltage source; a power supply section that outputs a second power supply voltage when the first switch is ON and outputs a third power supply voltage, which is lower than the second power supply voltage, when the first switch is OFF; a second switch connected between the power supply section and the current source; and a second output terminal that outputs a voltage between the second switch and the power supply section.
    Type: Application
    Filed: June 11, 2013
    Publication date: December 11, 2014
    Applicant: ADVANTEST CORPORATION
    Inventors: Makoto NAKANISHI, Yoshiyuki HATA, Masahiko TAKIKAWA
  • Patent number: 8907679
    Abstract: A meter apparatus having three-phase judgment function includes a control unit, a multimeter measurement unit electrically connected to the control unit, a three-phase judgment unit electrically connected to the control unit, a first measurement jack electrically connected to the multimeter measurement unit and the three-phase judgment unit, a second measurement jack electrically connected to the multimeter measurement unit and the three-phase judgment unit, and a third measurement jack electrically connected to the multimeter measurement unit and the three-phase judgment unit.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: December 9, 2014
    Assignee: Brymen Technology Corporation
    Inventor: Po-Chao Tan
  • Patent number: 8896316
    Abstract: In a device having capacitive loads in which a plurality of capacitive loads are connected in parallel, power is supplied from an AC power source to a load group comprising the plurality of capacitive loads, the load group is divided into a plurality of small load groups, and a current detecting sensor for detecting a current which flows in at least one small load group at a side which is closer to the load side than a branch point at which the load group is divided into the plurality of small load groups and a current abnormality detecting part for determining an abnormality of a load by a current detecting signal which is detected by the current detecting sensor are equipped.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: November 25, 2014
    Assignee: Mitsubshi Electric Corporation
    Inventors: Kazutoshi Kurahashi, Takashi Kumagai, Taichiro Tamida, Hajime Nakatani, Daisuke Takauchi
  • Patent number: 8896323
    Abstract: Systems and methods for radiation-tolerant overcurrent detection are disclosed. In some embodiments, an integrated circuit may include a plurality of overcurrent detectors, each of the plurality of overcurrent detectors configured to detect a candidate overcurrent event. The integrated circuit may also include a voting circuit coupled to the overcurrent detectors, the voting circuit configured to indicate an overcurrent in response to receiving a selected number of candidate overcurrent events from the overcurrent detectors. At least one of the overcurrent detectors may be subject to detecting the candidate overcurrent in error, at least in part, due to exposure to ionizing radiation.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: November 25, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Charles Parkhurst, Mark Hamlyn
  • Patent number: 8896322
    Abstract: A method for dispensing and detecting solid pharmaceutical articles includes: forcing an article through a dispensing channel and past a sensor configured and positioned to detect the article passing through the dispensing channel, wherein the article includes one of the solid pharmaceutical articles; generating a detection signal using the sensor responsive to the article passing through the dispensing channel, wherein the detection signal indicates a time that the article takes to traverse the sensor; and determining whether the article is a complete article or an article fragment responsive to a comparison of the time indicated by the detection signal and an article fragment travel time representing an expected travel time for a complete article to traverse the sensor that is determined independent of physical attributes of the solid pharmaceutical articles.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: November 25, 2014
    Assignee: Parata Systems, LLC
    Inventor: James Robert Rivenbark, Jr.
  • Patent number: 8890540
    Abstract: A partial discharge test power supply system for an extra high voltage transformer comprises: an electric motor (1); an intermediate frequency generator (2) driven by the electric motor and outputting an intermediate frequency voltage; a middle transformer (9) receiving the intermediate frequency voltage and outputting a test voltage to be applied to a test sample (11) by a generator outlet (5); a low-voltage compensating reactor (8) connected between the intermediate frequency generator and the middle transformer; a high-voltage compensating reactor (10) connected between the middle transformer and the sample; wherein the electric motor and the intermediate frequency generator are arranged in a metal housing (100).
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: November 18, 2014
    Assignee: China Electric Power Research Institute
    Inventors: Guangfan Li, Jie Yang, Jinzhong Li, Xiaocen Hu, Shuqi Zhang, Yuewen Qi, Xiaoning Wang, Ninghua Wang
  • Patent number: 8884629
    Abstract: A digital sensing device includes a sensor diagnostic system for detecting sensor fault conditions. The sensor diagnostic system including an input multiplexer applying a first burnout current or a second burnout current to a selected input channel and a near-rail detector configured to detect when an input voltage of the digital sensing device is near a positive power supply or near a negative power supply. The burnout current injection is applied without interfering with the sensor data. In other embodiments, the sensor diagnostic system may further include an overload detector configured to detect an overflow or underflow condition at the analog-to-digital converter. The sensor diagnostic system may further include a window comparator to detect when the ADC digital output is near a zero digital value. Finally, the sensor diagnostic system may further include a sensor flag generator to generate data flags indicative of sensor fault conditions.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: November 11, 2014
    Assignee: National Semiconductor Corporation
    Inventors: D V J Ravi Kumar, Theertham Srinivas, Gururaj Ghorpade
  • Patent number: 8878546
    Abstract: An apparatus for quickly determining a fault in an electric power system includes a current transformer, a current determination unit and a fault determination unit. The current transformer detects current supplied to the electric power system and outputs a current detection voltage. The current determination unit respectively compares the current detection voltage, the first-order differential voltage of the current detection voltage and the second-order differential voltage of the current detection voltage with predetermined first, second and third reference voltages. The fault determination unit determines whether a fault occurs based on the compared result of the current determination unit and generates a trip signal when it is determined that the fault has occurred.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: November 4, 2014
    Assignee: LSIS Co., Ltd.
    Inventors: Young Woo Jeong, Hyun Wook Lee
  • Patent number: 8872524
    Abstract: A package of a switching apparatus that houses an actuator having a movable contact point and in which a fixed contact point, which is electrically connected to or disconnected form the movable contact point, is accurately formed. Provided is a switching apparatus comprising a first substrate provided with a via that electrically connects a top surface thereof and a bottom surface thereof, while maintaining an air-tight state between the top surface and the bottom surface; a second substrate provided on the first substrate and in which is formed a through-hole that houses an actuator; and a third substrate provided on the second substrate and supporting the actuator, which has a moveable contact point.
    Type: Grant
    Filed: October 23, 2011
    Date of Patent: October 28, 2014
    Assignee: Advantest Corporation
    Inventors: Hisao Hori, Yoshikazu Abe, Yoshihiro Sato
  • Patent number: 8872521
    Abstract: An electrical parameter detection device is configured for detecting electrical parameters of a peripheral component interconnect (PCI) connector including a plurality of power pins. The electrical parameter detection device includes a processor module, a first detection module, and a second detection module. The processor module continuously detects voltage values of electric potentials provided by each of the power pins of the PCI connector using the first detection module, and determines time sequences of the electric potentials according to the voltage values of the electric potentials. Furthermore, the processor module detects the amount of power provided by each of the power pins of the PCI connector using the second detection module.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: October 28, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Ya-Jun Pan, Qi-Yan Luo, Peng Chen, Song-Lin Tong
  • Publication number: 20140253146
    Abstract: Disclosed herein are various embodiments of electrical test switches. According to one embodiment, a test switch may include a switch lever, a test port configured to directly couple to a standard connector, a relay port, a field port, and an insulated frame configured to electrically insulate at least some electrically conductive portions of the test port, the relay connector, and the field connector from contact by a user. A user may actuate the switch lever in order to reconfigure the electrical test switch from a first configuration to a second configuration. In the first configuration, the test port contact is electrically isolated from the relay connector and the field connector is electrically connected to the relay connector. In the second configuration, the test port contact is electrically connected to the relay connector and the relay connector is electrically isolated from the field connector.
    Type: Application
    Filed: March 7, 2013
    Publication date: September 11, 2014
    Applicant: SCHWEITZER ENGINEERING LABORATORIES, INC.
    Inventor: James R. Kesler
  • Patent number: 8829920
    Abstract: Disclosed are a circuit and method for amplifying the power of a multi-tone input signal. The multi-tone input signal is filtered separating out one signal having a tone at a fundamental frequency from another signal having additional tones at additional frequencies. The signal having the tone at the fundamental frequency is amplified and then filtered removing any harmonics added during amplification. The signals are then recombined generating a multi-tone output signal, wherein the tone at the fundamental frequency is boosted (i.e., has a higher power in the multi-tone output signal than in the multi-tone input signal), but the additional tones at the additional frequencies are not (i.e., the additional tones at the additional frequencies have essentially the same power in the multi-tone output and input signals). Also disclosed herein are embodiments of a testing system and method incorporating the above-described circuit to allow for testing of high power devices.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: September 9, 2014
    Assignee: International Business Machines Corporation
    Inventor: Randy L. Wolf
  • Patent number: 8810255
    Abstract: An in-situ system for detecting damage in an electrically conductive wire. The system includes a substrate at least partially covered by a layer of electrically conductive material forming a continuous or non-continuous electrically conductive layer connected to an electrical signal generator adapted to delivering electrical signals to the electrically conductive layer. Data is received and processed to identify damage to the substrate or electrically conductive layer. The electrically conductive material may include metalized carbon fibers, a thin metal coating, a conductive polymer, carbon nanotubes, metal nanoparticles or a combination thereof.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: August 19, 2014
    Assignee: The United States of America as Represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Martha K. Williams, Luke B. Roberson, Lanetra C. Tate, Trent M. Smith, Tracy L. Gibson, Scott T. Jolley, Pedro J. Medelius
  • Patent number: 8803543
    Abstract: A device is configured to evaluate electromagnetic characteristics of an integrated circuit. The device includes a fluid chamber, a first impeller, a second impeller, and a radio frequency measurement antenna. The fluid chamber is configured to receive the integrated circuit and to cool the integrated circuit. The first impeller is disposed within the fluid chamber and configured to distribute a first electromagnetic field produced by the integrated circuit within the fluid chamber along a first axis. The second impeller is within the fluid chamber and configured to distribute the first electromagnetic field produced by the integrated circuit within the fluid chamber along a second axis. The radio frequency measurement antenna is disposed proximate the fluid chamber and configured to measure an electric field and a magnetic field of the first electromagnetic field.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: August 12, 2014
    Assignee: Dell Products, LP
    Inventors: Todd W. Steigerwald, Jeffrey C. Hailey
  • Patent number: 8797046
    Abstract: A method of sharing a test resource at a plurality of test sites executes respective test flows at the plurality of test sites with an offset in time, the respective test flows accessing the test resource at a predetermined position in the test flow.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: August 5, 2014
    Assignee: Advantest (Singapore) Pte Ltd
    Inventors: Jochen Rivoir, Markus Rottacker
  • Patent number: 8791714
    Abstract: Fault detection apparatuses and methods for detecting a processing or hardware performance fault of a semiconductor production tool have been provided. In an exemplary embodiment, a method for detecting a fault of a semiconductor production tool includes sensing a signal associated with a test component of the production tool during operation of the production tool and converting the signal to an electronic test signal. A prerecorded signature signal corresponding to the test component is provided and the test signal and the prerecorded signature signal are compared.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: July 29, 2014
    Assignee: Novellus Systems, Inc.
    Inventor: Keith John Hansen
  • Patent number: 8773144
    Abstract: To detect whether energy accumulated in an inductive load section has been discharged. Provided is a test apparatus that tests a device under test, comprising a power supply section that generates a power supply voltage to be supplied to the device under test; an inductive load section that is provided in a path between the power supply section and the device under test; a housing section that houses a substrate that includes at least the inductive load section; and a lock maintaining section that keeps an opening/closing section, which allows an operator to access the substrate within the housing section, in a locked state when a voltage at a predetermined position on the substrate is greater than a set voltage.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: July 8, 2014
    Assignee: Advantest Corporation
    Inventor: Kenji Hashimoto
  • Patent number: 8770437
    Abstract: An apparatus for dispensing solid articles includes a housing and at least one vacuum source. The housing defines a hopper chamber to hold the articles and a dispensing channel fluidly connected to the hopper chamber. The dispensing channel has an inlet and an outlet defining a dispensing flow path therebetween. The vacuum source is adapted to provide a vacuum pressure and induce a gas flow in the housing. The apparatus is configured to generate a forward drive gas flow from the vacuum pressure and induced gas flow, and the forward drive gas flow conveys articles through the dispensing channel along the dispensing flow path in a direction from the inlet to the outlet to dispense the articles.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: July 8, 2014
    Assignee: Parata Systems, LLC
    Inventor: Richard D. Michelli
  • Publication number: 20140184240
    Abstract: In this invention, a test system includes a tester and a switching module for connecting any pin to the tester for testing a device-under-test (DUT), the test system has a rectifying device between the ground of the DUT and the ground of the switching module in order to isolate the DUT from the switching module, thereby blocking unwanted current flowing between the DUT and the switching module to ensure the correctness of the testing. Since the ground of the switching module is not directly connected to the ground of the DUT and the tester, the rectifying device will keep the voltage difference between the ground of the switching module and the DUT in a range between zero and the cut-in voltage of the rectifying device, thereby allowing single-ended signals to be used between the switching module and the tester or the DUT.
    Type: Application
    Filed: December 30, 2012
    Publication date: July 3, 2014
    Inventors: CHING-TSUNG CHEN, WEICHUNG CHEN
  • Patent number: 8766653
    Abstract: A measuring device for measuring insulation resistance of an electric vehicle includes a measuring unit, a voltage detecting unit, and a control unit. The measuring unit includes a first tap, a second tap, a switch, and a measuring resistor. The first tap is to be electrically coupled to a high potential side of a high voltage system. The second tap is to be electrically coupled to a ground side of a low voltage system. The switch and the measuring resistor are connected in series between the first tap and the second tap. The voltage detecting unit is for detecting a voltage formed between the first tap and the second tap. The control unit is operable for controlling ON and OFF states of the switch, and is configured to determine the high potential insulation resistance and the low potential insulation resistance after operating the switch in the ON and OFF states.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: July 1, 2014
    Assignee: Automotive Research & Testing Center
    Inventors: Chia-Cheng Tu, Jia-Sing Hsu
  • Patent number: 8769314
    Abstract: A test fixture includes a first RS-232 connector and a second RS-232 connector. The data terminal ready (DTR) pin of the first RS-232 connector is connected to the DTR pin of the second RS-232 connector, and the clear to send (CTS) pin of the first RS-232 connector is connected to the CTS pin of the second RS-232 connector. The DTR pins are further connected to a power pin of each of the test computers. The test fixture sets a high level voltage for the connected DTR pins, and sets a low level voltage for the connected CTS pins according to the commands of turning on the test computers sent by the control computer, to turn on the test computers. An auto shutdown software included in each of the test computers is executed to shut down the test computers.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: July 1, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Zhi-Chun Liang, Jun-Min Chen, Zhi-Jian Long, Fang Tian
  • Patent number: 8760171
    Abstract: The present invention relates to a method for determining partial discharges at an electrical component (10). In the case of the method, an electrical signal that comprises partial discharge pulses due to the partial discharges at the electrical component (10) is detected. Through filtering of the electrical signal by means of n filters (18-20) having n differing filter characteristics, n filtered partial discharge signals are generated. Respectively one of the filtered partial discharge signals is assigned, respectively, to one of the n filters (18-20), n being greater than or equal to two. Finally, the partial discharges are determined by linking the n filtered partial discharge signals.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: June 24, 2014
    Assignee: Omicron Electronics GmbH
    Inventors: Caspar Steineke, Harald Emanuel, Ronald Plath
  • Patent number: 8756025
    Abstract: Methods and apparatus are provided related to thermal protection of electrical batteries. A sensor senses the temperature of a battery and a corresponding digital signal is digitally derived. Date, time and temperature data are written to storage media. A time-rate-of-change of the battery's temperature is determined and used to establish operational periodicity. Stored digital data can be communicated to another entity, temperature or time-rate-of-change values used to trigger an alarm or system shut-down, and so on. Electronic circuitry toggles between an active mode and a power-conserving sleep mode in accordance with periodic operating schedule.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: June 17, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Neel Banerjee, Anton Nicholas Clarkson
  • Patent number: 8749249
    Abstract: A test handler comprises a package support for holding an electronic device in a certain orientation and for transporting the electronic device to a testing station for testing the electronic device. An orientation correction device is actuable and operative to engage the package support and to rotate the package support so as to change the orientation of the electronic device.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: June 10, 2014
    Assignee: ASM Assembly Automation Ltd
    Inventors: Chak Tong Albert Sze, Pei Wei Tsai, Wa Sing Tsang
  • Publication number: 20140139235
    Abstract: An automatic test equipment and a testing method thereof are disclosed. The automatic test equipment includes a test apparatus, a first control device, a first assisting device, and a second control device. The test apparatus is applied for testing a first object, wherein the test apparatus has a first cover. The first control device has an activating device. The first assisting device is electrically connected to the first control device. The second control device is electrically connected to the first control device and the test apparatus. When the activating device is activated, the first control device controls the first assisting device to lower the first cover and then the first control device transmits a first control signal to the second control device for allowing the test apparatus to test the first object.
    Type: Application
    Filed: May 20, 2013
    Publication date: May 22, 2014
    Applicant: Wistron Corporation
    Inventors: Chun-Kai WANG, Hai-Jun PENG
  • Patent number: 8729905
    Abstract: This invention relates to a method of detecting faults on an electrical power line (7) and a sensor (5) for use in such a method. Preferably, the sensor is a line-mounted sensor (5). The method comprises the initial step of determining an initial impedance profile for the power line (7), and thereafter the method comprises the subsequent steps of the line-mounted sensor (5) transmitting a conducted communication signal (41) along the power line, receiving a reflected signal (43) particular to the transmitted communication signal and correlating the transmitted signal and the reflected signal. By correlating the signals, it is possible to determine the actual impedance of the power line. The actual impedance of the power line may then be compared with the initial impedance profile and it is possible to ascertain whether a fault exists on the power line. Preferably, the method uses an adaptive filter to determine the location of the fault.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: May 20, 2014
    Assignee: General Electric Company
    Inventors: Michael Anthony McCormack, Charles Brendan O'Sullivan
  • Publication number: 20140132281
    Abstract: The present disclosure concerns a state monitoring or diagnostics system, and also a method for monitoring the state of devices or for diagnosing devices, in particular for overvoltage protection devices, as well as a method for transmitting measured values. Each of the devices comprises a functional component to be monitored and a monitoring and transmitting apparatus, wherein the monitoring and transmitting apparatus consists solely of a resonator circuit made of passive electrical components with no microchip, in particular with no RFID transponder. The information to be interrogated resides in the resonant frequency of the resonator circuit.
    Type: Application
    Filed: June 21, 2012
    Publication date: May 15, 2014
    Applicant: PHOENIX CONTACT GMBH & CO KG
    Inventors: Roland Bent, Johannes Kalhoff
  • Patent number: 8723539
    Abstract: A test card includes a power interface, a controller, a test interface, and a test point. The test interface includes a power pin, a start pin, and a data signal pin. The power interface is connected to the controller and the power pin, and also connected to an external power to receive a work voltage. The controller transmits a turn-on signal to the start pin. The test point is connected to the data signal pin. When an interface of a motherboard is connected to the test interface, the power pin, the start pin, and the data signal pin are connected to corresponding pins of the interface of the motherboard. The motherboard outputs a data signal to the test point through the motherboard interface and the test interface after the controller receives the turn-on signal.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: May 13, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Xiao-Gang Yin, Wan-Hong Zhang, Zhao-Jie Cao, Guo-Yi Chen
  • Patent number: 8704529
    Abstract: A circuit test interface and a test method are disclosed. The circuit test interface may include a test voltage input pad, a test voltage output pad, and a plurality of input buffers. Each of the plurality of input buffers may have a first input terminal, a second input terminal, and an output terminal. The first input terminal of each respective input buffer may be coupled to one of a plurality of through-silicon vias (TSVs). The circuit test interface may further include a plurality of switch units. Each of the plurality of switch units may have a first terminal and a second terminal. The circuit test interface may further include a scan chain, coupled to both the output terminal of each of the plurality of input buffers and to the test voltage output pad.
    Type: Grant
    Filed: October 4, 2011
    Date of Patent: April 22, 2014
    Assignee: Nanya Technology Corporation
    Inventors: Bret Dale, Oliver Kiehl
  • Publication number: 20140097855
    Abstract: A testing arrangement for testing the electrical circuits of a terminal block assembly, comprising a generally rectangular testing unit housing formed of insulating material and containing a chamber, at least one connection device mounted in chamber and having an elongated connector body formed of insulating material and including center and end portions. An integral measuring tab portion extends downwardly from the body center portion for insertion into a testing opening contained in the terminal block assembly, and a pair of coplanar measurement portions extend upwardly from the connector body ends and terminating at different elevations, thereby to afford a compact testing arrangement. Two electrical circuit connecting portions are mounted on the connector body, each including an input conductive contact plate mounted on one side of said measuring tab portion, and an output contact mounted within one of said measurement portions for connection with one end of a testing component.
    Type: Application
    Filed: May 21, 2012
    Publication date: April 10, 2014
    Inventors: Frank Hackemack, Joerg Richts, Bernhard Jaschke
  • Patent number: 8689436
    Abstract: An align fixture for aligning an electronic component having a receptacle adapted to receive the electronic component and having a first abutting section and a second abutting section, the align fixture further having a first elastic unit and a second elastic unit, the first abutting section is flexibly mounted via the first elastic unit, and the second abutting section is flexibly mounted via the second elastic unit, and the first abutting section and the second abutting section are together adapted to floatingly engage the electronic component.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: April 8, 2014
    Assignee: Multitest Elektronische Systeme GmbH
    Inventors: Thomas Hofmann, Helmut Scheibenzuber
  • Publication number: 20140091810
    Abstract: An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.
    Type: Application
    Filed: December 5, 2013
    Publication date: April 3, 2014
    Applicant: Aehr Test Systems
    Inventors: Donald P. Richmond, II, Kenneth W. Deboe, Frank O. Uher, Jovan Jovanovic, Scott E. Lindsey, Thomas T. Maenner, Patrick M. Shepherd, Jeffrey L. Tyson, Mark C. Carbone, Paul W. Burke, Doan D. Cao, James F. Tomic, Long V. Vu
  • Patent number: 8680884
    Abstract: A circuit for detecting fault conditions in a supply circuit includes a monitoring circuit and a comparator circuit. The monitoring circuit is operable to output a detection signal related to a control signal for the switched mode power supply. The control signal may be configured to operate at least one switch of the supply circuit between alternating activated and deactivated states to supply power to a load. The comparator circuit is operable to compare the detection signal to a range defined by first and second thresholds and output a fault signal according to a relationship of the detection signal to the range over a time period. Related methods of operation are also discussed.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: March 25, 2014
    Assignee: Cree, Inc.
    Inventor: Joseph Paul Chobot
  • Patent number: 8680870
    Abstract: An apparatus and method for burning-in an electronic ballast for a lamp. The apparatus comprises a first stage for emulating an input impedance characteristic of a lamp for the electronic ballast and a second stage connected to the first stage for providing energy feedback to a power supply. An input of the first stage connects in use to the electronic ballast to be burnt-in. An output of the second stage connects in use to the power supply to provide energy feedback to said power supply from the electronic ballast being burnt-in. The energy-recyclable burn-in apparatus can emulate the lamp characteristics from start up to the steady state, process high-frequency ballast output power and recycle the power back into the power grid. The burn-in method includes operating the apparatus for a predetermined period of time such that a voltage applied to the electronic ballast simulates a steady-state operation of a lamp for the electronic ballast.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: March 25, 2014
    Assignee: City University of Hong Kong
    Inventors: Shu Hung Henry Chung, Nan Chen
  • Patent number: 8659302
    Abstract: Voltage is detected on both sides of a protection fuse within a thermostat, such that a determination can be made as to the status of the fuse. When a blown fuse is detected, the user can be notified via (1) an error message on the thermostat display, and/or (2) a message on another device such as a mobile device and/or web-client device. According to some embodiments the thermostat manufacturer is notified via network connection. According to some embodiments drain voltage is measured on MOSFETs used in the thermostat for switching on and off HVAC functions. If an over-current is detected on a FET switch, it immediately turned off and a fault indictor is sent to the microcontroller. The FET switch remains “off” until it is re-enabled under control of the microcontroller.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: February 25, 2014
    Assignee: Nest Labs, Inc.
    Inventors: Daniel Adam Warren, Brian J. Conner, Ian C. Smith
  • Publication number: 20140049265
    Abstract: Disclosed is a device under test (DUT) tester using a redriver. The DUT tester more effectively tests the DUT, which is a predetermined semiconductor device, by applying an electrical signal to the DUT and measuring the electrical signal. The DUT tester includes a DUT test unit, a printed circuit board (PCB) provided therein with connectors for the connection with the DUT test unit, one DUT or more horizontally arranged on the PCB, and redrivers horizontally provided under the PCB and one-to-one matched with one DUT or more to compensate for the distortion of the signal integrity of test signals caused according to the variation of the transmission distance.
    Type: Application
    Filed: June 19, 2013
    Publication date: February 20, 2014
    Inventor: Jin An OH
  • Patent number: 8648610
    Abstract: A signal input circuit includes: a signal input device having a signal input terminal; an inspection capacitor connected between the signal input terminal and a reference potential; a connection unit connecting/disconnecting an inspection path between the inspection capacitor and the signal input terminal; a charge and discharge unit charging/discharging the inspection capacitor; and a determination processing unit carrying out a terminal failure detection processing. The determination processing unit controls the connection unit to disconnect the inspection path and controls the charge and discharge unit to set the voltage of the inspection capacitor to a terminal inspection voltage in a charge and discharge procedure, controls the connection unit to connect the inspection path in a continuity establishing procedure, and detects the terminal failure at the signal input terminal or a communication path from the signal input terminal based on a voltage of the inspection path.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: February 11, 2014
    Assignee: Denso Corporation
    Inventors: Yuuki Mikami, Toru Itabashi, Yoshiharu Takeuchi, Kenji Mochizuki, Naoya Tsuchiya
  • Patent number: 8648609
    Abstract: A testing system utilizing a common power supply and a display device to test different types of a main board circuit is disclosed. The testing system includes a power supply device for outputting a predetermined power; a liquid crystal display for receiving a control signal from the main board circuit to perform a testing procedure; and an adapter. The adapter includes a first circuit coupled electrically between the power supply device and the main board circuit for converting the predetermined power into a power needed by the main board circuit, and a second circuit coupled electrically between the main board circuit and the liquid crystal display for converting a control signal generated by the main board circuit into a signal format required to perform the testing procedure on the liquid crystal display.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: February 11, 2014
    Assignee: Wistron Corporation
    Inventors: Kai-Fu Shi, Zhen-Wu Xu
  • Publication number: 20140028326
    Abstract: A DA conversion apparatus comprising a DA converting section that includes a plurality of analog elements; and a control section that generates first shift data and second shift data by shifting the input digital data by respective shift amounts of M bits and N bits, and controls the analog elements based on the first shift data and the second shift data, wherein the control section changes a control state for each of the common analog elements according to the bit shift amounts M and N in the control section, between at least two control states including a control state in which the common analog element is controlled according to higher-order bits of the first shift data and a control state in which the common analog element is controlled according higher-order bits of the second shift data.
    Type: Application
    Filed: May 10, 2013
    Publication date: January 30, 2014
    Inventors: Masayuki KAWABATA, Yasuhide KURAMOCHI
  • Publication number: 20140015555
    Abstract: A hardware-in-the-loop (HIL) electrical grid simulation system and method that combines a reactive divider with a variable frequency converter to better mimic and control expected and unexpected parameters in an electrical grid. The invention provides grid simulation in a manner to allow improved testing of variable power generators, such as wind turbines, and their operation once interconnected with an electrical grid in multiple countries. The system further comprises an improved variable fault reactance (reactive divider) capable of providing a variable fault reactance power output to control a voltage profile, therein creating an arbitrary recovery voltage. The system further comprises an improved isolation transformer designed to isolate zero-sequence current from either a primary or secondary winding in a transformer or pass the zero-sequence current from a primary to a secondary winding.
    Type: Application
    Filed: July 16, 2013
    Publication date: January 16, 2014
    Applicant: Clemson University
    Inventors: John Curtiss Fox, Edward Randolph Collins, JR., Nikolaos Rigas
  • Publication number: 20140015562
    Abstract: A performance characteristic monitoring circuitry includes a first delay circuitry providing a first delay path, where transmission of a data value over that first delay path incurs a first delay that varies in dependence on the performance characteristic. Reference delay circuitry is also included to provide a reference delay path, where transmission of the data value over the reference delay path incurs a reference delay. The reference delay circuitry includes components configured to provide a capacitive loading on the reference delay path in order to produce a self-compensating effect on the reference delay that causes the reference delay to be less sensitive than the first delay to variation in the performance characteristic. Comparison circuitry is then used to generate the output signal of the monitoring circuitry in dependence on a comparison of the first delay and the reference delay.
    Type: Application
    Filed: July 13, 2012
    Publication date: January 16, 2014
    Applicant: ARM LIMITED
    Inventors: Sandeep Dwivedi, Betina Hold
  • Publication number: 20140009168
    Abstract: An apparatus may include a delay line having a first delay value corresponding to first operating conditions of the apparatus and a second delay value corresponding to second operating conditions of the apparatus. A monitoring circuit may monitor a time taken for a first clock edge of a clock signal to propagate through the delay line. A determining circuit may determine whether operating conditions of the apparatus are acceptable in response to the time taken.
    Type: Application
    Filed: July 3, 2013
    Publication date: January 9, 2014
    Applicant: STMicroelectronics (R&D) Ltd.
    Inventor: Mark TRIMMER
  • Publication number: 20140002105
    Abstract: There is provided a semiconductor switch apparatus that can handle a wide range of input voltages. The switch apparatus includes a main switch that is provided between a first terminal and a second terminal, and a switch controller that, to turn on the main switch, supplies the same gate-source voltage to the main switch irrespective of a direction of a current flowing through the main switch. To turn on the main switch, the switch controller supplies the gate-source voltage that is determined based on at least one of a voltage of the first terminal and a voltage of the second terminal to a gate of the main switch.
    Type: Application
    Filed: April 19, 2013
    Publication date: January 2, 2014
    Applicant: ADVANTEST CORPORATION
    Inventors: Yoshiyuki HATA, Makoto NAKANISHI, Masahiko TAKIKAWA
  • Patent number: 8618810
    Abstract: A test system for testing a unit such as multiple solid oxide fuel cells. The test system includes a thermal test chamber in which a non-contact electrostatic voltage probe is mounted to scan the solid oxide fuel cells. The test system includes a detector coupled to the voltage probe to produce an output signal or display based on the measured voltages. The measured voltages are processed to compute a representative voltage for each fuel cell and to identify any defective fuel cells based on the measured voltages. The test system may be used during manufacture of solid oxide fuel cell stacks for cost effective testing to lower manufacturing costs.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: December 31, 2013
    Assignee: Teradyne, Inc.
    Inventors: Anthony J. Suto, Alexander H. Slocum, R. Scott Ziegenhagen
  • Patent number: 8604815
    Abstract: An I/O pin is connected to a DUT via a transmission line. A driver generates a test signal to be supplied to the DUT. A driver-side switch and an output resistor are arranged in series between the driver and the I/O pin. A comparator is arranged such that the input terminal thereof is connected to the I/O pin, and configured to judge the level of a signal output from the DUT. A short-circuit switch is arranged between the I/O pin and the ground terminal.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: December 10, 2013
    Assignee: Advantest Corporation
    Inventor: Shuji Nojima