Abstract: Methods, systems, and apparatus, including computer program products, for analyzing video signals. An apparatus includes a video interface operable to receive a video signal, a network interface operable to receive a test parameter from a network source, and a processor operable to couple to the video interface and the network interface and to perform a test on a video signal received from the video interface in accordance with the test parameter.

Abstract: A test board can be inserted to a test head and removed from the test head while the connecting section for mounting thereon devices under test is mounted on the upper portion of the test head. A test head for retaining therein at least one test board for testing devices under test, includes: a casing provided with, on one side surface thereof, an opening through which the at least one test board is inserted and removed, the casing retaining therein the at least one test board with an upper side thereof oriented towards an upper surface of the casing; and a mounting member that guides a lower side of the at least one test board through the opening to a pre-set position, imposes an upward force to the lower side of the at least one test board, thereby mounting the at least one test board to the casing.

Abstract: A test apparatus comprising a plurality of test units that test a device under test; a plurality of housing sections that respectively house the test units therein; a plurality of opening/closing sections that are disposed respectively in the housing sections and that expose the test units to the outside or isolate the test units from the outside; and a control section that independently controls whether each of the opening/closing sections is allowed to be opened. The control section may allow test units that are not supplied with power to be exposed to the outside. For at least one of (i) a period during which one of the test units is performing a predetermined operation, (ii) a predetermined period before the period during which one of the test units is performing the predetermined operation, and (iii) a predetermined period after the period during which one of the test units is performing the predetermined operation, the control section may prohibit other test units from being exposed to the outside.

Abstract: An evaluation device 20 comprises a circuit element comprising respective pairs of inputs and outputs including several capacitances 25a-25c and resistances 26a-26d, one end of each being connected to both ends of the capacitances 25a-25c, wherein a resistance value of a signal input side is generally equal to that of a signal output side. The evaluation device 20 is further provided with a connecting terminal with an output device 10 for outputting signals to a device to be evaluated 30 on the signal input side, and is provided with a connecting terminal with the device to be evaluated 30 on the signal output side.

Abstract: To detect whether energy accumulated in an inductive load section has been discharged. Provided is a test apparatus that tests a device under test, comprising a power supply section that generates a power supply voltage to be supplied to the device under test; an inductive load section that is provided in a path between the power supply section and the device under test; a housing section that houses a substrate that includes at least the inductive load section; and a lock maintaining section that keeps an opening/closing section, which allows an operator to access the substrate within the housing section, in a locked state when a voltage at a predetermined position on the substrate is greater than a set voltage.

Abstract: Test system and method for analog-to-digital converter (ADC) based on a loopback architecture are provided to test an M-bit ADC. In the invention, an N-bit digital-to-analog converter (DAC) converts a digital input to a basic test signal, a segmentation circuit scales the basic test signal and superposes it with segmentation DC levels for providing corresponding segmented test signals, such that the ADC converts the segmented test signals to reflect result of testing. With the invention, practical loopback architecture of low-cost can be adopted for testing.

Abstract: An apparatus configured for built in self test (BIST) jitter measurement is described. The apparatus includes a time-to-voltage converter. The time-to-voltage converter generates a voltage signal proportional to timing jitter present in a clock/data signal input. The apparatus also includes feedback circuitry for the time-to-voltage converter. The feedback circuitry provides a ramp slope for the time-to-voltage converter. The apparatus further includes a calibration controller. The calibration controller provides control signals to the time-to-voltage converter for process-independent calibration. The apparatus also includes a sample-and-hold (S/H) circuit. The S/H circuit provides a set bias voltage to the time-to-voltage converter once calibration is complete.

Abstract: The present invention relates to a device for current measuring in power supply networks comprising transformers for measuring current, a signal processing apparatus arranged on a printed circuit board and screw fastenings for mounting the device. The cable ducts of the transformers are orientated parallel to the plane of the printed circuit board, which has openings flush to the cable ducts, and the screw fastenings are fastening tabs with mounting holes, spaced so standards-compliant mounting is possible. In an alternate embodiment, the cable ducts are orientated perpendicularly to the plane of the printed circuit board, the screw fastenings are constructed as an angle rail with cable outlets and standards-compliant mounting holes, and the printed circuit board is internally fastened on one side of the angle rail. In another alternate embodiment the transformers are installed with the printed circuit board in a common housing with fastening tabs and standards-compliant mounting holes.

Abstract: The current invention provides a shunt defect detection device that includes a device under test (DUT) that is fixedly held by a thermally isolating mount, a power source disposed to provide a directional bias condition to the DUT, a probe disposed to provide a localized power to the DUT from the power source, an emission detector disposed to measure a temporal emission from the DUT when in the directional bias condition, where the measured temporal emission is output as temporal data from the emission detector to a suitably programmed computer that uses the temporal data to determine a heating rate of the DUT and is disposed to estimate an overheat risk level of the DUT, where an output from the computer designates the DUT a pass status, an uncertain status, a fail status or a process to bin status according to the overheat risk level.

Abstract: A method for testing an electronics unit, especially an electronics unit of an apparatus for ascertaining and/or monitoring a process variable, wherein the electronics unit has a plurality of electrical components. At least a part of the electrical components is grouped into at least one group, and this group is supplied with a query signal. A response signal is received from the group, and the response signal is evaluated. Furthermore, the invention relates to an apparatus for determining and/or monitoring a process variable.

Abstract: A signal integrity test system and method uses an oscilloscope to test a signal on each test point of a transmission line, obtains test parameter values of the signal on each test point, and compares the test parameter values with preset standard values. If any test parameter value does not match a corresponding preset standard value, a time-domain reflectometer is used to test an impedance value of the test point. If the impedance value matches a standard impedance value of the transmission line, the system and method determines the signal on the test point satisfies integrity requirements.

Abstract: Electrical currents are detected and analyzed across structural members in a structural joint, such as a fastener of a vehicle. In some aspects, printed circuit boards etched with Rogowski coil circuits are inserted proximate the structural members in the structural joint. The Rogowski coil circuits may detect an electrical current as it flows through the structural joint. An integrator may integrate a transient current to generate an output signal, such as when the vehicle is subjected to an electrical charge. The output signal may be transmitted to an Integrated Vehicle Health Management (IVHM) system for analysis. In various aspects, the IVHM system may enable recording and reporting of various aspects of the current to enable maintenance, inspection, or real time/near real time health assessment of the vehicle.

Abstract: A procedure for checking the operational capability of an electric circuit, which has a sensor module and a diagnosis mechanism with the sensor module including an integrated switching circuit, wherein the sensor module has at least one output terminal connected to the diagnosis mechanism and power supply terminals, and wherein an operating voltage is applied via cables to the power supply terminals. The sensor module is switched to a test mode, in which a communication test signal is emitted from the output terminal. This signal is read in by the diagnostic mechanism and compared with a tolerance band range, in order to verify that the communication with the sensor module is operational. In the event of operational communication, the operational capability of the switching circuit is tested.

Abstract: A system for testing an electronic device comprises a first output, a second output, and a third output connected to a positive input, an identification input, and a negative input of the electronic device, respectively. The system further comprises a switch comprising at least two dynamic contacts, each of which is connected to a resistor for the use of identification.

Abstract: A testing device is used to test the life of a connector of an electronic device. An external connector is plugged into the connector. The testing device includes a base, a fixing assembly for fixing the electronic device on the base, a driver, a pressing head driven by the driver and an adjusting assembly. The adjusting assembly is configured to adjust the position of the driver and the pressing head to align the pressing head with the external connector.

Abstract: A processing device is provided with a circuit connected to a first conductive portion and a second conductive portion. An AC voltage source produces an AC waveform voltage obtained by adding a bias voltage to an AC voltage for capacitance measurement. The AC waveform voltage is applied between the first conductive portion and the second conductive portion through the measurement probes. The moment the AC waveform voltage is applied to the circuit with a switch closed, an inrush current flows through the circuit based on a potential difference of the bias voltage. This inrush current causes dielectric breakdown in the conductive resin, thereby securing the continuity of the conductive resin. With the continuity of the conductive resin secured, a capacitance of the piezoelectric body is measured by the AC waveform voltage, and it is determined whether or not the piezoelectric body is normal.

Abstract: A test and measurement instrument including a plurality of channels, each channel configured to receive a corresponding input signal. Each channel includes a comparator configured to compare the input signal to a threshold for the channel; an edge detector configured to detect an edge of an output signal of the comparator; and a threshold controller configured to adjust the threshold for the channel in response to the edge detector.

Abstract: A testing apparatus is provided to test whether a distance between a first and a second portions of an object is eligible. The testing apparatus includes a worktable, a positioning mechanism to support the object, a pressing mechanism to secure the object, and an actuating mechanism. The actuating mechanism outputs signals to reflect the relative position of the correspond to-be-tested portion and the actuating mechanism, therefore a controlling device indicates whether the distance between the to-be-tested portion and the base plane is eligible or not according the outputting signals of the corresponding actuating mechanism.

Abstract: A sampling apparatus that converts an analog target signal in which the same waveform repeats into a digital value by sampling the target signal at each of a plurality of phases, and outputs the digital value. The sampling apparatus comprises a designating section that sequentially designates bits in the digital value as target bits, beginning with the most significant bits; a generating section that, for each designated target bit, generates a threshold value for determining a value of the target bit based on a determined value of a bit that is higher-order than the target bit in the digital value at each of the phases; and a converting section that, for each designated target bit, determines the value of the target bit in the digital value at each phase by comparing the target signal to an analog comparison signal corresponding to the threshold value at each phase.

Abstract: An RC test circuit includes an RC circuit, a digital rheostat, a control chip, and an oscillograph. The RC circuit includes a plurality of positive terminals and a plurality of negative terminals. The digital rheostat includes a plurality of rheostats each including a sliding terminal and a fixed terminal. The sliding terminals are correspondingly connected to the positive terminals while the fixed terminals are correspondingly connected to the negative terminals. The control chip is connected to the digital rheostat, and configured for controlling the digital rheostat to change the resistance of each rheostat. The oscillograph is connected to the RC circuit for displaying a waveform of the RC circuit.

Abstract: An open terminal detection device that detects an open terminal, including: a transistor that is supplied with a base current from a current source in which an amount of current supply decreases corresponding to an increase in an external impedance of the terminal; a diode that limits discharge of a base charge of the transistor; and an output circuit that outputs an output signal in coordination with on/off switching of the transistor.

Abstract: A system and method is provided for ground testing of a yaw system of a nacelle (3) prior to erection of a wind turbine (1). A portable transformer box (10) is provided which will allow the nacelle preparation team to operate the yaw and hydraulic systems while the nacelle is grounded prior to erection.

Abstract: In an anomaly monitoring device, in which an output signal from an encoder is input as an analog input signal via a wiring system, for detecting anomalies in the encoder or the wiring system, provided are a voltage level based device, a pulse number based device and a pulse width based device. The voltage level based device detects anomalies when the voltage level of the analog input signal exists within a prescribed range. The pulse number based device detects anomalies when the difference in the numbers of pulses of digital signals corresponding to the analog input signals is equal to or greater than a prescribed threshold value. The pulse width based device detects anomalies when the pulse width of the digital signals, measured from a combined signal of the digital signals or each of the digital signals, is different from the pulse width in a past control period.

Abstract: A method of testing a voltage protection device in a circuit is provided. The circuit comprises a source and load and a detector is provided in parallel with the protection device. The method comprises opening a switching device provided in the circuit. The method further comprises detecting a property of a voltage spike caused by the rate of change of current in the circuit inductance produced by the opening of the switching device to determine the condition of the protection device.

Abstract: The present document describes an assembly for connecting a test unit to a wiring harness or equipment to be tested, and a method for testing using the assembly. The assembly may comprise a test box unit, a generic mate-in interface, and at least one specific mate-in interface. The generic mate-in interface is for connection to the test box unit on one end, and to the at least one specific mate-in interfaces at the other end. The mate-in interfaces are for testing different existing wiring harnesses or equipment. Each one of the generic and specific mate-in interfaces has a specific ID. Information relating to the IDs of the connectors and the contact configuration of each mate-in interface is stored in a database of the test unit for identifying the appropriate test contacts that should be used for testing.

Abstract: Fault interrupting devices and methods for controlling the same are disclosed. The fault interrupting devices may include a switch on an electrical power line and a controller configured to operate the switch. The methods for controlling fault interrupting devices may include gathering data, determining from the data that a fault has occurred, opening the fault interrupting device to interrupt the fault, analyzing the data, and determining whether the fault interrupting device can be reclosed based at least partially on the analysis of the data.

Abstract: High Speed I/O interfaces such as DVI, S-ATA or PCI-Express require expensive test equipment. Loop-back tests are widely used as one alternative, but lack coverage of timing-related defects. A system and method for on-chip jitter injection using a variable delay with controllable amplitude and high accuracy is provided that improves the coverage of loop-back tests.

Abstract: An arc fault demonstrator device for testing the efficacy of an arc fault interrupter (AFI) circuit breaker. The device includes a motor that moves a movable electrode relative to a stationary electrode under microprocessor control. A relay switches the electrodes connection between an arc voltage measurement circuit and an electrode close circuit. When current is applied to the electrodes, the measurement circuit provides voltage measurements to the microprocessor, which instructs the motor to move the electrodes closer or apart. When the arc voltage is below a low threshold, the electrodes are moved apart until the arc voltage exceeds a medium threshold. When the arc voltage exceeds a high threshold, the electrodes are moved closer until the arc voltage falls below the medium threshold. A switch switches between the AFI circuit breaker or a conventional circuit breaker to confirm that the AFI breaker will trip upon detection of the arc whereas the conventional breaker will not.

Abstract: Described is a method for testing a power producer or a power consumer that can be connected to a power grid. The power producer or the power consumer is connected to a terminal point. A converter circuit is provided for influencing a voltage that is present at the terminal point. The converter circuit is connected via a transformer to the terminal point. In at least one embodiment, a series connection is configured with a choking coil and a first switch and connected to the terminal point. In a time coordinated manner, the first switch is initially closed and the converter circuit is influenced such that the voltage has the desired value at the terminal point, whereupon the second switch is then opened.

Abstract: Provided is a semiconductor integrated circuit including: a first path that includes a first logic circuit; a second path that includes a second logic circuit; and a subsequent-stage circuit that is connected to an output of the first path and is connected to an output of the second path, in which the second path further includes a first internal path that is selected as a propagation path during a normal operation period; and a second internal path that is selected as a propagation path during a test operation period and includes a delay circuit having a delay amount larger than a delay amount of the first internal path.

Abstract: A device is configured to evaluate electromagnetic characteristics of an integrated circuit. The device includes a fluid chamber, a first impeller, a second impeller, and a radio frequency measurement antenna. The fluid chamber is configured to receive the integrated circuit and to cool the integrated circuit. The first impeller is disposed within the fluid chamber and configured to distribute a first electromagnetic field produced by the integrated circuit within the fluid chamber along a first axis. The second impeller is within the fluid chamber and configured to distribute the first electromagnetic field produced by the integrated circuit within the fluid chamber along a second axis. The radio frequency measurement antenna is disposed proximate the fluid chamber and configured to measure an electric field and a magnetic field of the first electromagnetic field.

Abstract: A method to minimize human intervention during decision making processes while controlling an electrical power system by identifying an initiating element that cause a tripping of the transmission overhead lines and identifying potential future protection system failures that can initiate a cascading of tripping or total national blackout. A method of producing flashover analysis signal as a protection system analysis including processing a neutral current, three phase current profile, three phase voltage profile, and a plurality of digital signal of a transmission line using an artificial neural network to calculate pickup time, reset time, DEF confirmation time or total fault clearance time. A method of producing flashover analysis signal including as a flashover signature analysis to identify the cause of the flashover as a current transformer explosion, tree encroachment, crane, lightning strike or polluted insulator.

Abstract: The present invention provides devices and methods for testing the electrical performance of thin-film transistor backplane arrays and protecting thin-films during testing and handling.

Abstract: It is an object of the invention to, in fault detection of a PWM load device, provide a fault detection device and a fault detection method, which are capable of appropriately detecting fault of the load device in the case where such load device is connected the duty ratio of the PWM waveform of which is different, or where such load device is connected the magnitude of current of which is different. The fault detection device samples a current flowing through the load device on a predetermined cycle, decides, based on sampled values, a current-driven period and decides, by using sampled values in the current-driven period, a drive current value for determining whether or not there is a fault.

Abstract: Fault detection apparatuses and methods for detecting a processing or hardware performance fault of a semiconductor production tool have been provided. In an exemplary embodiment, a method for detecting a fault of a semiconductor production tool includes sensing a signal associated with a test component of the production tool during operation of the production tool and converting the signal to an electronic test signal. A prerecorded signature signal corresponding to the test component is provided and the test signal and the prerecorded signature signal are compared.

Abstract: A testing device (100) includes a main body (20) for supplying power to an electronic product including a space capable of assembling a battery therein, and a housing (10). The main body includes a fixing member (22) and a moving member (24) movable relative to the fixing member. The housing includes a plurality of supporting posts (14) for supporting the main body and at least one driving post (18) for driving the moving member to move relative to the fixing member. When the testing device is in standby mode, a length of the main body is shorter than that of the battery of the electronic product; when the testing device is performing its testing process, the length of the main body is equal to that of the battery of the electronic product.

Abstract: A test fixture for testing a semiconductor die with its loading member maintained flat throughout the test is disclosed. The test fixture includes a loading member and a frame. The loading member includes a base film having a melting point higher than a thermal equilibrium temperature thereof, wherein the thermal equilibrium temperature is achieved due to heat transfer from the semiconductor die under test to the base film via the adhesive layer. The loading member further includes an adhesive layer made of electrically conductive adhesive material. The loading member is adapted for securing diced LED dies in position and maintained flat throughout the die testing process, thereby ensuring the accuracy of testing for optical and electrical properties of the dies.

Abstract: A test apparatus for a DUT having a bidirectional differential interface is provided. A main driver amplifier generates a first differential signal Vd based on pattern data (PAT) to be transmitted to a DUT. A first replica driver amplifier generates a second differential signal (Vcp) based on the pattern data (PAT). A second replica driver amplifier generates a third differential signal (Vcn) based on the pattern data (PAT). A first comparator compares the voltages of a node (N1) and a node (N2), and a second comparator compares the voltages of a node (N3) and a node (N4).

Abstract: A method and tamper resistant circuit for resisting tampering including reverse engineering in a semiconductor chip, and a design structure on which the subject circuit resides are provided. A sensing device for detecting a chip tampering state is formed with the semiconductor chip including the circuitry to be protected. A tamper resistant control signal generator is coupled to the sensing unit for generating a tamper resistant control signal responsive to a detected chip tampering state. A functional operation inhibit circuit is coupled to the tamper resistant control signal generator for inhibiting functional operation of the circuitry to be protected responsive to the tamper resistant control signal.

Abstract: A multi-scanner device having a detection unit and an outlet tester that can be selectively connected together for convenient use and easy storage. Preferably, a plug on the outlet tester is inserted into a non-functional socket located on the detection unit to form a multi-scanner device with a detachable outlet tester.

Abstract: A device is configured to evaluate electromagnetic characteristics of an integrated circuit. The device includes a fluid chamber, a first impeller, a second impeller, and a radio frequency measurement antenna. The fluid chamber is configured to receive the integrated circuit and to cool the integrated circuit. The first impeller is disposed within the fluid chamber and configured to distribute a first electromagnetic field produced by the integrated circuit within the fluid chamber along a first axis. The second impeller is within the fluid chamber and configured to distribute the first electromagnetic field produced by the integrated circuit within the fluid chamber along a second axis. The radio frequency measurement antenna is disposed proximate the fluid chamber and configured to measure an electric field and a magnetic field of the first electromagnetic field.

Abstract: A testing card for peripheral component interconnection (PCI) interface includes a body, a plurality of PCI pins, a PCI interface chip, and a plurality of PCI testing pins. The PCI pins are mounted to the body. The PCI interface chip is mounted to the body and connected to the PCI pins. The PCI testing pins are mounted to the body and electrically connected to the pins of the PCI interface chip. When the PCI pins are connected to a PCI slot of a motherboard, the PCI interface chip is configured to communicate with the motherboard.

Abstract: A support structure for installation of a component assembly housed in a rotating, translating carriage chassis, the support structure including: a stationary rail that includes a shaft extruding perpendicular to the stationary rail; a rotating rail adapted to receive a carriage chassis rail, the rotating rail parallel to the stationary rail when the rotating rail is in a non-rotated position, the rotating rail including a shaft receptacle that receives the shaft, the rotating rail configured to rotate about the shaft and relative to the stationary rail; and a translation mechanism attached to the rotating rail, the translation mechanism enabling the carriage chassis rail to translate parallel to and along the rotating rail.

Abstract: The present invention discloses a plant diagnostic system for diagnosing a problem with the plant. The plant diagnostic system can include an agent-based plant diagnostic network that has an adaptive global agent located in a central facility, a plant expert agent located at the plant and a plurality of subsystem resident agents. Each of the subsystem resident agents can be assigned to a subsystem of the plant. A diagnosis agent can also be included, the diagnosis agent operable to be instructed by the adaptive global agent, transmitted to the plant expert agent, be received by the plant expert agent, transmitted by the plant expert agent back to the adaptive global agent and be received by the adaptive global agent.

Abstract: Electronic supervision may be provided. First, a stock number may be sent to a database server. The stock number may correspond to a product comprising, for example, an electrical cable. In response to sending the database server the stock number, specification information corresponding to the product may be received from a database stored on the database server. The specification information may comprise, for an electrical cable, a number of wires, a weight per thousand feet, and a diameter. Next, product production may be monitored to determine faults occurring during production. Monitoring the production may comprise displaying a data monitoring screen to production personnel. The data monitoring screen may provide data regarding the product and product comparison against a standard maintained within the database for the product. Fault data corresponding to the determined faults occurring during the production may be saved to the database.

Abstract: A test apparatus comprising a plurality of test units that test a device under test; a plurality of housing sections that respectively house the test units therein; a plurality of opening/closing sections that are disposed respectively in the housing sections and that expose the test units to the outside or isolate the test units from the outside; and a control section that independently controls whether each of the opening/closing sections is allowed to be opened. The control section may allow test units that are not supplied with power to be exposed to the outside. For at least one of (i) a period during which one of the test units is performing a predetermined operation, (ii) a predetermined period before the period during which one of the test units is performing the predetermined operation, and (iii) a predetermined period after the period during which one of the test units is performing the predetermined operation, the control section may prohibit other test units from being exposed to the outside.

Abstract: A modular test plug for voltage, current and saturation testing has a housing having a handle portion, a plurality of jaw connections for injecting upstream toward the equipment to be tested, a plurality of blade connections for injecting downstream toward a transformer, a first plurality of binding posts on a top of the housing connected to the jaw connections, and a second plurality of binding posts also on a top of the housing connected to the blade connections. Also provided is a short-defeating insert for defeating a shorting mechanism in an FT switch. This insert has a thin flat extension member extending from the body to prevent a bottom cam on a shorting blade from making contact with a shorting spring that would otherwise short the circuit when the switch handle is moved from the open position to the closed position.

Abstract: A circuit for controlling temperature of a semiconductor chip includes a first heating element that is built into the semiconductor chip. The first heating element generates heat to increase the temperature of the semiconductor chip. The chip also includes a temperature controller that is coupled to the first heating element and built into the semiconductor chip. The temperature controller controls the temperature to enable testing of the semiconductor chip at a desired temperature.

Abstract: A method for dispensing and detecting solid pharmaceutical articles includes: forcing an article through a dispensing channel and past a sensor configured and positioned to detect the article passing through the dispensing channel, wherein the article includes one of the solid pharmaceutical articles; generating a detection signal using the sensor responsive to the article passing through the dispensing channel, wherein the detection signal indicates a time that the article takes to traverse the sensor; and determining whether the article is a complete article or an article fragment responsive to a comparison of the time indicated by the detection signal and an article fragment travel time representing an expected travel time for a complete article to traverse the sensor that is determined independent of physical attributes of the solid pharmaceutical articles.

Abstract: A test fixture includes a first RS-232 connector and a second RS-232 connector. The data terminal ready (DTR) pin of the first RS-232 connector is connected to the DTR pin of the second RS-232 connector, and the clear to send (CTS) pin of the first RS-232 connector is connected to the CTS pin of the second RS-232 connector. The DTR pins are further connected to a power pin of each of the test computers. The test fixture sets a high level voltage for the connected DTR pins, and sets a low level voltage for the connected CTS pins according to the commands of turning on the test computers sent by the control computer, to turn on the test computers. An auto shutdown software included in each of the test computers is executed to shut down the test computers.