With Voltage Or Current Signal Evaluation Patents (Class 324/713)
  • Patent number: 10408875
    Abstract: A testing system includes a subtractor and a divider. The subtractor is configured to receive a first voltage of a circuit being tested and a second voltage of the circuit, and to derive a difference between the first voltage and the second voltage. The divider is configured to receive the difference between the first voltage and the second voltage, and to derive a resistance of the circuit by dividing (i) the difference between the first voltage and the second voltage by (ii) a difference between a first current applied to the circuit and a second current applied to the circuit. The first voltage is corresponding to the first current, and the second voltage is corresponding to the second current.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: September 10, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yu-Jung Chang, Wei-Kai Liao, Ming-Ching Lin, Kuei-Hao Tseng
  • Patent number: 10345835
    Abstract: A voltage generation apparatus includes: a controller, a first voltage division controller, a second voltage division controller, and a voltage detector. The first voltage division controller and a load are connected in series between an input power supply and ground. The second voltage division controller and the load are connected in parallel between ground and a connection point between the first voltage division controller and the load. The voltage detector is electrically connected to the load, and is configured to: detect a load voltage of the load, and feed back a detected value of the load voltage to the controller. The controller is configured to: receive the detected value fed back by the voltage detector, and generate a control signal based on the detected value. The control signal is used to control the first voltage division controller and the second voltage division controller.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: July 9, 2019
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Xinru Wang
  • Patent number: 10274514
    Abstract: The present invention relates to a metallic device for near-field optical microscopy and spectroscopy, as well as to a method of preparing it. Said device comprises a single body (1) with longitudinal prolongation (2), nanometric apex (4) and has at least one trimming (3) on its surface, being applied as a probe of high optical efficiency, with adequate dimensions and details that enable the best photon-plasmon coupling, enabling the analysis, with high space resolution, of structures of nanometric dimensions with high efficiency and reproducibility.
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: April 30, 2019
    Assignees: UNIVERSIDADE FEDERAL DE MINAS GERAIS—UFMG, INSTITUTO NACIONAL DE METROLOGIA QUALIDADE E TECNOLOGIA—INMETRO
    Inventors: Thiago De Lourenço E Vasconcelos, Bráulio Soares Archanjo, Luiz Gustavo De Oliveira Lopes Cançado, Carlos Alberto Achete, Wagner Nunes Rodrigues, Ado Jorio De Vasconcelos, Benjamin Fragneaud, Douglas Dos Santos Ribeiro, Cassiano Rabelo E Silva, Bruno Santos De Oliveira
  • Patent number: 10274448
    Abstract: A method and a test fixture for evaluating a weld seam joining an electrode foil element and a terminal of a battery cell include segmenting the weld seam joining the electrode foil element and the terminal into a plurality of zones. For each of the zones, an electrical current is applied between the terminal and the electrode foil element in the zone, and a resistance is determined across the terminal and the electrode foil element in the zone. Integrity of the weld seam is evaluated for each of the zones based upon the resistance between the terminal and the electrode foil element in the zone.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: April 30, 2019
    Assignee: GM Global Technology Operations LLC
    Inventors: Jason A. Lupienski, Robert W. Chalfant, James E. Kettlewell
  • Patent number: 10238010
    Abstract: A Rack Information Handling System (RIHS) has more than one liquid cooled (LC) node containing heat-generating functional components, each LC node configured with a system of conduits to receive cooling liquid to regulate the ambient temperature of the node and provide cooling to the functional components inside the node by removing heat generated by the heat-generating functional components. A liquid control subsystem includes electrically-actuated control valves that selectively distribute cooling liquid to LC nodes each comprising a chassis received in a respective chassis-receiving bay of a rack. Liquid sensors detect a parameter of the liquid control subsystem. A liquid controller communicatively coupled to the electrically-actuated control valves and the liquid sensors detect a rack-level liquid event based at least in part on the parameter and communicates to any LC node that is affected by the rack-level liquid event.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: March 19, 2019
    Assignee: Dell Products, L.P.
    Inventors: Austin Michael Shelnutt, Edmond I. Bailey
  • Patent number: 10222401
    Abstract: A device for detecting stray voltage in a body of water includes a float, a probe wire connected to the float, a voltage detection circuit electrically connected to the probe wire, and an alarm module electrically connected to the voltage detection circuit. The voltage detection circuit includes an electrical input for receiving a signal from the probe wire and is configured to generate an alert via the alarm module in response to a voltage provided to the electrical input by the probe wire.
    Type: Grant
    Filed: August 15, 2017
    Date of Patent: March 5, 2019
    Inventor: Dennis E. Lewis
  • Patent number: 10187204
    Abstract: A communications device for generating a key for use as a shared secret in communications with another communications device is provided. Each of the communications devices comprises a sensor array for measuring a spatially-varying magnetic field originating from a first spatially-varying density of metallic particles comprised in a first battery, when subjected to an excitation magnetic field, and processing means operative to acquire a set of values from the sensor array, which set of values represents the spatially-varying magnetic field, and to derive the key from the set of values. The excitation magnetic field is generated by a magnetic-field generator comprised in one of the communications devices. Thereby, the two communications devices may, when in proximity, generate identical keys by probing the spatially-varying density of metallic particles comprised in the first battery.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: January 22, 2019
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Matthew John Lawrenson, Lars Andersson, Till Burkert, Harm Stefan Cronie, Julian Charles Nolan, Jacob Ström
  • Patent number: 10185335
    Abstract: The present invention generally relates to a system and method for high accuracy temperature control of an oven used to operate an electronic device, sensor or resonator (“device”) at a fixed temperature. The fixed temperature operation may result in high stability and operation accuracy of the devices across varying environment temperature conditions. Specifically, the present invention relates to systems and methods that enable realizing, sensing, and controlling the temperature of an ovenized device with high temperature control, accuracy, relaxed temperature sense, and control electronics requirements.
    Type: Grant
    Filed: May 14, 2016
    Date of Patent: January 22, 2019
    Inventors: Navid Yazdi, Weibin Zhu
  • Patent number: 10173627
    Abstract: A method for maintaining an actuator for an airbag control device. The method has a step of impressing an electric current flow through the actuator using an electric voltage having a voltage value. In addition, the method has a step of ascertaining an electric measuring current through the actuator. Here, the electric measuring current through the actuator occurs on account of the impressed electric current flow through the actuator. In addition, the method has a step of executing a comparison of the electric measuring current through the actuator to a threshold value. Moreover, the method has a step of adjusting the voltage value of the electric voltage for impressing the electric current flow through the actuator as a function of the comparison.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: January 8, 2019
    Assignee: ROBERT BOSCH GMBH
    Inventors: Hartmut Schumacher, Ruediger Karner
  • Patent number: 10135394
    Abstract: A high-gain, low power, electronic amplifier for amplification of a low magnitude voltage signal through a comparator-integrator amplification method for energy-aware applications is disclosed. The electronic amplifier comprises: a comparator arrangement with at least one comparator unit adapted to receive a first voltage signal to be amplified and a first feedback voltage signal, and to generate a first two-level voltage comparison signal; a integrator arrangement to receive the first two-level voltage comparison signal and generate a first amplifier output signal corresponding to an amplification of the voltage signal to be amplified; and a first feedback network to receive the first amplifier output signal and generate the first feedback voltage signal.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: November 20, 2018
    Assignees: IMEC vzw, Katholieke Universiteit Leuven
    Inventor: Rachit Mohan
  • Patent number: 10134836
    Abstract: A semiconductor device and a method of fabricating the same are provide. The fabricating method includes providing a silicon-on-insulator (SOI) substrate that includes, from bottom to top, a substrate, a first insulating layer and a semiconductor layer. The semiconductor layer is patterned to form a plurality of dummy patterns. A second insulating layer is formed around the plurality of dummy patterns. The plurality of dummy patterns are removed to form a plurality of openings. A dielectric structure is formed on the substrate and fills into the plurality of openings.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: November 20, 2018
    Assignee: United Microelectronics Corp.
    Inventor: Zhi-Biao Zhou
  • Patent number: 10131943
    Abstract: A target polynucleotide is expanded. In respect of each nucleotide in the target polynucleotide, the target polynucleotide comprises clock nucleotides and at least one signal nucleotide in a predetermined order. The clock nucleotides have a predetermined sequence common to each nucleotide in the target polynucleotide. The at least one signal nucleotide is characteristic of the identity of the respective nucleotide in the target polynucleotide. During translocation of the expanded polynucleotide through a nanopore, electrical measurements dependent on the polynucleotide within the pore are made, to derive an analysis signal. Clock signals derived from the clock nucleotides are identified. Relative to the positions of the identified clock signals, nucleotide signals derived from the least one signal nucleotide are derived to analyze the target polynucleotide.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: November 20, 2018
    Assignee: Oxford Nanopore Technologies Ltd.
    Inventors: Stuart William Reid, Gavin Harper
  • Patent number: 10060989
    Abstract: A board connection terminal (15) is connected to a circuit board that detects a current having flowed through a resistor element (10). The board connection terminal (15) includes an intermediate part (31) and two connecting parts (30) integrated with one another. The intermediate part (31) has a substantially linear shape, and is connected to a shunt resistor (7). The two connecting parts (30) have proximal ends thereof located at opposite ends of the intermediate part (31), and protrude in a direction substantially perpendicular to the intermediate part (31), to be connected to the circuit board. The two connecting parts (30) are arranged substantially in parallel to each other. The board connection terminal (15) comprises two board connection terminals (15) that are arranged with the resistor element (10) sandwiched therebetween. Contact resistance between the intermediate part (31) and the shunt resistor (7) is lower than conductor resistance of the intermediate part (31).
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: August 28, 2018
    Assignees: FURUKAWA ELECTRIC CO., LTD., FURUKAWA AUTOMOTIVE SYSTEMS INC.
    Inventors: Kenichi Yoshioka, Shinya Saito, Yuuichi Watanabe, Yuji Matsui
  • Patent number: 10060965
    Abstract: An apparatus to test an Ethernet powered device includes a processor including a power negotiation supervisor, a DC power source, a first interface having an Ethernet medium dependent interface and a coupling circuit that inserts DC power onto one or more wire pairs of the first interface. The apparatus further includes a first bridging circuit, a measuring circuit to measure characteristics of DC power delivered to Ethernet powered device. The DC power source is configurable over a range of voltage levels including a plurality of operating voltages which are applied to the Ethernet powered device and the power negotiation supervisor processes power negotiation protocol messages.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: August 28, 2018
    Assignee: Sifos Technologies, Inc.
    Inventors: John H. Skinner, Kendrick R. Bennett, Peter G. Johnson
  • Patent number: 10027250
    Abstract: A semiconductor device includes: power elements that configures an inverter; a conductive plate that electrically connects the power elements; and a current detection portion. The power elements include a first power element and a second power element. The conductive plate includes: a first carrying portion; a second carrying portion; a third carrying portion; a fourth carrying portion; a first connection portion that electrically connects the second carrying portion and the third carrying portion to connect the first power element and the second power element in series; and an output terminal electrically connected with the second carrying portion or the third carrying portion. The first carrying portion is connected with a first power source and the fourth carrying portion is connected with a second power source. The current detection portion is fixed to the output terminal and the magnetic field permeates the current detection portion.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: July 17, 2018
    Assignee: DENSO CORPORATION
    Inventors: Kousuke Nomura, Masaki Takashima
  • Patent number: 10008445
    Abstract: Embedded fuse structures and fabrication techniques. An embedded fuse may include a non-planar conductive line having two high-z portions extending to a greater z-height than a low-z portion of reduced current carrying capability disposed there between. A dielectric disposed over the low-z portion has a top surface planar with the high-z line portions to which fuse contacts may be landed. Fabrication of an embedded fuse may include undercutting a region of a first dielectric material disposed over a substrate. The undercut region is lined with a second dielectric material. A pair of electrically joined fuse ends are formed by backfilling the lined undercut region with a conductive material. In advantageous embodiments, fuse fabrication is compatible with high-K, metal gate transistor and precision polysilicon resistor fabrication flows.
    Type: Grant
    Filed: February 11, 2014
    Date of Patent: June 26, 2018
    Assignee: Intel Corporation
    Inventors: Chen-Guan Lee, Walid M. Hafez, Chia-Hong Jan
  • Patent number: 9911706
    Abstract: A semiconductor device includes a main pad part and a sub pad part formed in a peripheral area of at least one side of the main pad part. The sub pad part is spaced apart from the main pad part. The sub pad part operates in a first state in which the sub pad part is short-circuited with the main pad part or in a second state in which the sub pad part is open from the main pad part.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: March 6, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-hyun Cho, Jun-phyo Lee, Yong-hwan Jeong
  • Patent number: 9904432
    Abstract: A touch panel of the present disclosure includes a substrate divided into a view area and an unavailable area. Sensing electrodes are formed in the view area to sense a first input, and touch electrodes are formed in the view area not to be overlapped with the sensing electrodes to sense a second input. A first wire is formed in the unavailable area to connect first ends of the touch electrodes, and second wires are formed in the unavailable area and connected to the second ends of the touch electrodes. A controller is connected to the second wires to control the touch electrodes, in which the first wire may be connected to the plurality of touch electrodes, and the second wires may connect each of the plurality of touch electrodes to the controller.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: February 27, 2018
    Assignee: LG Innotek Co., Ltd.
    Inventors: Yongjae Choi, Young Sun You, Jong Woon Mun, Bong Jun Park, Seong Su Oem, Sun Hwa Lee, Kwang Yong Jin
  • Patent number: 9874604
    Abstract: A semiconductor device may include a first node coupled to a first pad to which a first voltage having a first voltage level is inputted; a second node coupled to a second pad to which a second voltage having a second voltage level is inputted; an internal voltage generation unit suitable for shifting a voltage level of the first node to generate an internal voltage having the second voltage level, and outputting the internal voltage to third and fourth nodes; a first internal circuit suitable for operating by employing a voltage of the second node; and a node coupling unit that electrically couples the second node to the third node during a test operation, and electrically separates the second node and the third node during a normal operation.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: January 23, 2018
    Assignee: SK Hynix Inc.
    Inventors: Min-Su Kim, Jin-Su Park
  • Patent number: 9838813
    Abstract: A self diagnostic loudspeaker load impedance testing system, or Push Here Diagnostic (PHD) system, located within a mixer/amplifier for testing loudspeaker connections to the mixer amplifier during installation and maintenance. The system includes a test signal source that replaces the normal audio input to the amplifier during test. A PHD analyzer within the mixer amplifier analyzes the response of the loudspeakers and related wiring to the test signal to detect a total system impedance that exceeds the amplifier rating and to detect short circuits in the wiring. The PHD analyzer illuminates an indicator when a fault occurs. The test is initiated by depressing a momentary contact switch within the mixer amplifier housing by inserting a tool through an opening in the mixer amplifier housing.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: December 5, 2017
    Inventor: Jeffery Brian Kuells
  • Patent number: 9829520
    Abstract: A method for measuring the impedance of a DUT having a capacitance of less than 1 pF includes applying a voltage or current signal to the DUT, the voltage or current signal including an AC component having a non-zero frequency of less than 1 kHz; monitoring a current or voltage signal, respectively, through the DUT in response to the voltage or current signal; digitizing the voltage signal and the current signal synchronously; and calculating the impedance from the digitized voltage and current signals.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: November 28, 2017
    Assignee: Keithley Instruments, LLC
    Inventor: Gregory Sobolewski
  • Patent number: 9748829
    Abstract: A power module including: a power conversion unit including N switching-element pairs; and a control circuit. The control circuit receives N command signals, which correspond respectively to the N switching-element pairs, and a shared enable signal. The control circuit is configured to, when the enable signal is negated, execute all-off control of turning off all of the switching elements constituting the power conversion unit, and when the enable signal is asserted, execute normal control, dead-time addition control, and dead-time compensation control for each of the switching-element pairs per period of a corresponding command signal.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: August 29, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Satoshi Azuma, Shuta Ishikawa, Teruaki Tanaka
  • Patent number: 9746522
    Abstract: A switch failure diagnosis device for using in a current path between an electric device and an electric storage device includes plural switches, a switch terminal voltage detector, and a controller. The switches are connected parallel to each other in the current path. The switch terminal voltage detector outputs a switch terminal voltage detection signal. The controller is configured to select the switches at different time in sequence and input an open instruction signal to each switch at the time when the switch is selected, and to determine, based on the switch terminal voltage detection signal output while the open instruction signal is given, that at least one of the switches has a failure if the detected voltage is in a failure determination range.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: August 29, 2017
    Assignee: GS YUASA INTERNATIONAL LTD.
    Inventors: Takeyuki Shiraishi, Tomohiro Kawauchi, Takeshi Itagaki, Tomoshige Inoue, Daisuke Konishi
  • Patent number: 9742294
    Abstract: A controller for use in a power converter includes an initialization circuit coupled to a sense terminal coupled to an external resistor to receive a sense voltage from external resistor during a startup mode of the power converter. The sense terminal is coupled to sense an output current of the power converter after the startup mode of the power converter is complete. A decoder circuit is coupled to receive the sense voltage from the initialization circuit during the startup mode of the power converter. The decoder circuit is coupled to sense a voltage across an external resistor during the startup mode of the power converter to determine a value of the external resistor to set an operating parameter of the power converter in response to the value of the external resistor.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: August 22, 2017
    Assignee: Power Integrations, Inc.
    Inventors: Vikram Balakrishnan, Qing McIntosh, Roland Sylvere Saint-Pierre
  • Patent number: 9703917
    Abstract: Various aspects of the disclosed techniques relate to techniques for identifying high-impedance nodes in a circuit design. Noise sources are added to nodes of interest in the circuit design. Voltage values at the nodes of interest are then computed in parallel. Based on the voltage values, high impedance nodes in the nodes of interest are identified.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: July 11, 2017
    Assignee: Mentor Graphics Corporation
    Inventors: Pole Shang Lin, Kuei Shan Wen
  • Patent number: 9634844
    Abstract: In a method performed by a PoE system, a PSE is able to detect whether a PD is compatible for receiving power via four wire pairs in the standard Ethernet cable. The PSE provides a current limited voltage to a first and second pair of wires in the cable, during a detection phase, to detect a characteristic impedance of the PD. In the PSE, a first resistor is connected to a third wire pair and a second resistor is connected to a fourth wire pair. During the detection phase, the PSE detects the relative currents through the resistors. If the currents are the same, then the PSE knows the PD is able to receive power via the four wire pairs. The PSE then applies the full PoE voltage to the first and second wire pairs and connects the third and fourth wire pairs to a low voltage via a MOSFET.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: April 25, 2017
    Assignee: Linear Technology Corporation
    Inventors: Michael Paul, Jeffrey Heath, David Dwelley, Heath Stewart
  • Patent number: 9599645
    Abstract: Implementations of the present disclosure involve a system and/or method for measuring on-die voltage levels of an integrated circuit through a digital sampling circuit. In particular, the system and/or method utilizes a delay line based analog-to-digital sampling circuit that produces a voltage reading over time, such as at every high frequency clock cycle. The digitized samples are routed to either an on-die memory structure for later analysis or are transmitted to one or more pins of a chip for capture and analysis by an external analyzer.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: March 21, 2017
    Assignee: Oracle International Corporation
    Inventor: Sebastian Turullols
  • Patent number: 9541023
    Abstract: A method for determining causes of engine stop using ignition power monitoring may include performing ignition power holding determination to determine, in a state in which a vehicle is started and an engine is driven, whether the vehicle is in a key-on state, to which power is consistently applied, in order to hold the starting of the engine of the vehicle. The method also includes performing power-off recognition time comparison by comparing, when ignition power is turned off and the engine is stopped, a time required to recognize ignition power-off in an ECU (Electronic Control Unit) with a preset ignition power-off recognition time for failure determination. The method also performs a power abnormality determination by determining whether the engine is stopped due to ignition power failure when the time required to recognize the ignition power-off in the ECU is not greater than the preset ignition power-off recognition time.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: January 10, 2017
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventor: Seung-Bum Kim
  • Patent number: 9541599
    Abstract: A wafer test method of a power switch wherein a main IGBT and a current detecting IGBT that detects a current value of the main IGBT are integrally formed on the same semiconductor substrate is such that there is provided resistance means that causes an emitter current of the current detecting IGBT to flow through an emitter terminal of the main IGBT, the main IGBT and current detecting IGBT are energized simultaneously, thereby applying a constant current to a common collector terminal of the main IGBT and current detecting IGBT, and a current ratio (main current/detected current) between a main current of the main IGBT and a detected current of the current detecting IGBT is calculated from the current flowing through the current detecting IGBT, obtained from the voltage across the resistance means, and the constant current.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: January 10, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Shigeki Sato
  • Patent number: 9518569
    Abstract: An adjustment device for a pivoting cradle of a hydraulic machine, in particular of an axial piston machine, is disclosed. Said adjustment device has an actuating piston to which pressure medium for pivoting the pivoting cradle about a pivoting axis is applied via an actuating pressure space. In order to control the feeding in of pressure medium and the relieving of the actuating pressure space, a control valve is provided. Said control valve has a control piston configured to be adjusted by an electric actuator, wherein the electric actuator is controlled by a control device. In this context, the control device controls the electric actuator as a function of a control difference formed from a setpoint pivoting angle and an actual pivoting angle of the pivoting cradle. The actual pivoting angle of the pivoting cradle is fed back electrically to the control device here.
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: December 13, 2016
    Assignee: Robert Bosch GmbH
    Inventors: Joern Howind, Carola Diebold, Rolf Springmann
  • Patent number: 9435826
    Abstract: A continuous variable spacing probe pin device, including first and second probe pins. The first and second probe pins are configured to measure a property of a conductive layer. In a first configuration, the first and second probe pins include respective first portions arranged to contact the conductive layer to measure the property. In a second configuration, the first and second probe pins include respective second portions arranged to contact the conductive layer to measure the property. A first area for each respective first portion is different from a second area for each respective second portion.
    Type: Grant
    Filed: May 6, 2013
    Date of Patent: September 6, 2016
    Assignee: KLA-Tencor Corporation
    Inventors: Walter H. Johnson, Jianou Shi, Lansheng Dong, Haijing Peng, Xianghua Liu, Jiazhou Jin, Zhuoxian Zhang, Nanchang Zhu
  • Patent number: 9411769
    Abstract: A disclosed example apparatus includes a first interface to be communicatively coupled to one of a first field device or a second field device. The first interface communicates using a first fieldbus communication protocol when coupled to the first field device and communicates using a second fieldbus communication protocol when coupled to the second field device. The example apparatus includes a communication processor to encode first information received from the one of the first field device or the second field device for communication via a bus using a third communication protocol. The example apparatus includes a second interface communicatively coupled to the communication processor and the bus to communicate the first information to a controller in the process control system. The bus is to use the third communication protocol to communicate second information received from the other one of the first field device or the second field device.
    Type: Grant
    Filed: January 8, 2015
    Date of Patent: August 9, 2016
    Assignee: Fisher-Rosemount Systems, Inc.
    Inventors: Klaus Erni, Gary Keith Law, Doyle Eugene Broom, Kent Allan Burr, Mark J. Nixon
  • Patent number: 9395395
    Abstract: There is provided a voltage detector including a reference voltage generator that generates a constant reference voltage when a power supply voltage is higher than a predetermined threshold voltage, and a detector that, when the power supply voltage exceeds a voltage that is higher than the threshold voltage by a predetermined potential, detects whether the power supply voltage is higher than a defined voltage based on the reference voltage and outputs a detection result.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: July 19, 2016
    Assignee: Sony Corporation
    Inventors: Sachio Akebono, Kiyoshi Makigawa, Daisuke Hirono, Moonjae Jeong, Taiki Iguchi
  • Patent number: 9325133
    Abstract: Electronic circuits are provided for use with various electrical adapters. Two resistors define a voltage divider circuit. One or more resistors are coupled in parallel arrangement with the voltage divider by way of controlled switching. A voltage present within the voltage divider is converted into a digital signal, which is used to determine a power rating for the respective electrical adapter. The power rating is used to control normal operations of a computer or other device. The electrical adapter can optionally include a second resistor that is switched into parallel circuit arrangement with a first resistor during the power rating determination process.
    Type: Grant
    Filed: August 4, 2010
    Date of Patent: April 26, 2016
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Thomas Paul Sawyers
  • Patent number: 9313594
    Abstract: The present invention discloses an impedance detecting device capable of detecting the impedance value of a load, comprising: an AC signal generating circuit for generating an AC signal; an output buffer for generating an output voltage and an output current according to the AC signal and the impedance value of the load; a current mirror for generating a mirror current according to the output current; a detection impedance for generating a detection voltage according to the mirror current; a comparing circuit for generating a comparison result by comparing the output voltage with the detection voltage; and a control circuit for adjusting at least one of a current ratio of the mirror current to the output current and the impedance value of the detection impedance according to the comparison result until the comparison result has satisfied a predetermined requirement.
    Type: Grant
    Filed: September 3, 2014
    Date of Patent: April 12, 2016
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventor: Chih-Kang Chien
  • Patent number: 9240293
    Abstract: A circuit tracer for use with circuit breakers equipped with sensors capable of sensing at least a change in the power consumption of the circuit and transmitting, preferably wirelessly, such information. The information is received directly or indirectly by a circuit tracer having a display, the display showing all the circuit breakers equipped with the sensors. Upon changing the load of an electricity outlet, such as a wall outlet, a light source, HVAC, pump, electrical machinery, etc., the sensor equipped circuit breaker provides an indication of such power or current consumption change to the circuit tracer. This allows the user of the circuit tracer to associate on the circuit tracer the circuit breaker with the specific electricity outlet. The association information may be saved on a central server or database for future use.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: January 19, 2016
    Assignee: Panoramic Power Ltd.
    Inventors: Corey Salka, Adi Shamir
  • Patent number: 9146261
    Abstract: An electronic device includes a current source for applying current, a pull-up resistor or a pull-down resistor configured to be connected to one of a plurality of data terminals, a voltage level detection circuit configured to detect voltage values of the plurality of data terminals, and a connected device determination circuit configured to determine a type of a power source device based on the voltage values of the plurality of data terminals detected by the voltage level detection circuit.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: September 29, 2015
    Assignee: RICOH ELECTRONIC DEVICES CO., LTD.
    Inventor: Masayuki Funakoshi
  • Patent number: 9131620
    Abstract: A combiner box capable of monitoring energy output from a photovoltaic system (or other alternative energy system) having improved troubleshooting functionality, the ability to independently verify utility charges, and a mechanism for reducing incorrect readings of energy output and consumption due to noise and interference.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: September 8, 2015
    Inventors: Christopher Robert Debone, Steven Peter Godmere
  • Patent number: 9059006
    Abstract: After planarization of a gate level dielectric layer, a dummy structure is removed to form a recess. A first conductive material layer and an amorphous metal oxide are deposited into the recess area. A second conduct material layer fills the recess. After planarization, an electrical antifuse is formed within the filled recess area, which includes a first conductive material portion, an amorphous metal oxide portion, and a second conductive material portion. To program the electrical antifuse, current is passed between the two terminals in the pair of the conductive contacts to transform the amorphous metal oxide portion into a crystallized metal oxide portion, which has a lower resistance. A sensing circuit determines whether the metal oxide portion is in an amorphous state (high resistance state) or in a crystalline state (low resistance state).
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: June 16, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Satya N. Chakravarti, Dechao Guo, Chuck T. Le, Byoung W. Min, Thekkemadathil V. Rajeevakumar, Keith Kwong Hon Wong
  • Patent number: 9054632
    Abstract: Characteristics of partially assembled photovoltaic modules can be determined using electrical connection apparatuses and methods. By providing deformable electrical contacts against a partially assembled module on an assembly line, an electrical bias can be applied to the module before the module is completely assembled. An electrical connection apparatus for a photovoltaic module may include a first contact configured to engage a first lead on the photovoltaic module, a second contact configured to engage a second lead on the photovoltaic module, and an electrical power source configured to apply an electrical bias between the first contact and the second contact.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: June 9, 2015
    Assignee: First Solar, Inc.
    Inventors: James Hinkle, Imran Khan, Modesto Sanchez, Thomas Truman
  • Publication number: 20150130484
    Abstract: The current sensing circuit comprises a first input terminal and a second input terminal for introducing a subject current that flows in a current path; a shunt resistor coupled in the current path for converting the subject current into an output voltage difference across the shunt resistor; an amplifier having a first input node coupled to the first input terminal, a second input node coupled to the second input terminal, an output node, and a feedback path comprising an over-current protection device, wherein the feedback path is coupled between the output node and the first input terminal; and an output terminal coupled to the second input terminal and the shunt resistor to output the output voltage difference. The current sensing circuit has a relatively large current measuring range and a small burden voltage. A measurement device is also described.
    Type: Application
    Filed: November 12, 2014
    Publication date: May 14, 2015
    Inventors: Hong Yao, Fei Yang, Yong Yang
  • Publication number: 20150115985
    Abstract: The present document relates to a current sensing circuit. In particular, the present document relates to a current sensing circuit which provides reliable indications of the current through a transistor. A current sensing circuit configured to provide an indication of a load current through a pass device is described. The current sensing circuit comprises a sensing replica of the pass device and a sensing resistor arranged in series with the sensing replica. The sensing resistor is arranged such that a voltage drop at the sensing resistor provides an indication of the load current through the pass device.
    Type: Application
    Filed: March 7, 2014
    Publication date: April 30, 2015
    Applicant: Dialog Semiconductor GmbH
    Inventor: Pietro Gambetta
  • Patent number: 9018957
    Abstract: A method of measuring squib loop resistance including non-linear elements in a restraint control module is disclosed by the present invention. The squib loop resistance is comprised of both linear and non-linear elements. The non-linear elements are linearized into resistive components about the bias points used to make the squib loop resistance measurement. The calculation of the linear squib loop resistance is provided by comparing the complete squib loop resistance and the linearized value of the non-linear elements.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: April 28, 2015
    Assignee: Autoliv ASP, Inc.
    Inventors: David Eiswerth, Vincent Colarossi, Stuart Andrew Koch
  • Patent number: 9013189
    Abstract: An electrical joint monitoring device including a mounting assembly and a wireless transponder unit. The mounting assembly includes a first conductive contact structured to electrically connect to a first conductive member of an electrical joint and a second conductive contact structured to electrically connect to a second conductive member of the electrical joint. The wireless transponder unit includes a control unit electrically connected to the first and second conductive contacts and an antenna electrically connected to the control unit. The wireless transponder unit is configured to sense a voltage difference between the first and second conductive contacts, to generate information based on the voltage difference, and to output the information to a wireless reader unit via the antenna.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: April 21, 2015
    Assignee: Eaton Corporation
    Inventor: John J. Shea
  • Patent number: 9007076
    Abstract: The invention relates to a method for measuring the electrical resistance of a glow plug, wherein a test current is set by closed-loop control to a constant value using a constant-current source, and is directed through the plug. A value of the electrical resistance of the glow plug is determined by evaluating a feedback signal of the constant-current source.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: April 14, 2015
    Assignee: BorgWarner BERU Systems GmbH
    Inventor: Peter Schaefer
  • Patent number: 9007077
    Abstract: A flexible current and voltage sensor provides ease of installation of a current sensor, and optionally a voltage sensor in application such as AC branch circuit wire measurements, which may require installation in dense wiring conditions and/or in live panels where insulating gloves must be worn. The sensor includes at least one flexible ferromagnetic strip that is affixed to a current sensing device at a first end. The second end is secured to the other side of the current sensing device or to another flexible ferromagnetic strip extending from the other side of the current sensing device to form a loop providing a closed pathway for magnetic flux. A voltage sensor may be provided by metal foil affixed to the inside of the flexible ferromagnetic strip. A clamp body, which can be a spring loaded handle operated clamp or a locking fastener, can secure the ferromagnetic strip around the wire.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: April 14, 2015
    Assignee: International Business Machines Corporation
    Inventors: Wael El-Essawy, Alexandre Peixoto Ferreira, Thomas Walter Keller, Karthick Rajamani, Juan C. Rubio, Michael A. Schappert
  • Patent number: 8994388
    Abstract: A low-voltage testing device for a high-voltage frequency converter of a serial superposition voltage type including a tap transformer, power portion, monitoring box, analog interface board, voltage detecting portion and remote control portion, in which the tap transformer is connected to the power portion, the power portion is connected to the voltage detecting portion, the monitoring box is connected to the power portion via an optical fiber and the analog interface board is connected to the monitoring box and the remote control portion respectively.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: March 31, 2015
    Assignee: Rockwell Automation Technologies, Inc.
    Inventor: Zhuo Wang
  • Patent number: 8994361
    Abstract: The present invention is a finger voltage sensor that includes a base finger ring worn by a user that works near an electrical source, an electricity sensor disposed on the base finger ring, the electricity sensor detects one or more electrical fields associated with the electrical source and a warning light disposed on the base finger ring, the warning light emits a constant light when the electricity sensor is activated and is in communication with the electricity sensor. The finger voltage sensor can also include a beeper instead of a warning light and a base finger ring that includes a hook and loop fastener that is releasably attached to a user's finger.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: March 31, 2015
    Inventor: John Nuzzo
  • Publication number: 20150084653
    Abstract: A method and apparatus for testing integrated circuit resistors includes applying a variable source current to a resistive device under test (DUT), measuring the resistance of the resistive DUT as a function of the source current, and fitting the measured resistance to parameters of a polynomial parametric equation, wherein the parametric equation comprises a constant resistance at zero current bias plus a second order current coefficient of resistance multiplied by the square of the current.
    Type: Application
    Filed: September 26, 2013
    Publication date: March 26, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Young K. Song, Kyu-Pyung Hwang, Dong Wook Kim, Changhan Hobie Yun
  • Publication number: 20150084654
    Abstract: During measuring an insulation resistance for an inverter having at least one half-bridge including two active switching elements for driving an output current, and a DC link voltage, a center point of the half-bridge positioned between the switching elements is connected to a grounding point by closing a grounding switch, and the center point connected to the grounding point is connected, one after the other, to a first ungrounded terminal and a second ungrounded terminal of the DC link voltage of the inverter present at the half-bridge by means of the two active switching elements of the half-bridge to establish a connection between the first and second ungrounded terminals, respectively, and the grounding point. A current flowing via the connection to the grounding point is measured using a measuring device.
    Type: Application
    Filed: December 1, 2014
    Publication date: March 26, 2015
    Inventor: Burkard Mueller