Thermoelectric Patents (Class 324/750.11)
  • Patent number: 11830846
    Abstract: Embodiments herein relate to systems, apparatuses, or processes for coupling or decoupling two substrates by heating pins on one of the substrates and either inserting or withdrawing the heated pins from solder elements on a BGA. In particular, by heating a plurality of pins on a first side of a first substrate, where the plurality of pins are substantially perpendicular to a plane of the substrate, inserting the heated plurality of pins into BGA attached to a second substrate where the BGA includes a plurality of solder elements aligned with the plurality of pins and where the heated plurality of pins melt the plurality of solder elements upon insertion. The inserted plurality of pins physically and/or electrically couple the first substrate and the second substrate.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: November 28, 2023
    Assignee: Intel Corporation
    Inventors: Feroz Mohammad, Srinivasa R. Aravamudhan
  • Patent number: 10060969
    Abstract: A test board unit may include a test board, a thermal tank and a heat-dissipating plate. The test board may be configured to provide a semiconductor chip with a test current. The thermal tank may be configured to dissipate heat generated in the semiconductor chip. The heat-dissipating plate may be coupled between the test board and the thermal tank and may be configured to transfer the heat from the semiconductor chip to the thermal tank.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: August 28, 2018
    Assignees: SK hynix Inc., UNITEST INC.
    Inventors: Woo Sik Jung, Byoung Seon Koh, Hyo Jin Oh, Young Bae Choi, Jin Young Jung
  • Patent number: 9507187
    Abstract: The embodiment of the present invention discloses a method for detecting the bright point in the liquid crystal display panel. The method comprises applying a cutoff voltage to a gate, remaining a thin film transistor TFT switch turning-off, applying a voltage higher than the voltage of a common electrode to a data line, and detecting a bright point under a black image based on the voltages applied to the gate and the data line. The present invention realizes the bright point detecting under a black image.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: November 29, 2016
    Assignee: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Qingzeng Shan, Hao Sun
  • Patent number: 9383406
    Abstract: The present invention relates to systems and methods for preventing over pressurization in a fluid management system used in an integrated circuit (IC) device tester. The prevention of the over pressurization in the fluid management system is based on the use of a pressure relief valve coupled to the fluid management system.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: July 5, 2016
    Assignee: Essai, Inc.
    Inventors: Nasser Barabi, Chee Wah Ho, Joven R. Tienzo, Oksana Kryachek, Elena V. Nazarov
  • Patent number: 9354301
    Abstract: A method and apparatus for ultrasound diagnosis that reduces interference and restores missed signals, is provided. The method of ultrasound diagnosis includes operations of receiving a Doppler signal having at least one gap; respectively obtaining model parameter sets of first and second Doppler signals by using Doppler signal periods before and after a start of the at least one gap; synthesizing first and second Doppler information by respectively using the model parameter sets of the first and second Doppler signals; and generating Doppler information for the at least one gap by cross-fading the synthesized first and second Doppler information. The apparatus includes a transformer for transforming received I and Q signals into stereo audio signals using a Hilbert transform; and a source separator which removes interference from the stereo audio signals by performing source separation on the stereo audio signals.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: May 31, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwan Shim, Young-Tae Kim
  • Publication number: 20140361799
    Abstract: An apparatus includes an electrically insulating thermally conductive carrier for supporting a device under test (DUT), one or more thermo-electric devices arranged with the carrier, and one or more conductive vias in the carrier to make electrical connection to the DUT for coupling to an external test apparatus. A method of testing a device under test (DUT) includes supporting the DUT on an electrically insulating thermally conductive carrier, arranging one or more thermo-electric devices coupled to the carrier to control the temperature of the DUT, connecting the DUT electrically to an external test apparatus through one or more conductive vias in the carrier, connecting the one or more thermo-electric devices to the external test apparatus, and characterizing with the external apparatus the DUT on the basis of the temperature of the DUT.
    Type: Application
    Filed: December 27, 2013
    Publication date: December 11, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Armand Anthony Graupera, Himaja Hardik Bhatt, Joanna Kiljan, Lesly Zaren V. Endrinal, Martin L. Villafana, Ulrike Kindereit
  • Patent number: 8854069
    Abstract: Production test of integrated circuit face thermal management challenges with higher power devices. Current production handlers do not have adequate thermal management characteristics. This invention employs thermal diodes on each device under test and a closed loop microprocessor controlled feedback system for thermal control during production test. The feedback system controls the open/close state of a valve supplying cooling fluid to bathe the integrated circuit based upon the difference between a temperature indicated by at least one thermal diode and a set point temperature.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: October 7, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Joseph Shelton Mayfield, Nolan Riley, Chad Turner, Angelo Sanchez
  • Publication number: 20140239992
    Abstract: A probe card including a multi-layered substrate, a plurality of needles, and a temperature controlling unit may be provided. The multi-layered substrate may include a test pattern through which a test current passes. The needles may be provided on the multi-layered substrate. The needles may be electrically connected to the test pattern and may be configured to contact an object so that the test current may be supplied to the object. The temperature controlling unit may provide the multi-layered substrate with at least one of a first temperature and a second temperature, the first temperature being higher than the second temperature. Thus, a time for setting a test temperature may be shortened. As a result, thermal deformation of the probe card and/or the object may be reduced or suppressed, and thus reliability of test result may be improved.
    Type: Application
    Filed: February 24, 2014
    Publication date: August 28, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jun-Hee LEE, Jong-Hyun KIM
  • Patent number: 8766656
    Abstract: The present invention relates generally to a system and a method for thermal control. More particularly, the invention encompasses an apparatus for thermal control and management of at least one device under test (DUT). The inventive thermal control and management apparatus also allows for the management of a plurality of devices under test, and with each device under test having its own testing regimen. The thermal control and management of the device under test (DUT) is managed using at least one thermoelectric element or cooler (TEC), which can be used to either heat or cool the corresponding device under test (DUT).
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: July 1, 2014
    Assignee: Silicon Turnkey Solutions Inc.
    Inventors: Zafar Malik, David Jackson
  • Publication number: 20130234745
    Abstract: A wafer inspection interface 18 includes a probe card 20 having multiple probes 25 at a surface of the probe card 20 facing a wafer W, the probes 25 being arranged to correspond to electrodes of multiple semiconductor devices formed on the wafer W; a pogo frame 40 that is in contact with a surface of the probe card 20 opposite to the surface of the probe card 20 facing the wafer W and supports the probe card 20; and a sheath heater 44 provided in the pogo frame 40. The sheath heater 44 is provided along respective sides of through holes 43 formed in the pogo frame 40 in a grid pattern.
    Type: Application
    Filed: March 7, 2013
    Publication date: September 12, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Hiroshi Yamada
  • Patent number: 8456185
    Abstract: Independent assemblies are compliantly mounted to a force transfer mechanism to optically align and thermally couple a device under test (DUT) to a test apparatus. A first assembly includes an optical connector. The first assembly has an alignment feature and a first compliant interface. A second assembly includes a thermal control member and force transfer members coupled to a structure. A passage permits a portion of the arm of the first assembly to extend through the structure. The force transfer members provide respective seats for an additional compliant interface. The alignment feature engages a corresponding feature to align the optical connector with the DUT before the compliant interfaces compress under an external force. Compliant mounting of the assemblies accommodates manufacturing tolerances in the DUT so that contact forces on the DUT are relatively consistent and thereby enable consistent optical and thermal coupling between the test apparatus and the DUT.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: June 4, 2013
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Frank Yashar, David J. K. Meadowcroft, Seng-Kum Chan
  • Publication number: 20130049781
    Abstract: Semiconductor devices with self-heating structures, methods of manufacture thereof, and testing methods are disclosed. In one embodiment, a semiconductor device includes a workpiece, an active electrical structure disposed over the workpiece, and at least one self-heating structure disposed proximate the active electrical structure.
    Type: Application
    Filed: August 30, 2011
    Publication date: February 28, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jia Yang Ko, Ying-Han Chiou, Ling-Sung Wang
  • Publication number: 20130027069
    Abstract: In techniques for testing and calibrating an ablator, a tissue probe emulator is connectable to a tissue ablator being tested. The emulator includes a temperature sensor, a thermoelectric unit operative to vary a temperature sensed by the temperature sensor, an adjustable electrical load, electrical control circuitry connected to the thermoelectric unit and the electrical load and operative to independently adjust the electrical load and an output of the thermoelectric unit. The emulator conveys signals emitted by the temperature sensor to the tissue ablator and conveys an ablation energy output of the tissue ablator to the electrical load.
    Type: Application
    Filed: July 27, 2011
    Publication date: January 31, 2013
    Inventors: Assaf Govari, Andres Claudio Altmann, Yaron Ephrath, Tom Sagie Stern
  • Patent number: 8299812
    Abstract: An embodiment of a probe card comprising: a probe base plate including a ceramic base plate and a plurality of conductive paths; and a plurality of contacts disposed on one face of the probe base plate and electrically connected to the conductive paths. The ceramic base plate may be provided with: a plurality of first layers having a heating element which generates heat by electric power and disposed at intervals in the thickness direction of the ceramic base plate; second layers each interposed between adjoining first layers; and a power supply path for supplying electric power for heating to the heating element.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: October 30, 2012
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventors: Mitsuru Nitta, Osamu Arai, Motoharu Kimura
  • Patent number: 8269513
    Abstract: The invention relates to a method for monitoring an electrical heating apparatus and to a corresponding apparatus. The electrical heating apparatus has at least one heating element. A measured value, which is dependent on the resistance and/or the inductance of the electrical heating element, is measured, the measurement being carried out by means of the measured value being sampled. Owing to the use of sampled values, the measurement process can be shortened.
    Type: Grant
    Filed: August 11, 2006
    Date of Patent: September 18, 2012
    Assignee: Siemens Aktiengesellschaft
    Inventors: Berthold Palm, Günter Grommes
  • Patent number: 8248089
    Abstract: An apparatus for testing an electrical property of a semiconductor device includes a substrate support unit, a tester head above the substrate support unit, the tester head including a base, a probe card connected to the base of the tester head, and a temperature control unit within the base of the tester head, the temperature control unit being configured to control temperature of the probe card by heat transfer with the probe card.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: August 21, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: JaeHyun Yang, Soomin Byun, Kunhyung Lee, Ji-Young Son