Thermal Preconditioning Or Temperature Control Patents (Class 324/750.03)
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Patent number: 11965928Abstract: A disclosed Thermal Test Vehicle (TTV) for simulating the thermal characteristics of a certain integrated circuit may include (1) a substrate that serves as both (A) an electrical insulator that resists electrical energy and (B) a thermal conductor that conducts thermal energy and (2) one or more resistive elements coupled to the substrate, wherein the resistive elements extend across a majority of at least one dimension of the substrate. Various other apparatuses, systems, and methods are also disclosed.Type: GrantFiled: August 24, 2021Date of Patent: April 23, 2024Assignee: Juniper Networks, Inc.Inventors: Marshall J. Lise, Travis S. Mikjaniec, Sean Kim
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Patent number: 11933861Abstract: A method and apparatus for performing an on-system built-in self-test of a converter are provided. In the method, a controller generates a test signal and outputs the test signal to the converter. The controller receives a response signal from the converter and determines a plurality of bin powers of a plurality of bins, respectively, of a frequency domain signal representative of the response signal. The controller determines a figure of merit for the converter based on a first bin power of a first bin of the plurality of bin powers, where the first bin corresponds to a frequency of the test signal.Type: GrantFiled: July 8, 2022Date of Patent: March 19, 2024Assignee: STMicroelectronics International N.V.Inventors: Ankur Bal, Sharad Gupta
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Patent number: 11903132Abstract: A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a laminate inlay embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the laminate inlay and configured to distribute a load current switched by the laminate inlay. A fourth metal layer is positioned between the second metal layer and the laminate inlay and configured as a primary thermal conduction path for heat generated by the laminate inlay during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.Type: GrantFiled: March 17, 2023Date of Patent: February 13, 2024Assignee: Infineon Technologies AGInventors: Petteri Palm, Martin Benisek, Liu Chen, Frank Daeche, Josef Maerz
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Patent number: 11796423Abstract: An automatic robot control system and methods relating thereto are described. These systems include components such as a touch screen panel (“TSP”) robot controller for controlling a TSP robot, a camera robot controller for controlling a camera robot and an audio robot controller for controlling an audio robot. The TSP robot operates inside a TSP testing subsystem, the camera robot operates inside a camera testing subsystem, and the audio robot operates inside an audio testing subsystem. Inside the audio testing subsystem, an audio signals measurement system, using a bi-directional coupling, controls the operation of the audio robot controller. In this control scheme, a test application controller is designed to control the different types of subsystem robots. Methods relating to TSP, camera, and audio robots, and their controllers, taken individually or in combination, for automatic testing of device functionalities are also described.Type: GrantFiled: November 14, 2022Date of Patent: October 24, 2023Inventor: Kyutaek Cho
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Patent number: 11762003Abstract: An environmental testing apparatus includes: a plurality of blower fans that circulate air-conditioned air between an air conditioning chamber and a test chamber; a plurality of temperature sensors that measure temperature at a plurality of locations in the test chamber and output temperature data; and a control unit that can individually set rotation speed of each blower fan. The control unit executes setting processing for setting the rotation speed of each blower fan in a testing period in a setting period before the testing period. In the setting processing, the control unit changes the rotation speed of the plurality of blower fans a plurality of times, and acquires a plurality of temperature data after each change from the plurality of temperature sensors.Type: GrantFiled: March 28, 2022Date of Patent: September 19, 2023Assignee: ESPEC CORP.Inventor: Keiyu Hagi
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Patent number: 11693040Abstract: An environmental testing apparatus includes: a plurality of blower fans that circulate air-conditioned air between an air conditioning chamber and a test chamber; a plurality of temperature sensors that measure temperature at a plurality of locations in the test chamber and output temperature data; and a control unit that can individually set rotation speed of each blower fan. The control unit executes setting processing for setting the rotation speed of each blower fan in a testing period in a setting period before the testing period. In the setting processing, the control unit changes the rotation speed of the plurality of blower fans a plurality of times, and acquires a plurality of temperature data after each change from the plurality of temperature sensors.Type: GrantFiled: March 28, 2022Date of Patent: July 4, 2023Assignee: ESPEC CORP.Inventor: Keiyu Hagi
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Patent number: 11668747Abstract: A control method of an inspection apparatus including a mounting stage on which a substrate having a plurality of inspection objects is mounted, a plurality of sections being formed with respect to the mounting stage and a heater controllable to heat for each of the sections includes when inspecting a first inspection object to be inspected among the plurality of inspection objects, causing the heater to heat a section corresponding to the first inspection object and a section corresponding to a second inspection object to be inspected next.Type: GrantFiled: July 26, 2021Date of Patent: June 6, 2023Assignee: Tokyo Electron LimitedInventors: Naoki Akiyama, Hiroyuki Nakayama
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Patent number: 11639956Abstract: A test socket comprising a guide plate with a lower surface engaged with an upper surface of a main test structure, the guide plate further including an upper surface which is parallel to the lower surface and an opening extending through the guide plate, the main test structure includes a body with one or more apertures through the upper surface and one or more probes mounted within the main test structure, the probes including a front end which extends through the apertures for engagement by a lead or terminal pad of a device to be tested, and a tail end which is secured within the main test structure by an elastomeric material.Type: GrantFiled: September 7, 2021Date of Patent: May 2, 2023Assignee: UI Green Micro & Nano Technologies Co LtdInventors: Mark Zhang, Arvin Guo, Jeff Tamasi, Steve Liu
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Patent number: 11632860Abstract: A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a power device embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the power device and configured to distribute a load current switched by the power device. A fourth metal layer is positioned between the second metal layer and the power device and configured as a primary thermal conduction path for heat generated by the power device during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.Type: GrantFiled: October 25, 2019Date of Patent: April 18, 2023Assignee: Infineon Technologies AGInventors: Petteri Palm, Martin Benisek, Liu Chen, Frank Daeche, Josef Maerz
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Patent number: 11594388Abstract: A control unit includes: an input portion that receives the positional information of a vehicle; a calculation unit that generates a control signal for controlling an electromagnetic relay; and an output portion that outputs the control signal to the electromagnetic relay. The calculation unit determines whether a location region of the electromagnetic relay is a relay-freeze region, the location region being identified by the positional information of the vehicle, and, when the location region of the electromagnetic relay is a relay-freeze region, performs a freeze inhibiting process for preventing the electromagnetic relay from being frozen or defrosting the electromagnetic relay by opening and closing the electromagnetic relay and causing the electromagnetic relay to vibrate.Type: GrantFiled: October 21, 2021Date of Patent: February 28, 2023Assignee: PRIME PLANET ENERGY & SOLUTIONS, INC.Inventors: Atsushi Hirayama, Masahiro Sata, Masato Nishikawa, Kimihiko Furukawa, Katsuhiro Arinobu, Taketoshi Yoshikane
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Patent number: 11493548Abstract: A method for predicting failure parameters of semiconductor devices can include receiving a set of data that includes (i) characteristics of a sample semiconductor device, and (ii) parameters characterizing a stress condition. The method further includes extracting a plurality of feature values from the set of data and inputting the plurality of feature values into a trained model executing on the one or more processors, wherein the trained model is configured according to an artificial intelligence (AI) algorithm based on a previous plurality of feature values, and wherein the trained model is operable to output a failure prediction based on the plurality of feature values. Further, the method includes generating, via the trained model, a predicted failure parameter of the sample semiconductor device due to the stress condition.Type: GrantFiled: July 23, 2021Date of Patent: November 8, 2022Assignee: UCHICAGO ARGONNE, LLCInventors: Moinuddin Ahmed, John N. Hryn, Christopher Stankus
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Patent number: 11486895Abstract: A chuck unit includes a chuck on which a semiconductor is mounted, a heating part including a heater and configured to heat the chuck, a cooling block configured to cool the heating part by using fluid-cooling, and a Peltier module configured to cool the cooling block. The heater is configured to be energized while the cooling block and the Peltier module are spaced apart from each other, and the heater is configured to be cut off from energization while the cooling block and the Peltier module contact each other.Type: GrantFiled: September 21, 2021Date of Patent: November 1, 2022Assignee: HiSOL, Inc.Inventor: Hirofumi Yanai
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Patent number: 11454601Abstract: A substrate evaluation chip is used to perform a test for evaluating a thermal characteristic of a mounting substrate that is mountable a power semiconductor. The substrate evaluation chip includes an insulating substrate bonded with the mounting substrate, and a heating pattern that is formed on a surface of the insulating substrate by a metallic film and is arranged by having a predetermined shape that is optimized to beat the insulating substrate more uniformly. The insulating substrate is a substrate in which an insulating film is formed on a surface of a single crystal substrate having a thermal conductivity of 250 [W/mK] or more.Type: GrantFiled: August 20, 2020Date of Patent: September 27, 2022Assignees: OSAKA UNIVERSITY, YAMATO SCIENTIFIC CO., LTD.Inventors: Katsuaki Suganuma, Shijo Nagao, Akio Shimoyama, Dongjin Kim, Kazutaka Takeshita, Naoki Wakasugi
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Patent number: 11444001Abstract: A thermoelectric semiconductor device includes a heat dissipating semiconductor module and a stack of flash memory dies mounted on a substrate. The heat dissipating module comprises a first semiconductor die such as a controller, and a second semiconductor die such as a thermoelectric semiconductor die to cool the first semiconductor die during operation. The thermoelectric semiconductor die may be mounted to the controller die at the wafer level.Type: GrantFiled: May 7, 2021Date of Patent: September 13, 2022Assignee: Western Digital Technologies, Inc.Inventors: Jiandi Du, Yazhou Zhang, Binbin Zheng, Sundarraj Chandran, Wenbin Qu, Chin-Tien Chiu
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Patent number: 11415638Abstract: The present disclosure provides a test method and a test device for an adapter. The method includes: detecting temperatures of elements in the adapter; determining whether the adapter is in a temperature balance state according to the temperatures of the elements in the adapter; increasing an ambient temperature of an environment where the adapter is located in response to the temperature balance state; detecting an output power of the adapter, and determining whether the adapter performs a power reduction operation before the temperatures of the elements reach a first preset temperature threshold; and determining that a test for the adapter fails when the power reduction operation does not occur.Type: GrantFiled: September 30, 2018Date of Patent: August 16, 2022Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.Inventor: Chen Tian
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Patent number: 11394303Abstract: A flyback converter is provided that compares a drain-to-source voltage of a synchronous rectifier switch transistor to a negative threshold voltage to detect whether the synchronous rectifier switch transistor has a partially-open or an open fault condition. The flyback converter also compares a gate terminal voltage of a gate driver to the synchronous rectifier switch transistor to a positive threshold voltage to detect whether the synchronous rectifier switch transistor has a gate open or a gate short-circuit fault condition.Type: GrantFiled: May 29, 2020Date of Patent: July 19, 2022Assignee: Dialog Semiconductor, Inc.Inventors: Yimin Chen, Juyoung Yoon, Jiandong Zhang, David Nguyen, Jianming Yao
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Patent number: 11378586Abstract: A stiffener includes a first upper cover and a second upper cover, a first lateral side cover and a second lateral side cover, and a first longitudinal side cover and a second longitudinal side cover. The first and second upper covers extend in parallel with each other. The first and second lateral side covers are connected to separate, respective covers of the first and second upper covers, and facing each other. The first and second longitudinal side covers are each connected to the both first and second upper covers, the first and second longitudinal side covers facing each other. The first and second upper covers each include a separate plurality of upper elastic portions. Each upper elastic portion of each separate plurality of upper elastic portions has a vertical elasticity.Type: GrantFiled: January 31, 2020Date of Patent: July 5, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Joonsu Ji, Jinwoo Jung, Gyuyeol Kim, Jaehyoung Park
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Patent number: 11353500Abstract: A contactor includes a temperature adjustment mechanism, a cover and a path. The temperature adjustment mechanism increases and decreases temperature of an electronic component via a contact portion. The cover externally covers the temperature adjustment mechanism and includes an aperture portion. The path is allowed to supply gas to inside of the cover. The cover is configured to change a distance from the aperture portion to the contact portion.Type: GrantFiled: October 19, 2020Date of Patent: June 7, 2022Assignee: Synax Co., Ltd.Inventors: Vincent So, Takamitsu Aihara
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Patent number: 11307245Abstract: The method may be used for measuring an electric property of a magnetic tunnel junction used in an embedded MRAM memory for example. The method uses a multi point probe with a plurality of probe tips for contacting a designated area of the test sample, which is electrically insulated from the part of the test sample which is to be tested. Electrically connections are placed underneath the magnetic tunnel junction and goes to the designated area.Type: GrantFiled: March 18, 2020Date of Patent: April 19, 2022Assignee: KLA CORPORATIONInventors: Alberto Cagliani, Frederik Westergaard Østerberg, Chia-Hung Wei
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Patent number: 11255899Abstract: A test module, is provided including a tester that electrically tests a semiconductor device. A device under test (DUT) board is connected to the tester and the semiconductor device. A base board is disposed between the DUT board and the tester. The base board includes a lower plate, a plurality of connection lines that penetrate the lower plate, an upper plate disposed on the lower plate, and a first temperature controller disposed in the base board. The first temperature controller maintains the connection lines at a first temperature. A docking connector is disposed on the first temperature controller. The docking connector connects the connection lines to the DUT board. A second temperature controller is disposed between the first temperature controller and the upper plate. The second temperature controller maintains the docking connector at a second temperature different from the first temperature.Type: GrantFiled: April 20, 2020Date of Patent: February 22, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Kiryong Woo
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Patent number: 11226364Abstract: A testing device (100) is for electrically testing integrated circuits on a wafer (102). The testing device (100) includes a vacuum chamber (109), a chuck (101) for holding the wafer (102), a probe card (103) for electrically contacting the integrated circuits, and a radiation shield (107) arranged inside the vacuum chamber (109) and enclosing the chuck (101) and the probe card (103). In the testing device (100), the vacuum chamber (109) is provided with a gate valve (123), the radiation shield (107) is provided with a hatch (122), and the testing device (100) includes a wafer loading assembly (125) for loading the wafer (102) onto the chuck (101) through the gate valve (123) and the hatch (122).Type: GrantFiled: April 29, 2020Date of Patent: January 18, 2022Assignees: Afore Oy, Bluefors Cryogenics OyInventors: Aki Junes, Ari Kuukkala, Timo Salminen, Vesa Henttonen, Matti Manninen, David Gunnarsson, Leif Roschier
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Patent number: 11169204Abstract: A temperature control device for controlling a temperature of an object, the temperature control device includes a heater having a heating source configured to heat the object, a cooler having a cooling source configured to cool the object; and a temperature controller configured to control the heating source and the cooling source. The temperature controller includes a sliding mode controller configured to supply power to the heating source as an operation amount, a cooling mode controller configured to supply power to the cooling source as an operation amount, and a switching controller configured to determine whether an output of the sliding mode controller will be output to the heating source as a first operation amount, or an output of the cooling mode controller will be used as a second operation amount, based on a nonlinear term value of the output of the sliding mode controller.Type: GrantFiled: November 27, 2019Date of Patent: November 9, 2021Assignee: TOKYO ELECTRON LIMITEDInventors: Masahito Kobayashi, Shigeru Kasai
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Patent number: 11143699Abstract: A test socket comprising a guide plate with a lower surface engaged with an upper surface of a main test structure, the guide plate further including an upper surface which is parallel to the lower surface and an opening extending through the guide plate, the main test structure includes a body with one or more apertures through the upper surface and one or more probes mounted within the main test structure, the probes including a front end which extends through the apertures for engagement by a lead or terminal pad of a device to be tested, and a tail end which is secured within the main test structure by an elastomeric material.Type: GrantFiled: February 19, 2020Date of Patent: October 12, 2021Assignee: UI Green Micro & Nano Technologies Co LtdInventors: Mark Zhang, Arvin Guo, Jeff Tamasi, Steve Liu
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Patent number: 11054465Abstract: A method of operating a probing apparatus is disclosed. The method includes providing a chuck configured to support a DUT, a probe card disposed above the DUT and having a probe, and an inspection module configured to determine positions of the DUT and the probe. The method further includes determining a first position of a DUT by an inspection module; moving a probe card to align a first position of a probe with the first position of the DUT; moving a chuck toward the probe; adjusting a temperature of the probe to a predetermined temperature by a temperature-controlling device; determining a second position of the probe by the inspection module after the adjustment of the temperature of the probe; moving the probe card to align the probe with the position of the DUT based on the determination of the second position of the probe; and probing the DUT.Type: GrantFiled: October 21, 2019Date of Patent: July 6, 2021Assignee: STAR TECHNOLOGIES, INC.Inventors: Choon Leong Lou, Yi Ming Lau
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Patent number: 10962570Abstract: A system for semiconductor wafer testing, a tangent probe card and a probe head assembly thereof. The system has a tangent probe card and a tester. Testing ends of the probe card are flat, hence the allowable alignment budget will always be more generous for the tangent probe card. The probes are held on the probe head assembly, and once the alignment is achieved accurately during manufacture, the alignment will remain stable throughout the whole life cycle. The probe has a greater CCC due to its larger cross section. The throughput of the tangent probes is higher than that of the conventional probe card since there is no need to move the pointed pin/structure. No pointed pin/structure needs to be repaired, and the flat bottom surface of the probe head assembly is easier to clean and maintain.Type: GrantFiled: June 3, 2020Date of Patent: March 30, 2021Inventor: Wing Cheuk Leung
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Patent number: 10914759Abstract: The invention relates to a method for placing and contacting a contact element formed in particular as a test contact of a test contact arrangement, wherein in said method, for forming a heat transfer surface, a contact head provided with a contact element holding device, with the contact element received in the contact element holding device, is placed between the contact element and a contact material deposit arranged on a contact surface of a contact carrier in the direction of a feeding axis against a contact surface of the connecting material deposit, and, for realizing an at least partial fusing of the connecting material deposit and for producing a materially bonded connection between the contact element and the connecting material deposit, thermal energy is introduced into the connecting material deposit by means of treating the contact element with thermal energy, the temperature T of the contact element being measured while the contact element is being treated and the duration of the treatment beingType: GrantFiled: December 6, 2016Date of Patent: February 9, 2021Assignee: PAC TECH—PACKAGING TECHNOLOGIES GMBHInventor: Thorsten Krause
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Patent number: 10867381Abstract: A defect detection apparatus including a region setter which sets a region of interest in an image including a plurality of pixels, and a defect detector which divides the region of interest into a plurality of segments and generates a trend line for each of the segments based on gray level values of the pixels. Here, the defect detector detects a stain in the image by comparing the gray level values of the pixels with the trend line.Type: GrantFiled: November 29, 2018Date of Patent: December 15, 2020Assignee: Samsung Display Co., Ltd.Inventor: Byoung Kwan An
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Patent number: 10816594Abstract: An apparatus for testing a signal speed of a semiconductor package may include a plurality of sockets, one or more test boards including at least a first test board, an extension board and a test head. Each of the sockets may be configured to receive the semiconductor package. The first test board may include a plurality of mount regions on which the sockets may be mounted, and test lines extended from the mount regions toward at least one side surface of the first test board. The extension board may be vertically arranged at the side surface of the first test board. The extension board may be electrically connected to the test lines. The test head may be electrically connected to the extension board to provide the mount regions with a test signal for testing the signal speed of the semiconductor package through the extension board. Thus, it may not be required to change a structure of the socket in accordance with types of the semiconductor packages.Type: GrantFiled: July 26, 2018Date of Patent: October 27, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Ki-Jae Song
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Patent number: 10768206Abstract: A method is provided for using a loop-back test device to verify continuity between loop-back probes electrically connected to each other on a probe card, the loop-back test device including a first conductive region electrically connected to a substrate, a second conductive region electrically isolated from the substrate, the second conductive region spaced apart from the first conductive region such that when a first loop-back probe contacts the first conductive region a second loop-back probe contacts the second conductive region, The method includes placing the first loop-back probe in electrical contact with the first conductive region, and placing the second loop-back probe in electrical contact with the second conductive region. Continuity between the substrate and the second conductive region is then measured.Type: GrantFiled: June 21, 2016Date of Patent: September 8, 2020Assignee: Integrated Technology CorporationInventors: Rodney E. Schwartz, John K. Geist, Daniel Kosecki
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Patent number: 10698002Abstract: Probe systems for testing a device under test are disclosed herein. The probe systems include a platen that defines an upper surface, an opposed lower surface, and a platen aperture. The probe systems also include a chuck that defines a support surface configured to support a device under test. The probe systems further include a lower enclosure extending from the lower surface of the platen and an upper enclosure extending from the upper surface of the platen. The upper enclosure includes a side wall that defines a side wall aperture, and the side wall and the platen define an intersection angle of at least 30 degrees and at most 60 degrees. The probe systems also include a manipulator, a probe shaft arm, a probe assembly, a test head, and an electrical conductor.Type: GrantFiled: September 27, 2018Date of Patent: June 30, 2020Assignee: FormFactor Beaverton, Inc.Inventors: Christopher Storm, Michael E. Simmons, Bryan Conrad Bolt, Gavin Neil Fisher, Anthony Lord, Kazuki Negishi
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Patent number: 10663487Abstract: A system for testing functionality of die on a wafer including a plurality of contacts includes a support structure and a plurality of probes mounted to the support structure in an array. A configuration of each of the plurality of probes varies based on a position of the probe within the array to maintain uniform engagement between the plurality of probes and a corresponding plurality of contacts across the array.Type: GrantFiled: February 28, 2019Date of Patent: May 26, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David M. Audette, Dennis R. Conti, Marc D. Knox, Grant W. Wagner
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Patent number: 10585119Abstract: A probe head that contains a coining surface and a plurality of probe tips integrated on a same side of the probe head is provided. The probe head has a first portion and a laterally adjacent second portion, wherein the first portion of the probe head contains the coining surface, and the second portion of the probe head contains the plurality of the probe tips. Each probe tip may, in some embodiments, extend outwards from a probe pedestal that is in contact with the second portion of the probe head. The probe head is traversed across the surface of a semiconductor wafer containing a plurality of solder bump arrays such that the coining surface contacts a specific array of solder bumps prior to contacting of the same specific array of solder bumps with the probe tips.Type: GrantFiled: May 2, 2018Date of Patent: March 10, 2020Assignee: International Business Machines CorporationInventors: Yang Liu, Steven L. Wright
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Patent number: 10509056Abstract: A probe card for a testing apparatus of electronic devices comprises at least one testing head which houses a plurality of contact probes, each contact probe having at least one contact tip suitable to abut onto contact pads of a device under test, and a support plate of the testing head associated with a stiffener and an intermediate support, connected to the support plate and suitable to provide a spatial transformation of the distances between contact pads made on opposite sides thereof. Conveniently, the probe card comprises a support which is joined to the intermediate support, which is made of a material compatible with the printed circuit board technologies and has a coefficient of thermal expansion greater than 10×10?6° C.?1, the support being made of a metal material having a coefficient of thermal expansion lower than 6×10?6° C.?1.Type: GrantFiled: September 6, 2016Date of Patent: December 17, 2019Assignee: TECHNOPROBE S.P.A.Inventors: Riccardo Liberini, Raffaele Vallauri, Giuseppe Crippa
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Patent number: 10481201Abstract: A multi-turret handler adapted to test a plurality of electronic elements is provided. The multi-turret handler includes a main turret and a test turret. The main turret includes a plurality of pickers. The test turret includes a plurality of movable brackets and a test unit. The test unit includes a plurality of lead pushers and a plurality of sockets. The movable brackets are moveable between a first position and a second position. When the movable bracket is in the first position, the pickers respectively pick and place the electronic elements on the movable brackets. When the movable brackets are in the second position, the movable brackets correspond to the sockets, and the lead pushers are respectively inserted into the movable brackets and the sockets to test the electronic elements.Type: GrantFiled: October 4, 2017Date of Patent: November 19, 2019Assignee: WINBOND ELECTRONICS CORP.Inventor: Ting-Ming Fu
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Patent number: 10451673Abstract: An inspection device includes: one chamber in which an IC device after an inspection can be arranged; another chamber in which the IC device after the inspection can be arranged and which is different from the one chamber; and a tray on which the electronic component after the inspection can be placed and which can move with the IC device from the one chamber to the another chamber. Also, the inspection device can detect at least one of humidity and temperature in the another chamber.Type: GrantFiled: February 25, 2016Date of Patent: October 22, 2019Assignee: Seiko Epson CorporationInventors: Daisuke Kirihara, Masami Maeda
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Patent number: 10371736Abstract: A short-circuit pinpointing device for testing a wide-range air/fuel sensor includes a current-sink and a controller. The current-sink is selectively connectable to one or more of sensor-terminals of a wide-range air/fuel sensor that include a reference-terminal, a pump-terminal, a return-terminal, and a tag-terminal. The controller is in communication with the current-sink and the sensor-terminals. The controller controls the connection of the current-sink to the one or more sensor-terminals. The controller also determines one or more status-values based on signals present at the sensor-terminals. The controller also determines a sensor-status of the wide-range air/fuel sensor based on the connection of the current-sink and the one or more status-values.Type: GrantFiled: February 28, 2017Date of Patent: August 6, 2019Assignee: DELPHI TECHNOLOGIES IP LIMITEDInventors: Seyed R. Zarabadi, Daniel C. Penrod, Mark W. Gose
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Patent number: 10295590Abstract: A probe card having uniform temperature distribution under control to a desired temperature is provided, so as to provide an inspection apparatus and an inspection method. The probe card includes a supporting substrate, a wiring layer arranged including a wiring on a main surface of the supporting substrate, a probe arranged on a surface serving as an opposite side to a side of the supporting substrate of the wiring layer so as to be connected to the wiring, and a plurality of heaters. Further, the probe card is virtually divided into heater regions according to a plurality of heater regions arrayed in vertical and horizontal directions in plan view, and at least one of a plurality of heaters is arranged in each of the plurality of heater regions. An inspection apparatus is configured including the probe card, and an object to be inspected is inspected by use of the inspection apparatus.Type: GrantFiled: June 20, 2017Date of Patent: May 21, 2019Assignee: KABUSHIKI KAISHA NIHON MICRONICSInventors: Yuki Saito, Yoshiyuki Fukami, Hidehiro Kiyofuji
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Patent number: 10261123Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate, an electrical connection structure extending upwardly from an upper surface of the substrate by a first height, and a contact pad electrically disposed on the upper surface of the substrate. The contact pad has a solder-wettable surface with an area configured to support a solder ball having a second height at least twice the first height. The semiconductor device structure further includes a fuse element with a first end electrically coupled to the electrical connection structure and a second end electrically coupled to the contact pad.Type: GrantFiled: August 24, 2017Date of Patent: April 16, 2019Assignee: Micron Technology, Inc.Inventor: Mark E. Tuttle
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Patent number: 10261108Abstract: A system for testing functionality of die on a wafer including a plurality of contacts includes a support structure and a plurality of probes mounted to the support structure in an array. A configuration of each of the plurality of probes varies based on a position of the probe within the array to maintain uniform engagement between the plurality of probes and a corresponding plurality of contacts across the array.Type: GrantFiled: July 12, 2016Date of Patent: April 16, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David M. Audette, Dennis R. Conti, Marc D. Knox, Grant W. Wagner
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Patent number: 10222413Abstract: An IC handler (4) of the present invention transfers an IC device (D) to a test head (2). The test head (2) is provided with a socket (3), which has a placing surface (3a) having the IC device (D) placed thereon, and which attaches the IC device (D) placed on the placing surface (3a) to the test head (2). The IC handler (4) is provided with a non-contact displacement meter (71) that is disposed by being spaced apart from the socket (3) in the direction perpendicular to the placing surface (3a). The non-contact displacement meter (71) measures a distance from the non-contact displacement meter (71) to the IC device (D) placed on the placing surface (3a) by emitting a laser beam toward the placing surface (3a) of the socket (3).Type: GrantFiled: December 3, 2013Date of Patent: March 5, 2019Assignee: HappyJapan Inc.Inventors: Shouhei Matsumoto, Mitsuo Koizumi, Fumiaki Togashi, Satoshi Ueno, Keitaro Harada, Masayoshi Yokoo
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Patent number: 10209274Abstract: A pulsed-laser LADA system is provided, which utilizes temporal resolution to enhance spatial resolution. The system is capable of resolving CMOS pairs within the illumination spot using synchronization of laser pulses with the DUT clock. The system can be implemented using laser wavelength having photon energy above the silicon bandgap so as to perform single-photon LADA or wavelength having photon energy below the silicon bandgap so as to generate two-photon LADA. The timing of the laser pulses can be adjusted using two feedback loops tied to the clock signal of an ATE, or by adjusting the ATE's clock signal with reference to a fixed-pulse laser source.Type: GrantFiled: October 23, 2015Date of Patent: February 19, 2019Assignee: FEI EFA, Inc.Inventors: Praveen Vedagarbha, Derryck Reid, Keith Serrels, James S. Vickers
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Patent number: 10145890Abstract: A controller is switched from a first mode to a second mode, where the controller in the first mode is to manage a plurality of electronic devices collectively as a logical unit. The controller in the second mode is used to individually test the plurality of electronic devices, where the controller in the second mode allowing sending of a test command individually to a respective one of the plurality of electronic devices.Type: GrantFiled: March 28, 2014Date of Patent: December 4, 2018Assignee: Hewlett Packard Enterprise Development LPInventors: Diego Gutierrez, Robin T. Lovelace, Terry W. Denney
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Patent number: 10095288Abstract: A system may include a plurality of temperature sensors configured to sense temperatures at a plurality of locations associated with an information handling system, a cooling subsystem comprising at least one cooling fan configured to generate a cooling airflow in the information handling system, and a thermal manager communicatively coupled to the plurality of temperature sensors and the cooling subsystem. The thermal manager may be configured to, based on at least a power provided to a subsystem of the information handling system, estimate a thermal condition proximate to the subsystem, correlate each of a plurality of components of the subsystem and a linear airflow velocity requirement of the component to a respective speed of the at least one cooling fan required to provide such airflow requirement, and set a speed of the at least one cooling fan based on the respective speeds.Type: GrantFiled: March 18, 2016Date of Patent: October 9, 2018Assignee: DELL PRODUCTS L.P.Inventors: Hasnain Shabbir, Dominick A. Lovicott, Dinesh Kunnathur Ragupathi, Daniel Whittington
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Patent number: 9958501Abstract: A system for electrically testing an object, the system may include a scanning electron microscope that comprises a column; and nano-probe modules that are mechanically connected to the column; wherein the column is configured to illuminate areas of the object, with a beam of charged particles; wherein nano-probes of the nano-probe modules are configured to electrically contact elements of the object, during electrical tests of the object, wherein the elements of the object are located within the areas of the object.Type: GrantFiled: March 3, 2016Date of Patent: May 1, 2018Assignee: APPLIEED MATERIALS ISRAEL LTD.Inventors: Amir Wachs, Alon Litman, Efim Vinnitsky
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Patent number: 9927800Abstract: A manufacturing center configured for use with a plurality of tools and a plurality of nests. The manufacturing center includes a base configured for coupling with one of the plurality of nests. The base includes a base electrical connector. The manufacturing center also includes an arm configured for coupling with one of the plurality of tools. The arm has an end movable with respect to the base, and the end includes an arm electrical connector. A controller is operable to control movement of the arm and is in communication with the base electrical connector and the arm electrical connector. The controller is operable to identify which one of the plurality of tools is coupled with the arm and which one of the plurality of nests is coupled with the base at least in part by way of communication with the arm electrical connector and the base electrical connector.Type: GrantFiled: December 3, 2015Date of Patent: March 27, 2018Assignee: Clover Technologies Group, LLCInventors: Heymo Hormann, Robert Carducci, Rene Paul Beauchamp
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Patent number: 9874602Abstract: The invention provides a test board support platform for supporting a test board during tests, the platform comprising a heat conductive interface arranged to contact a bottom side of the test board at a first side of the heat conductive interface. The support platform also comprises a thermal conditioner coupled to a second side of the heat conductive interface, the second side being opposite the first side. By using this test board support platform a test board can be supported and thermally controlled in a way so that a DUT positioned on the test board can be probed from above, while the temperature is controlled from below.Type: GrantFiled: March 17, 2015Date of Patent: January 23, 2018Assignee: NXP USA, Inc.Inventors: Christian Jean-Gabriel Vincent, Jean Dalmon, Pierre Michel Georges Jalbaud
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Patent number: 9778313Abstract: A system can include a plurality of device under test (DUT) cells. Each DUT cell can include a DUT and a plurality of switches configured to control a flow of current to the DUT. The system can further include a controller configured to execute a plurality of test to the plurality of DUTs in the plurality of DUT cells. Each of the plurality of tests comprises applying a measurement condition to a given DUT of the plurality of DUTs and concurrently applying a stress condition to the remaining DUTs of the plurality of DUTs, wherein the plurality of tests can provide measurements sufficient to determine a bias thermal instability and a time dependent dielectric breakdown of the given DUT.Type: GrantFiled: September 8, 2014Date of Patent: October 3, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Min Chen, Vijay Kumar Reddy
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Patent number: 9768438Abstract: A device for injecting a liquid electrolyte into a battery addresses a problem that the injection amount of the liquid electrolyte becomes excessive because the liquid electrolyte volatizes at injection if remaining in a chamber. The device has a liquid injecting pump for injecting the liquid electrolyte into the battery positioned inside the chamber which has been sealed in a depressurized state and a vacuum pump for depressurizing the inside of the chamber. A vacuum attainment time until a pressure of the inside of the chamber becomes in a predetermined vacuum state is measured, and if this vacuum attainment time becomes longer than a predetermined value, the injection amount of the liquid electrolyte is corrected downwards.Type: GrantFiled: October 17, 2014Date of Patent: September 19, 2017Assignee: Nissan Motor Co., Ltd.Inventors: Keisho Ishibashi, Ryo Inoue, Natsumi Satoh
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Patent number: 9753076Abstract: An integrated circuit is configured to detect current leakage that results from electromigration in the integrated circuit. An isolation power switch selectively connects a target voltage rail in the integrated circuit to a power source. A voltage memory stores a record of an initial voltage decay rate for the target voltage rail while isolated from a manufacturer's power source. A voltage record comparator logic compares the initial voltage decay rate to a field voltage decay rate for the target voltage rail when isolated from a field power source. An output device indicates that a difference between the initial voltage decay rate and the field voltage decay rate for the target voltage rail exceeds a predefined limit, where the difference is a result of current leakage caused by electromigration in the integrated circuit.Type: GrantFiled: January 28, 2016Date of Patent: September 5, 2017Assignee: International Business Machines CorporationInventors: David D. Cadigan, William V. Huott, Adam J. McPadden, Anuwat Saetow, Gary A. Tressler
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Patent number: 9711103Abstract: Disclosed is a display apparatus including: a display panel including pixels connected with a plurality of gate lines and a plurality of data lines; a gate driver supplying gate signals to the gate lines; and a data driver supplying data voltages to the data lines. The data driver includes a temperature measurer generating a temperature signal of the data driver.Type: GrantFiled: April 22, 2015Date of Patent: July 18, 2017Assignee: Samsung Display Co., Ltd.Inventors: Jae-Han Lee, Taegon Kim, Sunkyu Son, ByungKil Jeon, Dong-Hyun Yeo